mirror of
https://github.com/reactos/reactos.git
synced 2025-08-04 01:46:21 +00:00
- Support for resetting the display mode on a bug check.
svn path=/trunk/; revision=5817
This commit is contained in:
David Welch
parent
1c8b6bc99e
commit
d2c4219caf
1 changed files with 224 additions and 22 deletions
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@ -16,7 +16,7 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* $Id: display.c,v 1.6 2003/08/11 18:50:12 chorns Exp $
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/* $Id: display.c,v 1.7 2003/08/24 11:58:16 dwelch Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -97,9 +97,33 @@
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#define SCREEN_SYNCHRONIZATION
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#define VGA_AC_INDEX 0x3c0
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#define VGA_AC_READ 0x3c0
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#define VGA_AC_WRITE 0x3c1
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#define CRTC_COMMAND 0x3d4
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#define CRTC_DATA 0x3d5
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#define VGA_MISC_WRITE 0x3c2
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#define VGA_SEQ_INDEX 0x3c4
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#define VGA_SEQ_DATA 0x3c5
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#define VGA_DAC_READ_INDEX 0x3c7
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#define VGA_DAC_WRITE_INDEX 0x3c8
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#define VGA_DAC_DATA 0x3c9
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#define VGA_MISC_READ 0x3cc
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#define VGA_GC_INDEX 0x3ce
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#define VGA_GC_DATA 0x3cf
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#define VGA_CRTC_INDEX 0x3d4
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#define VGA_CRTC_DATA 0x3d5
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#define VGA_INSTAT_READ 0x3da
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#define VGA_SEQ_NUM_REGISTERS 5
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#define VGA_CRTC_NUM_REGISTERS 25
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#define VGA_GC_NUM_REGISTERS 9
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#define VGA_AC_NUM_REGISTERS 21
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#define CRTC_COLUMNS 0x01
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#define CRTC_OVERFLOW 0x07
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@ -128,6 +152,114 @@ static WORD *VideoBuffer = NULL;
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static PHAL_RESET_DISPLAY_PARAMETERS HalResetDisplayParameters = NULL;
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static UCHAR TextPalette[64][3] =
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{
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{0, 0, 0} /* 0 */,
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{0, 0, 42} /* 1 */,
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{0, 42, 0} /* 2 */,
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{0, 42, 42} /* 3 */,
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{42, 0, 0} /* 4 */,
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{42, 42, 42} /* 5 */,
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{42, 42, 0} /* 6 */,
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{42, 42, 42} /* 7 */,
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{0, 0, 21} /* 8 */,
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{0, 0, 63} /* 9 */,
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{0, 42, 21} /* 10 */,
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{0, 42, 63} /* 11 */,
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{42, 0, 21} /* 12 */,
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{42, 0, 63} /* 13 */,
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{42, 42, 21} /* 14 */,
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{42, 42, 63} /* 15 */,
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{0, 21, 0} /* 16 */,
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{0, 21, 42} /* 17 */,
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{0, 63, 0} /* 18 */,
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{0, 63, 42} /* 19 */,
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{42, 21, 0} /* 20 */,
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{42, 21, 42} /* 21 */,
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{42, 63, 0} /* 22 */,
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{42, 63, 42} /* 23 */,
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{0, 21, 21} /* 24 */,
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{0, 21, 63} /* 25 */,
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{0, 63, 21} /* 26 */,
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{0, 63, 63} /* 27 */,
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{42, 21, 21} /* 28 */,
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{42, 21, 63} /* 29 */,
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{42, 63, 21} /* 30 */,
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{42, 63, 63} /* 31 */,
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{21, 0, 0} /* 32 */,
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{21, 0, 42} /* 33 */,
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{21, 42, 0} /* 34 */,
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{21, 42, 42} /* 35 */,
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{63, 0, 0} /* 36 */,
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{63, 0, 42} /* 37 */,
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{63, 42, 0} /* 38 */,
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{63, 42, 42} /* 39 */,
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{21, 0, 21} /* 40 */,
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{21, 0, 63} /* 41 */,
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{21, 42, 21} /* 42 */,
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{21, 42, 63} /* 43 */,
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{63, 42, 0} /* 44 */,
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{63, 0, 63} /* 45 */,
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{63, 42, 21} /* 46 */,
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{63, 42, 63} /* 47 */,
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{21, 21, 0} /* 48 */,
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{21, 21, 42} /* 49 */,
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{21, 63, 0} /* 50 */,
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{21, 63, 42} /* 51 */,
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{63, 21, 0} /* 52 */,
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{63, 21, 42} /* 53 */,
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{63, 63, 0} /* 54 */,
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{63, 63, 42} /* 55 */,
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{21, 21, 21} /* 56 */,
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{21, 21, 63} /* 57 */,
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{21, 63, 21} /* 58 */,
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{21, 63, 63} /* 59 */,
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{63, 21, 21} /* 60 */,
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{63, 21, 63} /* 61 */,
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{63, 63, 21} /* 62 */,
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{63, 63, 63} /* 63 */,
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};
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static UCHAR Text80x25Registers[] =
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{
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/* MISC */
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0x67,
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/* SEQ */
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0x03, 0x00, 0x03, 0x00, 0x02,
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/* CRTC */
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0x5F, 0x4F, 0x50, 0x82, 0x55, 0x81, 0xBF, 0x1F,
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0x00, 0x4F, 0x0D, 0x0E, 0x00, 0x00, 0x00, 0x50,
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0x9C, 0x0E, 0x8F, 0x28, 0x1F, 0x96, 0xB9, 0xA3,
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0xFF,
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/* GC */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0E, 0x00,
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0xFF,
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/* AC */
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
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0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
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0x0C, 0x00, 0x0F, 0x08, 0x00
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};
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static UCHAR Text80x50Registers[] =
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{
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/* MISC */
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0x67,
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/* SEQ */
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0x03, 0x00, 0x03, 0x00, 0x02,
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/* CRTC */
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0x5F, 0x4F, 0x50, 0x82, 0x55, 0x81, 0xBF, 0x1F,
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0x00, 0x47, 0x06, 0x07, 0x00, 0x00, 0x01, 0x40,
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0x9C, 0x8E, 0x8F, 0x28, 0x1F, 0x96, 0xB9, 0xA3,
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0xFF,
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/* GC */
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0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0E, 0x00,
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0xFF,
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/* AC */
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0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
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0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F,
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0x0C, 0x00, 0x0F, 0x08, 0x00,
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};
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/* STATIC FUNCTIONS *********************************************************/
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@ -173,6 +305,66 @@ HalPutCharacter (CHAR Character)
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*ptr = (CHAR_ATTRIBUTE << 8) + Character;
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}
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VOID STATIC
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HalSetDisplayMode(PUCHAR Registers)
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{
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UCHAR Port;
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ULONG i;
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/* Write MISC register. */
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WRITE_PORT_UCHAR((PUCHAR)VGA_MISC_WRITE, *Registers);
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Registers++;
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/* Write SEQUENCER registers. */
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for (i = 0; i < VGA_SEQ_NUM_REGISTERS; i++)
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{
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WRITE_PORT_UCHAR((PUCHAR)VGA_SEQ_INDEX, i);
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WRITE_PORT_UCHAR((PUCHAR)VGA_SEQ_DATA, *Registers);
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Registers++;
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}
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/* Unlock CRTC registers. */
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, 0x03);
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Port = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA, Port | 0x80);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, 0x11);
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Port = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA, Port & ~0x80);
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/* Make sure they stay unlocked. */
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Registers[0x03] |= 0x80;
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Registers[0x11] &= ~0x80;
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/* Write CRTC registers. */
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for (i = 0; i < VGA_CRTC_NUM_REGISTERS; i++)
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{
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, i);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA, *Registers);
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Registers++;
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}
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/* Write GC registers. */
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for (i = 0; i < VGA_GC_NUM_REGISTERS; i++)
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{
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WRITE_PORT_UCHAR((PUCHAR)VGA_GC_INDEX, i);
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WRITE_PORT_UCHAR((PUCHAR)VGA_GC_DATA, *Registers);
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Registers++;
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}
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/* Write AC registers. */
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for (i = 0; i < VGA_AC_NUM_REGISTERS; i++)
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{
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(VOID)READ_PORT_UCHAR((PUCHAR)VGA_INSTAT_READ);
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WRITE_PORT_UCHAR((PUCHAR)VGA_AC_INDEX, i);
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WRITE_PORT_UCHAR((PUCHAR)VGA_AC_WRITE, *Registers);
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Registers++;
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}
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/* Reset palette. */
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for (i = 0; i < 64; i++)
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{
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WRITE_PORT_UCHAR((PUCHAR)0x03c8, i);
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WRITE_PORT_UCHAR((PUCHAR)0x03c9, TextPalette[i][0]);
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WRITE_PORT_UCHAR((PUCHAR)0x03c9, TextPalette[i][1]);
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WRITE_PORT_UCHAR((PUCHAR)0x03c9, TextPalette[i][2]);
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}
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/* Lock 16-colour palette and unblank display. */
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(VOID)READ_PORT_UCHAR((PUCHAR)VGA_INSTAT_READ);
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WRITE_PORT_UCHAR((PUCHAR)VGA_AC_INDEX, 0x20);
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}
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/* PRIVATE FUNCTIONS ********************************************************/
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@ -200,16 +392,16 @@ HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock)
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/* read screen size from the crtc */
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/* FIXME: screen size should be read from the boot parameters */
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_COLUMNS);
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SizeX = READ_PORT_UCHAR((PUCHAR)CRTC_DATA) + 1;
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_ROWS);
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SizeY = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_OVERFLOW);
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Data = READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_COLUMNS);
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SizeX = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA) + 1;
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_ROWS);
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SizeY = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_OVERFLOW);
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Data = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA);
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SizeY |= (((Data & 0x02) << 7) | ((Data & 0x40) << 3));
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SizeY++;
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_SCANLINES);
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ScanLines = (READ_PORT_UCHAR((PUCHAR)CRTC_DATA) & 0x1F) + 1;
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_SCANLINES);
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ScanLines = (READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA) & 0x1F) + 1;
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SizeY = SizeY / ScanLines;
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#ifdef BOCHS_30ROWS
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@ -236,11 +428,21 @@ HalReleaseDisplayOwnership()
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if (HalOwnsDisplay == TRUE)
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return;
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if (HalResetDisplayParameters(SizeX, SizeY) == TRUE)
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if (!HalResetDisplayParameters(SizeX, SizeY))
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{
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HalOwnsDisplay = TRUE;
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HalClearDisplay(CHAR_ATTRIBUTE);
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if (SizeX == 80 && SizeY == 25)
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{
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HalSetDisplayMode(Text80x25Registers);
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}
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else
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{
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SizeX = 80;
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SizeY = 50;
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HalSetDisplayMode(Text80x50Registers);
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}
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}
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HalOwnsDisplay = TRUE;
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HalClearDisplay(CHAR_ATTRIBUTE);
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}
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@ -295,10 +497,10 @@ HalDisplayString(IN PCH String)
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#endif
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#ifdef SCREEN_SYNCHRONIZATION
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
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offset = READ_PORT_UCHAR((PUCHAR)CRTC_DATA)<<8;
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
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offset += READ_PORT_UCHAR((PUCHAR)CRTC_DATA);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_CURHI);
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offset = READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA)<<8;
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_CURLO);
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offset += READ_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA);
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CursorY = offset / SizeX;
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CursorX = offset % SizeX;
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@ -335,10 +537,10 @@ HalDisplayString(IN PCH String)
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#ifdef SCREEN_SYNCHRONIZATION
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offset = (CursorY * SizeX) + CursorX;
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURLO);
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WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, offset & 0xff);
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WRITE_PORT_UCHAR((PUCHAR)CRTC_COMMAND, CRTC_CURHI);
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WRITE_PORT_UCHAR((PUCHAR)CRTC_DATA, (offset >> 8) & 0xff);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_CURLO);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA, offset & 0xff);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_INDEX, CRTC_CURHI);
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WRITE_PORT_UCHAR((PUCHAR)VGA_CRTC_DATA, (offset >> 8) & 0xff);
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#endif
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KeReleaseSpinLockFromDpcLevel(&Lock);
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popfl(Flags);
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