mirror of
https://github.com/reactos/reactos.git
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[NTOSKRNL/AMD64]
Cleanup amd64 specific code svn path=/trunk/; revision=53827
This commit is contained in:
Timo Kreuzer
parent
f7125a502c
commit
d076d5b976
1 changed files with 110 additions and 432 deletions
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@ -20,10 +20,6 @@
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extern PMMPTE MmDebugPte;
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#endif
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VOID
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NTAPI
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HalInitializeBios(ULONG Unknown, PLOADER_PARAMETER_BLOCK LoaderBlock);
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/* GLOBALS *****************************************************************/
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/* Template PTE and PDE for a kernel page */
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@ -39,50 +35,16 @@ MMPTE PrototypePte = {{(MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS) |
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PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << PAGE_SHIFT)}};
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/* Sizes */
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///SIZE_T MmSessionSize = MI_SESSION_SIZE;
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extern SIZE_T MmSessionViewSize;
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extern SIZE_T MmSessionPoolSize;
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extern SIZE_T MmSessionImageSize;
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extern SIZE_T MmSystemViewSize;
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SIZE_T MiNonPagedSystemSize;
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/* Address ranges */
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//ULONG64 MmUserProbeAddress = 0x7FFFFFF0000ULL;
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//PVOID MmHighestUserAddress = (PVOID)0x7FFFFFEFFFFULL;
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//PVOID MmSystemRangeStart = (PVOID)0xFFFF080000000000ULL;
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PVOID MmSessionBase; // FFFFF90000000000 = MiSessionPoolStart
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PVOID MiSessionPoolStart; // FFFFF90000000000 = MiSessionPoolEnd - MmSessionPoolSize
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PVOID MiSessionPoolEnd; // = MiSessionViewStart
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PVOID MiSessionViewStart; // = MiSessionViewEnd - MmSessionViewSize
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PVOID MiSessionViewEnd; // FFFFF97FFF000000
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PVOID MiSessionImageStart; // ?FFFFF97FFF000000 = MiSessionImageEnd - MmSessionImageSize
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PVOID MiSessionImageEnd; // FFFFF98000000000 = MiSessionSpaceEnd
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PVOID MiSessionSpaceEnd = MI_SESSION_SPACE_END; // FFFFF98000000000
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PVOID MmSystemCacheStart; // FFFFF98000000000
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PVOID MmSystemCacheEnd; // FFFFFA8000000000
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/// PVOID MmPagedPoolStart = MI_PAGED_POOL_START; // FFFFFA8000000000
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PVOID MmPagedPoolEnd; // FFFFFAA000000000
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PVOID MiSystemViewStart;
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PVOID MmNonPagedSystemStart; // FFFFFAA000000000
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PVOID MmNonPagedPoolStart;
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PVOID MmNonPagedPoolExpansionStart;
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///PVOID MmNonPagedPoolEnd = MI_NONPAGED_POOL_END; // 0xFFFFFAE000000000
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PVOID MmHyperSpaceEnd = (PVOID)HYPER_SPACE_END;
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MMSUPPORT MmSystemCacheWs;
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PVOID MiSessionViewEnd;
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ULONG64 MxPfnSizeInBytes;
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PMEMORY_ALLOCATION_DESCRIPTOR MxFreeDescriptor;
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MEMORY_ALLOCATION_DESCRIPTOR MxOldFreeDescriptor;
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PFN_NUMBER MiSystemPages = 0;
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BOOLEAN MiIncludeType[LoaderMaximum];
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PFN_NUMBER MxFreePageBase;
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ULONG64 MxFreePageCount = 0;
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extern PFN_NUMBER MmSystemPageDirectory[PD_COUNT];
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BOOLEAN MiPfnsInitialized = FALSE;
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/* FUNCTIONS *****************************************************************/
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@ -92,6 +54,7 @@ NTAPI
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INIT_FUNCTION
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MiInitializeSessionSpaceLayout()
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{
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MmSessionSize = MI_SESSION_SIZE;
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MmSessionViewSize = MI_SESSION_VIEW_SIZE;
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MmSessionPoolSize = MI_SESSION_POOL_SIZE;
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MmSessionImageSize = MI_SESSION_IMAGE_SIZE;
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@ -128,189 +91,93 @@ MiInitializeSessionSpaceLayout()
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ASSERT(MmSessionBase <= MiSessionPoolStart);
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}
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ULONG
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NoDbgPrint(const char *Format, ...)
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{
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return 0;
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}
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PFN_NUMBER
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NTAPI
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MiEarlyAllocPage()
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{
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PFN_NUMBER Pfn;
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if (MiPfnsInitialized)
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{
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return MmAllocPage(MC_SYSTEM);
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}
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/* Make sure we have enough pages */
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if (!MxFreePageCount)
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{
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/* Crash the system */
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KeBugCheckEx(INSTALL_MORE_MEMORY,
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MmNumberOfPhysicalPages,
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MxFreeDescriptor->PageCount,
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MxOldFreeDescriptor.PageCount,
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1);
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}
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/* Use our lowest usable free pages */
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Pfn = MxFreePageBase;
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MxFreePageBase++;
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MxFreePageCount--;
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return Pfn;
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}
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PMMPTE
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NTAPI
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MxGetPte(PVOID Address)
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{
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PMMPTE Pte;
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MMPTE TmplPte;
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/* Setup template pte */
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TmplPte.u.Long = 0;
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TmplPte.u.Flush.Valid = 1;
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TmplPte.u.Flush.Write = 1;
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/* Get a pointer to the PXE */
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Pte = MiAddressToPxe(Address);
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if (!Pte->u.Hard.Valid)
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{
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/* It's not valid, map it! */
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TmplPte.u.Hard.PageFrameNumber = MiEarlyAllocPage();
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*Pte = TmplPte;
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/* Zero the page */
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RtlZeroMemory(MiPteToAddress(Pte), PAGE_SIZE);
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}
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/* Get a pointer to the PPE */
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Pte = MiAddressToPpe(Address);
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if (!Pte->u.Hard.Valid)
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{
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/* It's not valid, map it! */
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TmplPte.u.Hard.PageFrameNumber = MiEarlyAllocPage();
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*Pte = TmplPte;
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/* Zero the page */
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RtlZeroMemory(MiPteToAddress(Pte), PAGE_SIZE);
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}
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/* Get a pointer to the PDE */
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Pte = MiAddressToPde(Address);
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if (!Pte->u.Hard.Valid)
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{
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/* It's not valid, map it! */
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TmplPte.u.Hard.PageFrameNumber = MiEarlyAllocPage();
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*Pte = TmplPte;
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/* Zero the page */
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RtlZeroMemory(MiPteToAddress(Pte), PAGE_SIZE);
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}
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/* Get a pointer to the PTE */
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Pte = MiAddressToPte(Address);
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return Pte;
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}
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VOID
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NTAPI
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MxMapPage(PVOID Address)
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MiMapPPEs(
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PVOID StartAddress,
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PVOID EndAddress)
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{
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MMPTE TmplPte, *Pte;
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PMMPDE PointerPpe;
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MMPDE TmplPde = ValidKernelPde;
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/* Setup template pte */
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TmplPte.u.Long = 0;
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TmplPte.u.Flush.Valid = 1;
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TmplPte.u.Flush.Write = 1;
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TmplPte.u.Hard.PageFrameNumber = MiEarlyAllocPage();
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/* Get the PTE for that page */
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Pte = MxGetPte(Address);
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ASSERT(Pte->u.Hard.Valid == 0);
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/* Map a physical page */
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*Pte = TmplPte;
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}
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VOID
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MxMapPageRange(PVOID Address, ULONG64 PageCount)
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{
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while (PageCount--)
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/* Loop the PPEs */
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for (PointerPpe = MiAddressToPpe(StartAddress);
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PointerPpe <= MiAddressToPpe(EndAddress);
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PointerPpe++)
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{
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/* Map the page */
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MxMapPage(Address);
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/* Goto next page */
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Address = (PVOID)((ULONG64)Address + PAGE_SIZE);
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}
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}
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VOID
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NTAPI
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MiPreparePfnDatabse(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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PMEMORY_ALLOCATION_DESCRIPTOR Descriptor;
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PLIST_ENTRY ListEntry;
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PUCHAR Page, FirstPage;
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SIZE_T Size;
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/* Calculate the size of the PFN database and convert to pages */
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MxPfnSizeInBytes = ROUND_TO_PAGES((MmHighestPhysicalPage + 1) * sizeof(MMPFN));
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MxPfnAllocation = MxPfnSizeInBytes >> PAGE_SHIFT;
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/* Simply start at hardcoded address */
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MmPfnDatabase = MI_PFN_DATABASE;
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/* Loop the memory descriptors */
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for (ListEntry = LoaderBlock->MemoryDescriptorListHead.Flink;
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ListEntry != &LoaderBlock->MemoryDescriptorListHead;
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ListEntry = ListEntry->Flink)
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{
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/* Get the memory descriptor */
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Descriptor = CONTAINING_RECORD(ListEntry,
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MEMORY_ALLOCATION_DESCRIPTOR,
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ListEntry);
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/* Skip pages that are not part of the PFN database */
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if (MiIncludeType[Descriptor->MemoryType])
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/* Check if its already mapped */
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if (!PointerPpe->u.Hard.Valid)
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{
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/* Get the base and size of this pfn database entry */
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FirstPage = PAGE_ALIGN(&MmPfnDatabase[Descriptor->BasePage]);
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Size = ROUND_TO_PAGES(Descriptor->PageCount * sizeof(MMPFN));
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/* No, map it! */
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TmplPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
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*PointerPpe = TmplPde;
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/* Loop the pages of this Pfn database entry */
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for (Page = FirstPage; Page < FirstPage + Size; Page += PAGE_SIZE)
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{
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/* Is the page already mapped? */
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if (!MmIsAddressValid(Page))
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{
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/* It's not, map it now */
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MxMapPage(Page);
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RtlZeroMemory(Page, PAGE_SIZE);
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}
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}
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/* Zero out the pages */
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RtlZeroMemory(FirstPage, Size);
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/* Zero out the page table */
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RtlZeroMemory(MiPteToAddress(PointerPpe), PAGE_SIZE);
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}
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}
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}
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VOID
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NTAPI
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MiMapPDEs(
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PVOID StartAddress,
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PVOID EndAddress)
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{
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PMMPDE PointerPde;
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MMPDE TmplPde = ValidKernelPde;
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/* Loop the PDEs */
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for (PointerPde = MiAddressToPde(StartAddress);
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PointerPde <= MiAddressToPde(EndAddress);
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PointerPde++)
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{
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/* Check if its already mapped */
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if (!PointerPde->u.Hard.Valid)
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{
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/* No, map it! */
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TmplPde.u.Hard.PageFrameNumber = MxGetNextPage(1);
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*PointerPde = TmplPde;
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/* Zero out the page table */
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RtlZeroMemory(MiPteToAddress(PointerPde), PAGE_SIZE);
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}
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}
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}
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VOID
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NTAPI
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MiMapPTEs(
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PVOID StartAddress,
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PVOID EndAddress)
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{
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PMMPTE PointerPte;
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MMPTE TmplPte = ValidKernelPte;
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/* Loop the PTEs */
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for (PointerPte = MiAddressToPte(StartAddress);
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PointerPte <= MiAddressToPte(EndAddress);
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PointerPte++)
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{
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/* Check if its already mapped */
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if (!PointerPte->u.Hard.Valid)
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{
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/* No, map it! */
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TmplPte.u.Hard.PageFrameNumber = MxGetNextPage(1);
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*PointerPte = TmplPte;
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}
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}
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}
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VOID
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NTAPI
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INIT_FUNCTION
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MiInitializePageTable()
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{
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ULONG64 PxePhysicalAddress;
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MMPTE TmplPte, *Pte;
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MMPTE TmplPte, *PointerPxe;
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PFN_NUMBER PxePfn;
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/* HACK: don't use freeldr debug print anymore */
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//FrLdrDbgPrint = NoDbgPrint;
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/* Get current directory base */
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PxePfn = ((PMMPTE)PXE_SELFMAP)->u.Hard.PageFrameNumber;
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PxePhysicalAddress = PxePfn << PAGE_SHIFT;
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@ -327,12 +194,12 @@ MiInitializePageTable()
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__writemsr(X86_MSR_EFER, __readmsr(X86_MSR_EFER) | EFER_NXE);
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/* Loop the user mode PXEs */
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for (Pte = MiAddressToPxe(0);
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Pte <= MiAddressToPxe(MmHighestUserAddress);
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Pte++)
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for (PointerPxe = MiAddressToPxe(0);
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PointerPxe <= MiAddressToPxe(MmHighestUserAddress);
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PointerPxe++)
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{
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/* Zero the PXE, clear all mappings */
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Pte->u.Long = 0;
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PointerPxe->u.Long = 0;
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}
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/* Flush the TLB */
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@ -348,40 +215,44 @@ MiInitializePageTable()
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* skip page tables and hyperspace */
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/* Loop the PXEs */
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for (Pte = MiAddressToPxe((PVOID)(HYPER_SPACE_END + 1));
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Pte <= MiAddressToPxe(MI_HIGHEST_SYSTEM_ADDRESS);
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Pte++)
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for (PointerPxe = MiAddressToPxe((PVOID)(HYPER_SPACE_END + 1));
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PointerPxe <= MiAddressToPxe(MI_HIGHEST_SYSTEM_ADDRESS);
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PointerPxe++)
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{
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/* Is the PXE already valid? */
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if (!Pte->u.Hard.Valid)
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if (!PointerPxe->u.Hard.Valid)
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{
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/* It's not Initialize it */
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TmplPte.u.Flush.PageFrameNumber = MiEarlyAllocPage(0);
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*Pte = TmplPte;
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TmplPte.u.Flush.PageFrameNumber = MxGetNextPage(1);
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*PointerPxe = TmplPte;
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/* Zero the page. The PXE is the PTE for the PDPT. */
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RtlZeroMemory(MiPteToAddress(Pte), PAGE_SIZE);
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RtlZeroMemory(MiPteToAddress(PointerPxe), PAGE_SIZE);
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}
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}
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/* Setup the mapping PPEs and PDEs */
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MiMapPPEs((PVOID)MI_MAPPING_RANGE_START, (PVOID)MI_MAPPING_RANGE_END);
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MiMapPDEs((PVOID)MI_MAPPING_RANGE_START, (PVOID)MI_MAPPING_RANGE_END);
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/* Setup the mapping PTEs */
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MmFirstReservedMappingPte = MxGetPte((PVOID)MI_MAPPING_RANGE_START);
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MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
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MmFirstReservedMappingPte = MiAddressToPte((PVOID)MI_MAPPING_RANGE_START);
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MmLastReservedMappingPte = MiAddressToPte((PVOID)MI_MAPPING_RANGE_END);
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MmFirstReservedMappingPte->u.Hard.PageFrameNumber = MI_HYPERSPACE_PTES;
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#ifdef _WINKD_
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/* Setup debug mapping PTE */
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MmDebugPte = MxGetPte(MI_DEBUG_MAPPING);
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MiMapPPEs((PVOID)MI_DEBUG_MAPPING, (PVOID)MI_DEBUG_MAPPING);
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MiMapPDEs((PVOID)MI_DEBUG_MAPPING, (PVOID)MI_DEBUG_MAPPING);
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MmDebugPte = MiAddressToPte((PVOID)MI_DEBUG_MAPPING);
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#endif
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}
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VOID
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NTAPI
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INIT_FUNCTION
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MiBuildNonPagedPool(VOID)
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{
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PMMPTE Pte;
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PFN_COUNT PageCount;
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/* Check if this is a machine with less than 256MB of RAM, and no overide */
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if ((MmNumberOfPhysicalPages <= MI_MIN_PAGES_FOR_NONPAGED_POOL_TUNING) &&
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!(MmSizeOfNonPagedPoolInBytes))
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@ -459,18 +330,12 @@ MiBuildNonPagedPool(VOID)
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MmSizeOfNonPagedPoolInBytes;
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ASSERT(IS_PAGE_ALIGNED(MmNonPagedPoolExpansionStart));
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/* Map the nonpaged pool */
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PageCount = (PFN_COUNT)((MmSizeOfNonPagedPoolInBytes + PAGE_SIZE - 1) / PAGE_SIZE);
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MxMapPageRange(MmNonPagedPoolStart, PageCount);
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/* Map PPEs and PDEs for non paged pool (including expansion) */
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MiMapPPEs(MmNonPagedPoolStart, MmNonPagedPoolEnd);
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MiMapPDEs(MmNonPagedPoolStart, MmNonPagedPoolEnd);
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/* Loop the non paged pool extension PTEs */
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for (Pte = MiAddressToPte(MmNonPagedPoolExpansionStart);
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Pte <= MiAddressToPte(MmNonPagedPoolEnd);
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Pte++)
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{
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/* Create PXE, PPE, PDE and zero the PTE */
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MxGetPte(MiPteToAddress(Pte))->u.Long = 0;
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}
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/* Map the nonpaged pool PTEs (without expansion) */
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MiMapPTEs(MmNonPagedPoolStart, (PUCHAR)MmNonPagedPoolExpansionStart - 1);
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/* Initialize the ARM3 nonpaged pool */
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MiInitializeNonPagedPool();
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@ -481,9 +346,10 @@ MiBuildNonPagedPool(VOID)
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VOID
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NTAPI
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INIT_FUNCTION
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MiBuildSystemPteSpace()
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{
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PMMPTE Pte, StartPte, EndPte;
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PMMPTE PointerPte;
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/* Use the default numer of system PTEs */
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MmNumberOfSystemPtes = MI_NUMBER_SYSTEM_PTES;
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@ -507,20 +373,13 @@ MiBuildSystemPteSpace()
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ASSERT(MmNumberOfSystemPtes > 1000);
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}
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/* Set the range of system PTEs */
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StartPte = MiAddressToPte(MI_SYSTEM_PTE_START);
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EndPte = StartPte + MmNumberOfSystemPtes - 1;
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/* Loop the system PTEs */
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for (Pte = StartPte; Pte <= EndPte; Pte++)
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{
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/* Create PXE, PPE, PDE and zero the PTE */
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MxGetPte(MiPteToAddress(Pte))->u.Long = 0;
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}
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/* Map the PDEs and PPEs for the system PTEs */
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MiMapPPEs(MI_SYSTEM_PTE_START, MI_SYSTEM_PTE_END);
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MiMapPDEs(MI_SYSTEM_PTE_START, MI_SYSTEM_PTE_END);
|
||||
|
||||
/* Create the system PTE space */
|
||||
Pte = MiAddressToPte(MI_SYSTEM_PTE_START);
|
||||
MiInitializeSystemPtes(Pte, MmNumberOfSystemPtes, SystemPteSpace);
|
||||
PointerPte = MiAddressToPte(MI_SYSTEM_PTE_START);
|
||||
MiInitializeSystemPtes(PointerPte, MmNumberOfSystemPtes, SystemPteSpace);
|
||||
|
||||
/* Reserve system PTEs for zeroing PTEs and clear them */
|
||||
MiFirstReservedZeroingPte = MiReserveSystemPtes(MI_ZERO_PTES, SystemPteSpace);
|
||||
|
|
@ -530,200 +389,19 @@ MiBuildSystemPteSpace()
|
|||
MiFirstReservedZeroingPte->u.Hard.PageFrameNumber = MI_ZERO_PTES - 1;
|
||||
}
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
MiBuildPagedPool_x(VOID)
|
||||
{
|
||||
PMMPTE Pte;
|
||||
MMPTE TmplPte;
|
||||
ULONG Size, BitMapSize;
|
||||
|
||||
/* Default size for paged pool is 4 times non paged pool */
|
||||
MmSizeOfPagedPoolInBytes = 4 * MmMaximumNonPagedPoolInBytes;
|
||||
|
||||
/* Make sure it doesn't overflow */
|
||||
if (MmSizeOfPagedPoolInBytes > ((ULONG64)MmNonPagedSystemStart -
|
||||
(ULONG64)MmPagedPoolStart))
|
||||
{
|
||||
MmSizeOfPagedPoolInBytes = (ULONG64)MmNonPagedSystemStart -
|
||||
(ULONG64)MmPagedPoolStart;
|
||||
}
|
||||
|
||||
/* Make sure paged pool is big enough */
|
||||
if (MmSizeOfPagedPoolInBytes < MI_MIN_INIT_PAGED_POOLSIZE)
|
||||
{
|
||||
MmSizeOfPagedPoolInBytes = MI_MIN_INIT_PAGED_POOLSIZE;
|
||||
}
|
||||
|
||||
/* Align down to a PDE boundary */
|
||||
MmSizeOfPagedPoolInBytes = ROUND_DOWN(MmSizeOfPagedPoolInBytes,
|
||||
512 * PAGE_SIZE);
|
||||
MmSizeOfPagedPoolInPages = MmSizeOfPagedPoolInBytes >> PAGE_SHIFT;
|
||||
|
||||
/* This is where paged pool ends */
|
||||
MmPagedPoolEnd = (PCHAR)MmPagedPoolStart + MmSizeOfPagedPoolInBytes - 1;
|
||||
|
||||
/* Sanity check */
|
||||
ASSERT(MmPagedPoolEnd < MmNonPagedSystemStart);
|
||||
|
||||
/* setup a template PTE */
|
||||
TmplPte.u.Long = 0;
|
||||
TmplPte.u.Flush.Valid = 1;
|
||||
TmplPte.u.Flush.Write = 1;
|
||||
|
||||
/* Make sure the PXE is valid */
|
||||
Pte = MiAddressToPxe(MmPagedPoolStart);
|
||||
if (!Pte->u.Flush.Valid)
|
||||
{
|
||||
/* Map it! */
|
||||
TmplPte.u.Flush.PageFrameNumber = MmAllocPage(MC_SYSTEM);
|
||||
*Pte = TmplPte;
|
||||
}
|
||||
|
||||
/* Map all page directories (max 128) */
|
||||
for (Pte = MiAddressToPpe(MmPagedPoolStart);
|
||||
Pte <= MiAddressToPpe(MmPagedPoolEnd);
|
||||
Pte++)
|
||||
{
|
||||
if (!Pte->u.Flush.Valid)
|
||||
{
|
||||
/* Map it! */
|
||||
TmplPte.u.Flush.PageFrameNumber = MiEarlyAllocPage();
|
||||
*Pte = TmplPte;
|
||||
}
|
||||
}
|
||||
|
||||
/* Create and map the first PTE for paged pool */
|
||||
Pte = MxGetPte(MmPagedPoolStart);
|
||||
TmplPte.u.Flush.PageFrameNumber = MiEarlyAllocPage();
|
||||
*Pte = TmplPte;
|
||||
|
||||
/* Save the first and last paged pool PTE */
|
||||
MmPagedPoolInfo.FirstPteForPagedPool = MiAddressToPte(MmPagedPoolStart);
|
||||
MmPagedPoolInfo.LastPteForPagedPool = MiAddressToPte(MmPagedPoolEnd);
|
||||
MmPagedPoolInfo.NextPdeForPagedPoolExpansion = MiAddressToPde(MmPagedPoolStart) + 1;
|
||||
|
||||
// We keep track of each page via a bit, so check how big the bitmap will
|
||||
// have to be (make sure to align our page count such that it fits nicely
|
||||
// into a 4-byte aligned bitmap.
|
||||
|
||||
/* The size of the bitmap in bits is the size in pages */
|
||||
BitMapSize = (ULONG)MmSizeOfPagedPoolInPages;
|
||||
|
||||
/* Calculate buffer size in bytes, aligned to 32 bits */
|
||||
Size = sizeof(RTL_BITMAP) + ROUND_UP(BitMapSize, 32) / 8;
|
||||
|
||||
// Allocate the allocation bitmap, which tells us which regions have not yet
|
||||
// been mapped into memory
|
||||
|
||||
MmPagedPoolInfo.PagedPoolAllocationMap =
|
||||
ExAllocatePoolWithTag(NonPagedPool, Size, ' mM');
|
||||
ASSERT(MmPagedPoolInfo.PagedPoolAllocationMap);
|
||||
|
||||
// Initialize it such that at first, only the first page's worth of PTEs is
|
||||
// marked as allocated (incidentially, the first PDE we allocated earlier).
|
||||
RtlInitializeBitMap(MmPagedPoolInfo.PagedPoolAllocationMap,
|
||||
(PULONG)(MmPagedPoolInfo.PagedPoolAllocationMap + 1),
|
||||
BitMapSize);
|
||||
RtlSetAllBits(MmPagedPoolInfo.PagedPoolAllocationMap);
|
||||
RtlClearBits(MmPagedPoolInfo.PagedPoolAllocationMap, 0, 512);
|
||||
|
||||
// We have a second bitmap, which keeps track of where allocations end.
|
||||
// Given the allocation bitmap and a base address, we can therefore figure
|
||||
// out which page is the last page of that allocation, and thus how big the
|
||||
// entire allocation is.
|
||||
MmPagedPoolInfo.EndOfPagedPoolBitmap =
|
||||
ExAllocatePoolWithTag(NonPagedPool, Size, ' mM');
|
||||
ASSERT(MmPagedPoolInfo.EndOfPagedPoolBitmap);
|
||||
|
||||
/* Initialize the bitmap */
|
||||
RtlInitializeBitMap(MmPagedPoolInfo.EndOfPagedPoolBitmap,
|
||||
(PULONG)(MmPagedPoolInfo.EndOfPagedPoolBitmap + 1),
|
||||
BitMapSize);
|
||||
|
||||
/* No allocations, no allocation ends; clear all bits. */
|
||||
RtlClearAllBits(MmPagedPoolInfo.EndOfPagedPoolBitmap);
|
||||
|
||||
/* Initialize the paged pool mutex */
|
||||
KeInitializeGuardedMutex(&MmPagedPoolMutex);
|
||||
|
||||
/* Initialize the paged pool */
|
||||
InitializePool(PagedPool, 0);
|
||||
}
|
||||
|
||||
|
||||
NTSTATUS
|
||||
NTAPI
|
||||
MmArmInitSystem_x(IN ULONG Phase,
|
||||
IN PLOADER_PARAMETER_BLOCK LoaderBlock)
|
||||
INIT_FUNCTION
|
||||
MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
|
||||
{
|
||||
if (Phase == 0)
|
||||
{
|
||||
MmBootImageSize = KeLoaderBlock->Extension->LoaderPagesSpanned * PAGE_SIZE;
|
||||
MmBootImageSize = ROUND_UP(MmBootImageSize, PAGE_SIZE);
|
||||
|
||||
/* Parse memory descriptors, find free pages */
|
||||
//MiEvaluateMemoryDescriptors(LoaderBlock);
|
||||
MmHyperSpaceEnd = (PVOID)HYPER_SPACE_END;
|
||||
|
||||
/* Start PFN database at hardcoded address */
|
||||
MmPfnDatabase = MI_PFN_DATABASE;
|
||||
MiInitializePageTable();
|
||||
|
||||
/* Prepare PFN database mappings */
|
||||
MiPreparePfnDatabse(LoaderBlock);
|
||||
MiBuildNonPagedPool();
|
||||
|
||||
/* Initialize some mappings */
|
||||
MiInitializePageTable();
|
||||
|
||||
/* Update the memory descriptor, to make sure the pages we used
|
||||
won't get inserted into the PFN database */
|
||||
MxOldFreeDescriptor = *MxFreeDescriptor;
|
||||
MxFreeDescriptor->BasePage = MxFreePageBase;
|
||||
MxFreeDescriptor->PageCount = MxFreePageCount;
|
||||
}
|
||||
else if (Phase == 1)
|
||||
{
|
||||
/* The PFN database was created, restore the free descriptor */
|
||||
*MxFreeDescriptor = MxOldFreeDescriptor;
|
||||
|
||||
/* The pfn database is ready now */
|
||||
MiPfnsInitialized = TRUE;
|
||||
|
||||
/* Initialize the nonpaged pool */
|
||||
MiBuildNonPagedPool();
|
||||
|
||||
/* Initialize system PTE handling */
|
||||
MiBuildSystemPteSpace();
|
||||
|
||||
/* Build the physical memory block */
|
||||
//MiBuildPhysicalMemoryBlock(LoaderBlock);
|
||||
|
||||
/* Size up paged pool and build the shadow system page directory */
|
||||
//MiBuildPagedPool();
|
||||
|
||||
// This is the old stuff:
|
||||
//MmPagedPoolBase = (PVOID)((PCHAR)MmPagedPoolEnd + 1);
|
||||
//MmPagedPoolSize = MM_PAGED_POOL_SIZE;
|
||||
//ASSERT((PCHAR)MmPagedPoolBase + MmPagedPoolSize < (PCHAR)MmNonPagedSystemStart);
|
||||
|
||||
|
||||
HalInitializeBios(0, LoaderBlock);
|
||||
}
|
||||
MiBuildSystemPteSpace();
|
||||
|
||||
return STATUS_SUCCESS;
|
||||
}
|
||||
|
||||
VOID
|
||||
FASTCALL
|
||||
MiSyncARM3WithROS(IN PVOID AddressStart,
|
||||
IN PVOID AddressEnd)
|
||||
{
|
||||
|
||||
}
|
||||
|
||||
NTSTATUS
|
||||
NTAPI
|
||||
MiInitMachineDependent(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
|
||||
{
|
||||
UNIMPLEMENTED;
|
||||
return STATUS_NOT_IMPLEMENTED;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue