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Put inline functions into header files.

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svn path=/trunk/; revision=37921
This commit is contained in:
Dmitry Gorbachev 2008-12-07 23:40:23 +00:00
parent cdbca12bbb
commit c63a203efa
5 changed files with 85 additions and 92 deletions
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9
reactos/base/services/eventlog/eventlog.h
View file

@ -162,9 +162,9 @@ PBYTE LogfAllocAndBuildNewRecord(LPDWORD lpRecSize,
DWORD dwDataSize, DWORD dwDataSize,
LPVOID lpRawData); LPVOID lpRawData);
__inline void LogfFreeRecord(LPVOID Rec);
/* eventlog.c */ /* eventlog.c */
extern HANDLE MyHeap;
VOID PRINT_HEADER(PFILE_HEADER header); VOID PRINT_HEADER(PFILE_HEADER header);
VOID PRINT_RECORD(PEVENTLOGRECORD pRec); VOID PRINT_RECORD(PEVENTLOGRECORD pRec);
@ -185,4 +185,9 @@ NTSTATUS ProcessPortMessage(VOID);
/* rpc.c */ /* rpc.c */
DWORD WINAPI RpcThreadRoutine(LPVOID lpParameter); DWORD WINAPI RpcThreadRoutine(LPVOID lpParameter);
static __inline void LogfFreeRecord(LPVOID Rec)
{
HeapFree(MyHeap, 0, Rec);
}
#endif /* __EVENTLOG_H__ */ #endif /* __EVENTLOG_H__ */

6
reactos/base/services/eventlog/file.c
View file

@ -14,7 +14,6 @@
static LIST_ENTRY LogFileListHead; static LIST_ENTRY LogFileListHead;
static CRITICAL_SECTION LogFileListCs; static CRITICAL_SECTION LogFileListCs;
extern HANDLE MyHeap;
/* FUNCTIONS ****************************************************************/ /* FUNCTIONS ****************************************************************/
@ -898,8 +897,3 @@ PBYTE LogfAllocAndBuildNewRecord(LPDWORD lpRecSize,
*lpRecSize = dwRecSize; *lpRecSize = dwRecSize;
return Buffer; return Buffer;
} }
__inline void LogfFreeRecord(LPVOID Rec)
{
HeapFree(MyHeap, 0, Rec);
}

1
reactos/base/services/eventlog/logport.c
View file

@ -15,7 +15,6 @@
HANDLE ConnectPortHandle = NULL; HANDLE ConnectPortHandle = NULL;
HANDLE MessagePortHandle = NULL; HANDLE MessagePortHandle = NULL;
extern HANDLE MyHeap;
extern BOOL onLiveCD; extern BOOL onLiveCD;
/* FUNCTIONS ****************************************************************/ /* FUNCTIONS ****************************************************************/

94
reactos/hal/halx86/include/apic.h
View file

@ -93,10 +93,10 @@
#define APIC_LVT_VECTOR (0xFF << 0) /* Vector */ #define APIC_LVT_VECTOR (0xFF << 0) /* Vector */
#define APIC_LVT_DS (0x1 << 12) /* Delivery Status */ #define APIC_LVT_DS (0x1 << 12) /* Delivery Status */
#define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */ #define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */
#define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */ #define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */
#define APIC_LVT_MASKED (0x1 << 16) /* Mask */ #define APIC_LVT_MASKED (0x1 << 16) /* Mask */
#define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */ #define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */
#define APIC_LVT3_DM (0x7 << 8) #define APIC_LVT3_DM (0x7 << 8)
#define APIC_LVT3_IIPP (0x1 << 13) #define APIC_LVT3_IIPP (0x1 << 13)
@ -117,10 +117,10 @@
#define APIC_LVT_VECTOR (0xFF << 0) /* Vector */ #define APIC_LVT_VECTOR (0xFF << 0) /* Vector */
#define APIC_LVT_DS (0x1 << 12) /* Delivery Status */ #define APIC_LVT_DS (0x1 << 12) /* Delivery Status */
#define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */ #define APIC_LVT_REMOTE_IRR (0x1 << 14) /* Remote IRR */
#define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */ #define APIC_LVT_LEVEL_TRIGGER (0x1 << 15) /* Lvel Triggered */
#define APIC_LVT_MASKED (0x1 << 16) /* Mask */ #define APIC_LVT_MASKED (0x1 << 16) /* Mask */
#define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */ #define APIC_LVT_PERIODIC (0x1 << 17) /* Timer Mode */
#define APIC_LVT3_DM (0x7 << 8) #define APIC_LVT3_DM (0x7 << 8)
#define APIC_LVT3_IIPP (0x1 << 13) #define APIC_LVT3_IIPP (0x1 << 13)
@ -185,30 +185,92 @@ typedef struct _CPU_INFO
} CPU_INFO, *PCPU_INFO; } CPU_INFO, *PCPU_INFO;
extern ULONG CPUCount; /* Total number of CPUs */ extern ULONG CPUCount; /* Total number of CPUs */
extern ULONG BootCPU; /* Bootstrap processor */ extern ULONG BootCPU; /* Bootstrap processor */
extern ULONG OnlineCPUs; /* Bitmask of online CPUs */ extern ULONG OnlineCPUs; /* Bitmask of online CPUs */
extern CPU_INFO CPUMap[MAX_CPU]; /* Map of all CPUs in the system */ extern CPU_INFO CPUMap[MAX_CPU]; /* Map of all CPUs in the system */
extern PULONG APICBase; /* Virtual address of local APIC */
extern ULONG lastregr[MAX_CPU]; /* For debugging */
extern ULONG lastvalr[MAX_CPU];
extern ULONG lastregw[MAX_CPU];
extern ULONG lastvalw[MAX_CPU];
/* Prototypes */ /* Prototypes */
__inline VOID APICWrite(ULONG Offset, ULONG Value);
__inline ULONG APICRead(ULONG Offset);
VOID APICSendIPI(ULONG Target, ULONG Mode); VOID APICSendIPI(ULONG Target, ULONG Mode);
VOID APICSetup(VOID); VOID APICSetup(VOID);
VOID HaliInitBSP(VOID); VOID HaliInitBSP(VOID);
VOID APICSyncArbIDs(VOID); VOID APICSyncArbIDs(VOID);
__inline VOID APICSendEOI(VOID);
VOID APICCalibrateTimer(ULONG CPU); VOID APICCalibrateTimer(ULONG CPU);
VOID HaliStartApplicationProcessor(ULONG Cpu, ULONG Stack); VOID HaliStartApplicationProcessor(ULONG Cpu, ULONG Stack);
static __inline ULONG _APICRead(ULONG Offset)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
return *p;
}
#if 0
static __inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
*p = Value;
}
#else
static __inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
ULONG CPU = (_APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
lastregw[CPU] = Offset;
lastvalw[CPU] = Value;
p = (PULONG)((ULONG)APICBase + Offset);
*p = Value;
}
#endif
#if 0
static __inline ULONG APICRead(ULONG Offset)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
return *p;
}
#else
static __inline ULONG APICRead(ULONG Offset)
{
PULONG p;
ULONG CPU = (_APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
lastregr[CPU] = Offset;
lastvalr[CPU] = 0;
p = (PULONG)((ULONG)APICBase + Offset);
lastvalr[CPU] = *p;
return lastvalr[CPU];
}
#endif
static __inline ULONG ThisCPU(VOID) static __inline ULONG ThisCPU(VOID)
{ {
return (APICRead(APIC_ID) & APIC_ID_MASK) >> 24; return (APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
} }
static __inline VOID APICSendEOI(VOID)
{
// Send the EOI
APICWrite(APIC_EOI, 0);
}
#endif #endif /* __INTERNAL_HAL_APIC_H */
/* EOF */ /* EOF */

67
reactos/hal/halx86/mp/apic.c
View file

@ -223,72 +223,6 @@ VOID APICDisable(VOID)
APICWrite(APIC_SIVR, tmp); APICWrite(APIC_SIVR, tmp);
} }
__inline ULONG _APICRead(ULONG Offset)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
return *p;
}
#if 0
__inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
*p = Value;
}
#else
__inline VOID APICWrite(ULONG Offset,
ULONG Value)
{
PULONG p;
ULONG CPU = (_APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
lastregw[CPU] = Offset;
lastvalw[CPU] = Value;
p = (PULONG)((ULONG)APICBase + Offset);
*p = Value;
}
#endif
#if 0
__inline ULONG APICRead(ULONG Offset)
{
PULONG p;
p = (PULONG)((ULONG)APICBase + Offset);
return *p;
}
#else
__inline ULONG APICRead(ULONG Offset)
{
PULONG p;
ULONG CPU = (_APICRead(APIC_ID) & APIC_ID_MASK) >> 24;
lastregr[CPU] = Offset;
lastvalr[CPU] = 0;
p = (PULONG)((ULONG)APICBase + Offset);
lastvalr[CPU] = *p;
return lastvalr[CPU];
}
#endif
__inline VOID APICSendEOI(VOID)
{
// Send the EOI
APICWrite(APIC_EOI, 0);
}
static VOID APICDumpBit(ULONG base) static VOID APICDumpBit(ULONG base)
{ {
ULONG v, i, j; ULONG v, i, j;
@ -319,7 +253,6 @@ VOID APICDump(VOID)
ULONG CPU = ThisCPU();; ULONG CPU = ThisCPU();;
r1 = lastregr[CPU]; r1 = lastregr[CPU];
r2 = lastvalr[CPU]; r2 = lastvalr[CPU];
w1 = lastregw[CPU]; w1 = lastregw[CPU];