mirror of
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Required changes to meet community coding style.
svn path=/branches/GSoC_2016/AHCI/; revision=71500
This commit is contained in:
Aman Priyadarshi
parent
a60737f997
commit
c62ab931ac
3 changed files with 292 additions and 260 deletions
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@ -2,7 +2,7 @@ TARGETNAME = storahci
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TARGETTYPE = MINIPORT
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TARGETTYPE = MINIPORT
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TARGETLIBS=$(DDK_LIB_PATH)\storport.lib
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TARGETLIBS=$(DDK_LIB_PATH)\storport.lib
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INCLUDES = %BUILD%\inc
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INCLUDES = %BUILD%\inc
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LIBS = %BUILD%\lib
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LIBS = %BUILD%\lib
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SOURCES = storahci.c
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SOURCES = storahci.c
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@ -1,231 +1,263 @@
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/*
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* PROJECT: ReactOS Kernel
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* LICENSE: GNU GPLv2 only as published by the Free Software Foundation
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* PURPOSE: To Implement AHCI Miniport driver targeting storport NT 5.2
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* PROGRAMMERS: Aman Priyadarshi (aman.eureka@gmail.com)
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*/
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#include "storahci.h"
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#include "storahci.h"
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BOOLEAN AhciAdapterReset(
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BOOLEAN AhciAdapterReset(
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__in PAHCI_ADAPTER_EXTENSION adapterExtension
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__in PAHCI_ADAPTER_EXTENSION adapterExtension
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);
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);
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/**
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* @name AhciFindAdapter
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* @implemented
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*
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* The HwStorFindAdapter routine uses the supplied configuration to determine whether a specific
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* HBA is supported and, if it is, to return configuration information about that adapter.
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*
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* 10.1 Platform Communication
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* http://www.intel.in/content/dam/www/public/us/en/documents/technical-specifications/serial-ata-ahci-spec-rev1_2.pdf
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* @param DeviceExtension
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* @param HwContext
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* @param BusInformation
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* @param ArgumentString
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* @param ConfigInfo
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* @param Reserved3
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*
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* @return
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* SP_RETURN_FOUND
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* Indicates that a supported HBA was found and that the HBA-relevant configuration information was successfully determined and set in the PORT_CONFIGURATION_INFORMATION structure.
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*
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* SP_RETURN_ERROR
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* Indicates that an HBA was found but there was an error obtaining the configuration information. If possible, such an error should be logged with StorPortLogError.
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*
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* SP_RETURN_BAD_CONFIG
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* Indicates that the supplied configuration information was invalid for the adapter.
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*
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* SP_RETURN_NOT_FOUND
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* Indicates that no supported HBA was found for the supplied configuration information.
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*
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* @remarks Called by Storport.
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*/
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ULONG AhciFindAdapter(
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ULONG AhciFindAdapter(
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IN PVOID DeviceExtension,
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IN PVOID DeviceExtension,
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__in PVOID HwContext,
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__in PVOID HwContext,
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__in PVOID BusInformation,
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__in PVOID BusInformation,
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__in IN PVOID ArgumentString,
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__in IN PVOID ArgumentString,
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__inout PPORT_CONFIGURATION_INFORMATION ConfigInfo,
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__inout PPORT_CONFIGURATION_INFORMATION ConfigInfo,
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__in PBOOLEAN Reserved3
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__in PBOOLEAN Reserved3
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)
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)
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{
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{
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/* Description :
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ULONG ghc;
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* The HwStorFindAdapter routine uses the supplied configuration to determine whether a specific
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ULONG portCount, portImplemented;
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* HBA is supported and, if it is, to return configuration information about that adapter.
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ULONG pci_cfg_len;
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*
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UCHAR pci_cfg_buf[0x30];
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* Refernce:
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* 10.1 Platform Communication
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* http://www.intel.in/content/dam/www/public/us/en/documents/technical-specifications/serial-ata-ahci-spec-rev1_2.pdf
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*
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* Return Value:
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* SP_RETURN_FOUND
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* Indicates that a supported HBA was found and that the HBA-relevant configuration information was successfully determined and set in the PORT_CONFIGURATION_INFORMATION structure.
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*
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* SP_RETURN_ERROR
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* Indicates that an HBA was found but there was an error obtaining the configuration information. If possible, such an error should be logged with StorPortLogError.
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*
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* SP_RETURN_BAD_CONFIG
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* Indicates that the supplied configuration information was invalid for the adapter.
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*
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* SP_RETURN_NOT_FOUND
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* Indicates that no supported HBA was found for the supplied configuration information.
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*/
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ULONG ghc;
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ULONG portCount, portImplemented;
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ULONG pci_cfg_len;
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UCHAR pci_cfg_buf[0x30];
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PAHCI_MEMORY_REGISTERS abar;
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PPCI_COMMON_CONFIG pciConfigData;
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PAHCI_ADAPTER_EXTENSION adapterExtension;
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adapterExtension = (PAHCI_ADAPTER_EXTENSION)DeviceExtension;
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adapterExtension->SlotNumber = ConfigInfo->SlotNumber;
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adapterExtension->SystemIoBusNumber = ConfigInfo->SystemIoBusNumber;
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// get PCI configuration header
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pci_cfg_len = StorPortGetBusData(
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adapterExtension,
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PCIConfiguration,
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adapterExtension->SystemIoBusNumber,
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adapterExtension->SlotNumber,
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(PVOID)pci_cfg_buf,
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(ULONG)0x30);
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if (pci_cfg_len != 0x30)
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return SP_RETURN_ERROR;//Not a valid device at the given bus number
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pciConfigData = (PPCI_COMMON_CONFIG)pci_cfg_buf;
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adapterExtension->VendorID = pciConfigData->VendorID;
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adapterExtension->DeviceID = pciConfigData->DeviceID;
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adapterExtension->RevisionID = pciConfigData->RevisionID;
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// The last PCI base address register (BAR[5], header offset 0x24) points to the AHCI base memory, it’s called ABAR (AHCI Base Memory Register).
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adapterExtension->AhciBaseAddress = pciConfigData->u.type0.BaseAddresses[5] & (0xFFFFFFF0);
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// 2.1.11
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abar = NULL;
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if (ConfigInfo->NumberOfAccessRanges > 0)
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{
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ULONG accessIndex;
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for (accessIndex = 0; accessIndex < ConfigInfo->NumberOfAccessRanges; accessIndex++)
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{
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if ((*(ConfigInfo->AccessRanges))[accessIndex].RangeStart.QuadPart == adapterExtension->AhciBaseAddress)
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{
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abar = (PAHCI_MEMORY_REGISTERS)StorPortGetDeviceBase(
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adapterExtension,
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ConfigInfo->AdapterInterfaceType,
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ConfigInfo->SystemIoBusNumber,
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(*(ConfigInfo->AccessRanges))[accessIndex].RangeStart,
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(*(ConfigInfo->AccessRanges))[accessIndex].RangeLength,
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(BOOLEAN)!(*(ConfigInfo->AccessRanges))[accessIndex].RangeInMemory);
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break;
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}
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}
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}
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if (abar == NULL)
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return SP_RETURN_ERROR; // corrupted information supplied
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adapterExtension->ABAR_Address = abar;
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adapterExtension->CAP = StorPortReadRegisterUlong(adapterExtension, &abar->CAP);
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adapterExtension->CAP2 = StorPortReadRegisterUlong(adapterExtension, &abar->CAP2);
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adapterExtension->Version = StorPortReadRegisterUlong(adapterExtension, &abar->VS);
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// 10.1.2
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// 1. Indicate that system software is AHCI aware by setting GHC.AE to ‘1’.
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ghc = StorPortReadRegisterUlong(adapterExtension, &abar->GHC);
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// AE := Highest Significant bit of GHC
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if ((ghc & (0x1<<31)) == 1)//Hmm, controller was already in power state
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{
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// reset controller to have it in know state
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DebugPrint("AhciFindAdapter -> AE Already set, Reset()\n");
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if (!AhciAdapterReset(adapterExtension))
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return SP_RETURN_ERROR;// reset failed
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}
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ghc = 0x1<<31;// only AE=1
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StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
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adapterExtension->IS = abar->IS;
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adapterExtension->PortImplemented = StorPortReadRegisterUlong(adapterExtension, &abar->PI);
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if (adapterExtension->PortImplemented == 0)
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return SP_RETURN_ERROR;
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// get port count -- Number of set bits in `adapterExtension->PortImplemented`
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portCount = 0;
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portImplemented = adapterExtension->PortImplemented;
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while(portImplemented > 0)
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{
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portCount++;
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portImplemented &= (portImplemented - 1);// i love playing with bits :D
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}
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ConfigInfo->MaximumTransferLength = 128 * 1024;//128 KB
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ConfigInfo->NumberOfPhysicalBreaks = 0x21;
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ConfigInfo->MaximumNumberOfTargets = 1;
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ConfigInfo->MaximumNumberOfLogicalUnits = 1;
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ConfigInfo->ResetTargetSupported = TRUE;
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ConfigInfo->NumberOfBuses = 32;
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ConfigInfo->SynchronizationModel = StorSynchronizeFullDuplex;
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ConfigInfo->ScatterGather = TRUE;
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// Turn IE -- Interrupt Enabled
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ghc |= 0x2;
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StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
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return SP_RETURN_FOUND;
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}// -- AhciFindAdapter();
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ULONG DriverEntry(
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IN PVOID DriverObject,
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IN PVOID RegistryPath
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)
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{
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/*
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* Description :
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* Initial Entrypoint for storahci miniport driver
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*/
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HW_INITIALIZATION_DATA hwInitializationData;
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ULONG i, status;
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DebugPrint("Storahci -> DriverEntry()\n");
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// initialize the hardware data structure
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for (i = 0; i < sizeof(HW_INITIALIZATION_DATA); i++)
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((PUCHAR)&hwInitializationData)[i] = 0;
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// set size of hardware initialization structure
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hwInitializationData.HwInitializationDataSize = sizeof(HW_INITIALIZATION_DATA);
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// identity required miniport entry point routines
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hwInitializationData.HwFindAdapter = AhciFindAdapter;
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// adapter specific information
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hwInitializationData.NeedPhysicalAddresses = TRUE;
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hwInitializationData.TaggedQueuing = TRUE;
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hwInitializationData.AutoRequestSense = TRUE;
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hwInitializationData.MultipleRequestPerLu = TRUE;
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hwInitializationData.NumberOfAccessRanges = 6;
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hwInitializationData.AdapterInterfaceType = PCIBus;
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hwInitializationData.MapBuffers = STOR_MAP_NON_READ_WRITE_BUFFERS;
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// set required extension sizes
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hwInitializationData.SrbExtensionSize = sizeof(AHCI_SRB_EXTENSION);
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hwInitializationData.DeviceExtensionSize = sizeof(AHCI_ADAPTER_EXTENSION);
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// register our hw init data
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PAHCI_MEMORY_REGISTERS abar;
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status = StorPortInitialize(
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PPCI_COMMON_CONFIG pciConfigData;
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DriverObject,
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PAHCI_ADAPTER_EXTENSION adapterExtension;
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RegistryPath,
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&hwInitializationData,
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adapterExtension = (PAHCI_ADAPTER_EXTENSION)DeviceExtension;
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NULL);
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adapterExtension->SlotNumber = ConfigInfo->SlotNumber;
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adapterExtension->SystemIoBusNumber = ConfigInfo->SystemIoBusNumber;
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// get PCI configuration header
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pci_cfg_len = StorPortGetBusData(
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adapterExtension,
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PCIConfiguration,
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adapterExtension->SystemIoBusNumber,
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adapterExtension->SlotNumber,
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(PVOID)pci_cfg_buf,
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(ULONG)0x30);
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if (pci_cfg_len != 0x30)
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return SP_RETURN_ERROR;//Not a valid device at the given bus number
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pciConfigData = (PPCI_COMMON_CONFIG)pci_cfg_buf;
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adapterExtension->VendorID = pciConfigData->VendorID;
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adapterExtension->DeviceID = pciConfigData->DeviceID;
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adapterExtension->RevisionID = pciConfigData->RevisionID;
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// The last PCI base address register (BAR[5], header offset 0x24) points to the AHCI base memory, it’s called ABAR (AHCI Base Memory Register).
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adapterExtension->AhciBaseAddress = pciConfigData->u.type0.BaseAddresses[5] & (0xFFFFFFF0);
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// 2.1.11
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abar = NULL;
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if (ConfigInfo->NumberOfAccessRanges > 0)
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{
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ULONG accessIndex;
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for (accessIndex = 0; accessIndex < ConfigInfo->NumberOfAccessRanges; accessIndex++)
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{
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if ((*(ConfigInfo->AccessRanges))[accessIndex].RangeStart.QuadPart == adapterExtension->AhciBaseAddress)
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{
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abar = (PAHCI_MEMORY_REGISTERS)StorPortGetDeviceBase(
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adapterExtension,
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ConfigInfo->AdapterInterfaceType,
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ConfigInfo->SystemIoBusNumber,
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(*(ConfigInfo->AccessRanges))[accessIndex].RangeStart,
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(*(ConfigInfo->AccessRanges))[accessIndex].RangeLength,
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(BOOLEAN)!(*(ConfigInfo->AccessRanges))[accessIndex].RangeInMemory);
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break;
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}
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}
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}
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if (abar == NULL)
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return SP_RETURN_ERROR; // corrupted information supplied
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adapterExtension->ABAR_Address = abar;
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adapterExtension->CAP = StorPortReadRegisterUlong(adapterExtension, &abar->CAP);
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adapterExtension->CAP2 = StorPortReadRegisterUlong(adapterExtension, &abar->CAP2);
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adapterExtension->Version = StorPortReadRegisterUlong(adapterExtension, &abar->VS);
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// 10.1.2
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// 1. Indicate that system software is AHCI aware by setting GHC.AE to ‘1’.
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ghc = StorPortReadRegisterUlong(adapterExtension, &abar->GHC);
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// AE := Highest Significant bit of GHC
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if ((ghc & (0x1<<31)) == 1)//Hmm, controller was already in power state
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{
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// reset controller to have it in know state
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DebugPrint("AhciFindAdapter -> AE Already set, Reset()\n");
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if (!AhciAdapterReset(adapterExtension))
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return SP_RETURN_ERROR;// reset failed
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}
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ghc = 0x1<<31;// only AE=1
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StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
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adapterExtension->IS = abar->IS;
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adapterExtension->PortImplemented = StorPortReadRegisterUlong(adapterExtension, &abar->PI);
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if (adapterExtension->PortImplemented == 0)
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return SP_RETURN_ERROR;
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// get port count -- Number of set bits in `adapterExtension->PortImplemented`
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portCount = 0;
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portImplemented = adapterExtension->PortImplemented;
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while(portImplemented > 0)
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{
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portCount++;
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portImplemented &= (portImplemented - 1);// i love playing with bits :D
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}
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ConfigInfo->MaximumTransferLength = 128 * 1024;//128 KB
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ConfigInfo->NumberOfPhysicalBreaks = 0x21;
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ConfigInfo->MaximumNumberOfTargets = 1;
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ConfigInfo->MaximumNumberOfLogicalUnits = 1;
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ConfigInfo->ResetTargetSupported = TRUE;
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ConfigInfo->NumberOfBuses = 32;
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ConfigInfo->SynchronizationModel = StorSynchronizeFullDuplex;
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ConfigInfo->ScatterGather = TRUE;
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// Turn IE -- Interrupt Enabled
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ghc |= 0x2;
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StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
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return SP_RETURN_FOUND;
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}// -- AhciFindAdapter();
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/**
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* @name DriverEntry
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* @implemented
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*
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* Initial Entrypoint for storahci miniport driver
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*
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* @param DriverObject
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* @param RegistryPath
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*
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* @return
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* NT_STATUS in case of driver loaded successfully.
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*/
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ULONG DriverEntry(
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IN PVOID DriverObject,
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IN PVOID RegistryPath
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)
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{
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HW_INITIALIZATION_DATA hwInitializationData;
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ULONG i, status;
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DebugPrint("Storahci -> DriverEntry()\n");
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// initialize the hardware data structure
|
||||||
|
for (i = 0; i < sizeof(HW_INITIALIZATION_DATA); i++)
|
||||||
|
((PUCHAR)&hwInitializationData)[i] = 0;
|
||||||
|
|
||||||
|
// set size of hardware initialization structure
|
||||||
|
hwInitializationData.HwInitializationDataSize = sizeof(HW_INITIALIZATION_DATA);
|
||||||
|
|
||||||
|
// identity required miniport entry point routines
|
||||||
|
hwInitializationData.HwFindAdapter = AhciFindAdapter;
|
||||||
|
|
||||||
|
// adapter specific information
|
||||||
|
hwInitializationData.NeedPhysicalAddresses = TRUE;
|
||||||
|
hwInitializationData.TaggedQueuing = TRUE;
|
||||||
|
hwInitializationData.AutoRequestSense = TRUE;
|
||||||
|
hwInitializationData.MultipleRequestPerLu = TRUE;
|
||||||
|
|
||||||
|
hwInitializationData.NumberOfAccessRanges = 6;
|
||||||
|
hwInitializationData.AdapterInterfaceType = PCIBus;
|
||||||
|
hwInitializationData.MapBuffers = STOR_MAP_NON_READ_WRITE_BUFFERS;
|
||||||
|
|
||||||
|
// set required extension sizes
|
||||||
|
hwInitializationData.SrbExtensionSize = sizeof(AHCI_SRB_EXTENSION);
|
||||||
|
hwInitializationData.DeviceExtensionSize = sizeof(AHCI_ADAPTER_EXTENSION);
|
||||||
|
|
||||||
|
// register our hw init data
|
||||||
|
status = StorPortInitialize(
|
||||||
|
DriverObject,
|
||||||
|
RegistryPath,
|
||||||
|
&hwInitializationData,
|
||||||
|
NULL);
|
||||||
|
|
||||||
return status;
|
return status;
|
||||||
}// -- DriverEntry();
|
}// -- DriverEntry();
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @name AhciAdapterReset
|
||||||
|
* @implemented
|
||||||
|
*
|
||||||
|
* 10.4.3 HBA Reset
|
||||||
|
* If the HBA becomes unusable for multiple ports, and a software reset or port reset does not correct the
|
||||||
|
* problem, software may reset the entire HBA by setting GHC.HR to ‘1’. When software sets the GHC.HR
|
||||||
|
* bit to ‘1’, the HBA shall perform an internal reset action. The bit shall be cleared to ‘0’ by the HBA when
|
||||||
|
* the reset is complete. A software write of ‘0’ to GHC.HR shall have no effect. To perform the HBA reset,
|
||||||
|
* software sets GHC.HR to ‘1’ and may poll until this bit is read to be ‘0’, at which point software knows that
|
||||||
|
* the HBA reset has completed.
|
||||||
|
* If the HBA has not cleared GHC.HR to ‘0’ within 1 second of software setting GHC.HR to ‘1’, the HBA is in
|
||||||
|
* a hung or locked state.
|
||||||
|
*
|
||||||
|
* @param adapterExtension
|
||||||
|
*
|
||||||
|
* @return
|
||||||
|
* TRUE in case AHCI Controller RESTARTED successfully. i.e GHC.HR == 0
|
||||||
|
*/
|
||||||
BOOLEAN AhciAdapterReset(
|
BOOLEAN AhciAdapterReset(
|
||||||
PAHCI_ADAPTER_EXTENSION adapterExtension
|
PAHCI_ADAPTER_EXTENSION adapterExtension
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
/*
|
ULONG ghc, ticks;
|
||||||
* 10.4.3 HBA Reset
|
PAHCI_MEMORY_REGISTERS abar = NULL;
|
||||||
* If the HBA becomes unusable for multiple ports, and a software reset or port reset does not correct the
|
|
||||||
* problem, software may reset the entire HBA by setting GHC.HR to ‘1’. When software sets the GHC.HR
|
|
||||||
* bit to ‘1’, the HBA shall perform an internal reset action. The bit shall be cleared to ‘0’ by the HBA when
|
|
||||||
* the reset is complete. A software write of ‘0’ to GHC.HR shall have no effect. To perform the HBA reset,
|
|
||||||
* software sets GHC.HR to ‘1’ and may poll until this bit is read to be ‘0’, at which point software knows that
|
|
||||||
* the HBA reset has completed.
|
|
||||||
* If the HBA has not cleared GHC.HR to ‘0’ within 1 second of software setting GHC.HR to ‘1’, the HBA is in
|
|
||||||
* a hung or locked state.
|
|
||||||
*/
|
|
||||||
ULONG ghc, ticks;
|
|
||||||
PAHCI_MEMORY_REGISTERS abar = NULL;
|
|
||||||
|
|
||||||
abar = adapterExtension->ABAR_Address;
|
abar = adapterExtension->ABAR_Address;
|
||||||
|
|
||||||
if (abar == NULL) // basic sanity
|
if (abar == NULL) // basic sanity
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
// HR -- Very first bit (lowest significant)
|
// HR -- Very first bit (lowest significant)
|
||||||
ghc = 1;
|
ghc = 1;
|
||||||
StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
|
StorPortWriteRegisterUlong(adapterExtension, &abar->GHC, ghc);
|
||||||
|
|
||||||
for (ticks = 0; (ticks < 50) &&
|
for (ticks = 0; (ticks < 50) &&
|
||||||
(StorPortReadRegisterUlong(adapterExtension, &abar->GHC) == 1);
|
(StorPortReadRegisterUlong(adapterExtension, &abar->GHC) == 1);
|
||||||
StorPortStallExecution(20000), ticks++);
|
StorPortStallExecution(20000), ticks++);
|
||||||
|
|
||||||
if (ticks == 50)//1 second
|
if (ticks == 50)//1 second
|
||||||
return FALSE;
|
return FALSE;
|
||||||
|
|
||||||
return TRUE;
|
return TRUE;
|
||||||
}// -- AhciAdapterReset();
|
}// -- AhciAdapterReset();
|
||||||
|
|
|
||||||
|
|
@ -3,72 +3,72 @@
|
||||||
|
|
||||||
typedef struct _AHCI_PORT
|
typedef struct _AHCI_PORT
|
||||||
{
|
{
|
||||||
ULONG CLB; // 0x00, command list base address, 1K-byte aligned
|
ULONG CLB; // 0x00, command list base address, 1K-byte aligned
|
||||||
ULONG CLBU; // 0x04, command list base address upper 32 bits
|
ULONG CLBU; // 0x04, command list base address upper 32 bits
|
||||||
ULONG FB; // 0x08, FIS base address, 256-byte aligned
|
ULONG FB; // 0x08, FIS base address, 256-byte aligned
|
||||||
ULONG FBU; // 0x0C, FIS base address upper 32 bits
|
ULONG FBU; // 0x0C, FIS base address upper 32 bits
|
||||||
ULONG IS; // 0x10, interrupt status
|
ULONG IS; // 0x10, interrupt status
|
||||||
ULONG IE; // 0x14, interrupt enable
|
ULONG IE; // 0x14, interrupt enable
|
||||||
ULONG CMD; // 0x18, command and status
|
ULONG CMD; // 0x18, command and status
|
||||||
ULONG RSV0; // 0x1C, Reserved
|
ULONG RSV0; // 0x1C, Reserved
|
||||||
ULONG TFD; // 0x20, task file data
|
ULONG TFD; // 0x20, task file data
|
||||||
ULONG SIG; // 0x24, signature
|
ULONG SIG; // 0x24, signature
|
||||||
ULONG SSTS; // 0x28, SATA status (SCR0:SStatus)
|
ULONG SSTS; // 0x28, SATA status (SCR0:SStatus)
|
||||||
ULONG SCTL; // 0x2C, SATA control (SCR2:SControl)
|
ULONG SCTL; // 0x2C, SATA control (SCR2:SControl)
|
||||||
ULONG SERR; // 0x30, SATA error (SCR1:SError)
|
ULONG SERR; // 0x30, SATA error (SCR1:SError)
|
||||||
ULONG SACT; // 0x34, SATA active (SCR3:SActive)
|
ULONG SACT; // 0x34, SATA active (SCR3:SActive)
|
||||||
ULONG CI; // 0x38, command issue
|
ULONG CI; // 0x38, command issue
|
||||||
ULONG SNTF; // 0x3C, SATA notification (SCR4:SNotification)
|
ULONG SNTF; // 0x3C, SATA notification (SCR4:SNotification)
|
||||||
ULONG FBS; // 0x40, FIS-based switch control
|
ULONG FBS; // 0x40, FIS-based switch control
|
||||||
ULONG RSV1[11]; // 0x44 ~ 0x6F, Reserved
|
ULONG RSV1[11]; // 0x44 ~ 0x6F, Reserved
|
||||||
ULONG Vendor[4]; // 0x70 ~ 0x7F, vendor specific
|
ULONG Vendor[4]; // 0x70 ~ 0x7F, vendor specific
|
||||||
} AHCI_PORT;
|
} AHCI_PORT;
|
||||||
|
|
||||||
typedef struct _AHCI_MEMORY_REGISTERS
|
typedef struct _AHCI_MEMORY_REGISTERS
|
||||||
{
|
{
|
||||||
// 0x00 - 0x2B, Generic Host Control
|
// 0x00 - 0x2B, Generic Host Control
|
||||||
ULONG CAP; // 0x00, Host capability
|
ULONG CAP; // 0x00, Host capability
|
||||||
ULONG GHC; // 0x04, Global host control
|
ULONG GHC; // 0x04, Global host control
|
||||||
ULONG IS; // 0x08, Interrupt status
|
ULONG IS; // 0x08, Interrupt status
|
||||||
ULONG PI; // 0x0C, Port implemented
|
ULONG PI; // 0x0C, Port implemented
|
||||||
ULONG VS; // 0x10, Version
|
ULONG VS; // 0x10, Version
|
||||||
ULONG CCC_CTL; // 0x14, Command completion coalescing control
|
ULONG CCC_CTL; // 0x14, Command completion coalescing control
|
||||||
ULONG CCC_PTS; // 0x18, Command completion coalescing ports
|
ULONG CCC_PTS; // 0x18, Command completion coalescing ports
|
||||||
ULONG EM_LOC; // 0x1C, Enclosure management location
|
ULONG EM_LOC; // 0x1C, Enclosure management location
|
||||||
ULONG EM_CTL; // 0x20, Enclosure management control
|
ULONG EM_CTL; // 0x20, Enclosure management control
|
||||||
ULONG CAP2; // 0x24, Host capabilities extended
|
ULONG CAP2; // 0x24, Host capabilities extended
|
||||||
ULONG BOHC; // 0x28, BIOS/OS handoff control and status
|
ULONG BOHC; // 0x28, BIOS/OS handoff control and status
|
||||||
|
|
||||||
// 0x2C - 0x9F, Reserved
|
// 0x2C - 0x9F, Reserved
|
||||||
ULONG Reserved[0xA0-0x2C];
|
ULONG Reserved[0xA0-0x2C];
|
||||||
|
|
||||||
// 0xA0 - 0xFF, Vendor specific registers
|
// 0xA0 - 0xFF, Vendor specific registers
|
||||||
ULONG VendorSpecific[0x100-0xA0];
|
ULONG VendorSpecific[0x100-0xA0];
|
||||||
|
|
||||||
AHCI_PORT PortList[32];//1~32
|
AHCI_PORT PortList[32];//1~32
|
||||||
|
|
||||||
} AHCI_MEMORY_REGISTERS, *PAHCI_MEMORY_REGISTERS;
|
} AHCI_MEMORY_REGISTERS, *PAHCI_MEMORY_REGISTERS;
|
||||||
|
|
||||||
typedef struct _AHCI_ADAPTER_EXTENSION
|
typedef struct _AHCI_ADAPTER_EXTENSION
|
||||||
{
|
{
|
||||||
ULONG AdapterNumber;
|
ULONG AdapterNumber;
|
||||||
ULONG SystemIoBusNumber;
|
ULONG SystemIoBusNumber;
|
||||||
ULONG SlotNumber;
|
ULONG SlotNumber;
|
||||||
ULONG AhciBaseAddress;
|
ULONG AhciBaseAddress;
|
||||||
ULONG IS; // Interrupt status
|
ULONG IS; // Interrupt status
|
||||||
ULONG PortImplemented;
|
ULONG PortImplemented;
|
||||||
|
|
||||||
USHORT VendorID;
|
USHORT VendorID;
|
||||||
USHORT DeviceID;
|
USHORT DeviceID;
|
||||||
USHORT RevisionID;
|
USHORT RevisionID;
|
||||||
|
|
||||||
ULONG Version;
|
ULONG Version;
|
||||||
ULONG CAP;
|
ULONG CAP;
|
||||||
ULONG CAP2;
|
ULONG CAP2;
|
||||||
PAHCI_MEMORY_REGISTERS ABAR_Address;
|
PAHCI_MEMORY_REGISTERS ABAR_Address;
|
||||||
} AHCI_ADAPTER_EXTENSION, *PAHCI_ADAPTER_EXTENSION;
|
} AHCI_ADAPTER_EXTENSION, *PAHCI_ADAPTER_EXTENSION;
|
||||||
|
|
||||||
typedef struct _AHCI_SRB_EXTENSION
|
typedef struct _AHCI_SRB_EXTENSION
|
||||||
{
|
{
|
||||||
ULONG AdapterNumber;
|
ULONG AdapterNumber;
|
||||||
} AHCI_SRB_EXTENSION;
|
} AHCI_SRB_EXTENSION;
|
||||||
|
|
|
||||||
Loading…
Add table
Add a link
Reference in a new issue