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[HAL]: Plug in the data from pcidata.c that was committed months ago to display a beautiful enumeration of all PCI devices on the machine. This will allow debug logs not only to contain nearly full hardware information, but also identify the VM the tester/reporter is using (based on the device's subsystem ID).
[HAL]: Display all the warning DPRINTs in-line with the PCI enumeration code, resulting in a much easier to read and comprehensive review of the machine. svn path=/trunk/; revision=47666
This commit is contained in:
parent
bf8a146243
commit
c2677cf238
1 changed files with 199 additions and 20 deletions
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@ -374,9 +374,9 @@ HalpGetChipHacks(IN USHORT VendorId,
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if (NT_SUCCESS(Status))
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if (NT_SUCCESS(Status))
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{
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{
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/* Return the flags */
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/* Return the flags */
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DPRINT1("Found HackFlags for your %lx:%lx device\n", VendorId, DeviceId);
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DbgPrint("\tFound HackFlags for your chipset\n");
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*HackFlags = *(PULONG)PartialInfo.Data;
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*HackFlags = *(PULONG)PartialInfo.Data;
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DPRINT1("Hack Flags: %lx (Hack Revision: %lx\tYour Revision: %lx)\n",
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DbgPrint("\t\tHack Flags: %lx (Hack Revision: %lx-Your Revision: %lx)\n",
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*HackFlags, HALP_REVISION_FROM_HACK_FLAGS(*HackFlags), RevisionId);
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*HackFlags, HALP_REVISION_FROM_HACK_FLAGS(*HackFlags), RevisionId);
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/* Does it apply to this revision? */
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/* Does it apply to this revision? */
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@ -388,6 +388,7 @@ HalpGetChipHacks(IN USHORT VendorId,
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/* Throw out revision data */
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/* Throw out revision data */
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*HackFlags = HALP_HACK_FLAGS(*HackFlags);
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*HackFlags = HALP_HACK_FLAGS(*HackFlags);
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if (!*HackFlags) DbgPrint("\tNo HackFlags for your chipset's revision!\n");
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}
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}
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/* Close the handle and return */
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/* Close the handle and return */
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@ -655,6 +656,179 @@ HalpFixupPciSupportedRanges(IN ULONG BusCount)
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}
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}
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#endif
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#endif
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VOID
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NTAPI
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ShowSize(ULONG x)
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{
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if (!x) return;
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DbgPrint(" [size=");
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if (x < 1024)
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{
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DbgPrint("%d", (int) x);
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}
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else if (x < 1048576)
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{
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DbgPrint("%dK", (int)(x / 1024));
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}
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else if (x < 0x80000000)
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{
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DbgPrint("%dM", (int)(x / 1048576));
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}
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else
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{
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DbgPrint("%d", x);
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}
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DbgPrint("]\n");
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}
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VOID
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NTAPI
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HalpDebugPciBus(IN ULONG i,
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IN ULONG j,
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IN ULONG k,
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IN PPCI_COMMON_CONFIG PciData)
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{
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extern CHAR ClassTable[3922];
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extern CHAR VendorTable[642355];
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PCHAR p, ClassName, SubClassName, VendorName, ProductName, SubVendorName;
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ULONG Length;
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CHAR LookupString[16] = "";
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CHAR bSubClassName[32] = "";
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CHAR bVendorName[32] = "";
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CHAR bProductName[32] = "Unknown device";
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CHAR bSubVendorName[32] = "Unknown";
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ULONG Size, Mem, b;
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/* Isolate the class name */
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sprintf(LookupString, "C %02x", PciData->BaseClass);
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ClassName = strstr(ClassTable, LookupString);
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if (ClassName)
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{
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/* Isolate the subclass name */
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ClassName += 6;
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sprintf(LookupString, "\t%02x", PciData->SubClass);
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SubClassName = strstr(ClassName, LookupString);
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if (SubClassName)
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{
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/* Copy the subclass into our buffer */
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SubClassName += 5;
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p = strchr(SubClassName, '\r');
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Length = p - SubClassName;
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if (Length > sizeof(bSubClassName)) Length = sizeof(bSubClassName);
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strncpy(bSubClassName, SubClassName, Length);
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bSubClassName[Length] = '\0';
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}
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}
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/* Isolate the vendor name */
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sprintf(LookupString, "\n%04x ", PciData->VendorID);
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VendorName = strstr(VendorTable, LookupString);
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if (VendorName)
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{
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/* Copy the vendor name into our buffer */
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VendorName += 7;
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p = strchr(VendorName, '\r');
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Length = p - VendorName;
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if (Length > sizeof(bVendorName)) Length = sizeof(bVendorName);
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strncpy(bVendorName, VendorName, Length);
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bVendorName[Length ] = '\0';
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/* Isolate the product name */
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sprintf(LookupString, "\t%04x", PciData->DeviceID);
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ProductName = strstr(VendorName, LookupString);
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if (ProductName)
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{
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/* Copy the product name into our buffer */
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ProductName += 7;
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p = strchr(ProductName, '\r');
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Length = p - ProductName;
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if (Length > sizeof(bProductName)) Length = sizeof(bProductName);
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strncpy(bProductName, ProductName, Length);
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bProductName[Length] = '\0';
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/* Isolate the subvendor and subsystem name */
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sprintf(LookupString,
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"\t\t%04x %04x ",
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PciData->u.type0.SubVendorID,
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PciData->u.type0.SubSystemID);
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SubVendorName = strstr(ProductName, LookupString);
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if (SubVendorName)
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{
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/* Copy the subvendor name into our buffer */
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SubVendorName += 13;
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p = strchr(SubVendorName, '\r');
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Length = p - SubVendorName;
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if (Length > sizeof(bSubVendorName)) Length = sizeof(bSubVendorName);
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strncpy(bSubVendorName, SubVendorName, Length);
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bSubVendorName[Length] = '\0';
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}
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}
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}
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/* Print out the data */
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DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
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"\tSubsystem: %s [%04x:%04x]\n",
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i,
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j,
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k,
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bSubClassName,
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PciData->BaseClass,
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PciData->SubClass,
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bVendorName,
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bProductName,
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PciData->VendorID,
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PciData->DeviceID,
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PciData->RevisionID,
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bSubVendorName,
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PciData->u.type0.SubVendorID,
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PciData->u.type0.SubSystemID);
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/* Print out and decode flags */
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DbgPrint("\tFlags:");
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if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
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if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
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if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
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if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" fast devsel,");
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DbgPrint(" latency %d", PciData->LatencyTimer);
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if (PciData->u.type0.InterruptLine) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
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DbgPrint("\n");
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/* Scan addresses */
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Size = 0;
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for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
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{
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/* Check for a BAR */
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Mem = PciData->u.type0.BaseAddresses[b];
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if (Mem)
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{
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/* Decode the address type */
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if (Mem & PCI_ADDRESS_IO_SPACE)
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{
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/* Decode the size */
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Size = 1 << 2;
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while (!(Mem & Size) && (Size)) Size <<= 1;
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/* Print it out */
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DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
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ShowSize(Size);
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}
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else
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{
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/* Decode the size */
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Size = 1 << 8;
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while (!(Mem & Size) && (Size)) Size <<= 1;
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/* Print it out */
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DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
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Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
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(Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
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(Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
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ShowSize(Size);
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}
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}
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}
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}
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VOID
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VOID
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NTAPI
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NTAPI
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HalpInitializePciBus(VOID)
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HalpInitializePciBus(VOID)
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@ -735,6 +909,7 @@ HalpInitializePciBus(VOID)
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HalpFixupPciSupportedRanges(PciRegistryInfo->NoBuses);
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HalpFixupPciSupportedRanges(PciRegistryInfo->NoBuses);
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/* Loop every bus */
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/* Loop every bus */
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DbgPrint("\n====== PCI BUS HARDWARE DETECTION =======\n\n");
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PciSlot.u.bits.Reserved = 0;
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PciSlot.u.bits.Reserved = 0;
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for (i = 0; i < PciRegistryInfo->NoBuses; i++)
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for (i = 0; i < PciRegistryInfo->NoBuses; i++)
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{
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{
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@ -761,11 +936,14 @@ HalpInitializePciBus(VOID)
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/* Skip if this is an invalid function */
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/* Skip if this is an invalid function */
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if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
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if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
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/* Print out the entry */
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HalpDebugPciBus(i, j, k, PciData);
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/* Check if this is a Cardbus bridge */
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/* Check if this is a Cardbus bridge */
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if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)
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if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)
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{
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{
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/* Not supported */
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/* Not supported */
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DPRINT1("Your machine has a PCI Cardbus Bridge. This device will not work!\n");
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DbgPrint("\tDevice is a PCI Cardbus Bridge. It will not work!\n");
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continue;
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continue;
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}
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}
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@ -783,8 +961,7 @@ HalpInitializePciBus(VOID)
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if (!HalpIsIdeDevice(PciData))
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if (!HalpIsIdeDevice(PciData))
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{
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{
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/* We'll mask out this interrupt then */
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/* We'll mask out this interrupt then */
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DPRINT1("Device %lx:%lx is using IRQ %d! ISA Cards using that IRQ may fail!\n",
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DbgPrint("\tDevice is using IRQ %d! ISA Cards using that IRQ may fail!\n",
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PciData->VendorID, PciData->DeviceID,
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PciData->u.type1.InterruptLine);
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PciData->u.type1.InterruptLine);
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HalpPciIrqMask |= (1 << PciData->u.type1.InterruptLine);
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HalpPciIrqMask |= (1 << PciData->u.type1.InterruptLine);
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}
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}
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@ -800,7 +977,7 @@ HalpInitializePciBus(VOID)
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(PciData->RevisionID < 0x11))
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(PciData->RevisionID < 0x11))
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{
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{
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/* Skip */
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/* Skip */
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DPRINT1("Your machine has a broken Intel 82430 PCI Controller. This device will not work!\n");
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DbgPrint("\tDevice is a broken Intel 82430 PCI Controller. It will not work!\n\n");
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continue;
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continue;
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}
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}
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@ -809,7 +986,7 @@ HalpInitializePciBus(VOID)
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(PciData->RevisionID <= 3))
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(PciData->RevisionID <= 3))
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{
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{
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/* Skip */
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/* Skip */
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DPRINT1("Your machine has a broken Intel 82378 PCI-to-ISA Bridge. This device will not work!\n");
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DbgPrint("\tDevice is a broken Intel 82378 PCI-to-ISA Bridge. It will not work!\n\n");
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continue;
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continue;
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}
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}
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@ -817,7 +994,7 @@ HalpInitializePciBus(VOID)
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if ((PciData->DeviceID == 0x84C4) &&
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if ((PciData->DeviceID == 0x84C4) &&
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(PciData->RevisionID <= 4))
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(PciData->RevisionID <= 4))
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{
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{
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DPRINT1("Your machine has an Intel Orion 82450 PCI Bridge. This device will not work!\n");
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DbgPrint("\tDevice is a Intel Orion 82450 PCI Bridge. It will not work!\n\n");
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continue;
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continue;
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}
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}
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}
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}
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@ -831,8 +1008,7 @@ HalpInitializePciBus(VOID)
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HALP_CARD_FEATURE_FULL_DECODE))
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HALP_CARD_FEATURE_FULL_DECODE))
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{
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{
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/* We'll do chipset checks later */
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/* We'll do chipset checks later */
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DPRINT1("Your %lx:%lx PCI device has Extended Address Decoding. This device may fail to work on older BIOSes!\n",
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DbgPrint("\tDevice has Extended Address Decoding. It may fail to work on older BIOSes!\n");
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PciData->VendorID, PciData->DeviceID);
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ExtendedAddressDecoding = TRUE;
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ExtendedAddressDecoding = TRUE;
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}
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}
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}
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}
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@ -844,21 +1020,21 @@ HalpInitializePciBus(VOID)
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/* Check if this is an OHCI controller */
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/* Check if this is an OHCI controller */
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if (PciData->ProgIf == 0x10)
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if (PciData->ProgIf == 0x10)
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{
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{
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DPRINT1("Your machine has an OHCI (USB) PCI Expansion Card. Turn off Legacy USB in your BIOS!\n");
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DbgPrint("\tDevice is an OHCI (USB) PCI Expansion Card. Turn off Legacy USB in your BIOS!\n\n");
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continue;
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continue;
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}
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}
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/* Check for Intel UHCI controller */
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/* Check for Intel UHCI controller */
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if (PciData->VendorID == 0x8086)
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if (PciData->VendorID == 0x8086)
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{
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{
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DPRINT1("Your machine has an Intel UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n");
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DbgPrint("\tDevice is an Intel UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
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continue;
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continue;
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}
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}
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/* Check for VIA UHCI controller */
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/* Check for VIA UHCI controller */
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if (PciData->VendorID == 0x1106)
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if (PciData->VendorID == 0x1106)
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{
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{
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DPRINT1("Your machine has a VIA UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n");
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DbgPrint("\tDevice is a VIA UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
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continue;
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continue;
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}
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}
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}
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}
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@ -873,31 +1049,34 @@ HalpInitializePciBus(VOID)
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/* Check for broken ACPI routing */
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/* Check for broken ACPI routing */
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if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING)
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if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING)
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{
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{
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DPRINT1("Your hardware has broken ACPI IRQ Routing! Be aware!\n");
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DbgPrint("This chipset has broken ACPI IRQ Routing! Be aware!\n\n");
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continue;
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continue;
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}
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}
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/* Check for broken ACPI timer */
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/* Check for broken ACPI timer */
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if (HackFlags & HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER)
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if (HackFlags & HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER)
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{
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{
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DPRINT1("Your hardware has a broken ACPI timer! Be aware!\n");
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DbgPrint("This chipset has a broken ACPI timer! Be aware!\n\n");
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continue;
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continue;
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}
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}
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/* Check for hibernate-disable */
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/* Check for hibernate-disable */
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if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE)
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if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE)
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{
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{
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DPRINT1("Your machine has a broken PCI device which is incompatible with hibernation. Be aware!\n");
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DbgPrint("This chipset has a broken PCI device which is incompatible with hibernation. Be aware!\n\n");
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continue;
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continue;
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}
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}
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/* Check for USB controllers that generate SMIs */
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/* Check for USB controllers that generate SMIs */
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if (HackFlags & HAL_PCI_CHIP_HACK_USB_SMI_DISABLE)
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if (HackFlags & HAL_PCI_CHIP_HACK_USB_SMI_DISABLE)
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{
|
{
|
||||||
DPRINT1("Your machine has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n");
|
DbgPrint("This chipset has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n\n");
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* Terminate the entry */
|
||||||
|
DbgPrint("\n");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -910,7 +1089,7 @@ HalpInitializePciBus(VOID)
|
||||||
|
|
||||||
/* Tell PnP if this hard supports correct decoding */
|
/* Tell PnP if this hard supports correct decoding */
|
||||||
HalpMarkChipsetDecode(ExtendedAddressDecoding);
|
HalpMarkChipsetDecode(ExtendedAddressDecoding);
|
||||||
DPRINT1("PCI BUS Setup complete\n");
|
DbgPrint("====== PCI BUS DETECTION COMPLETE =======\n\n");
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue