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On amd64 the NextEntry member of MMPTE_LIST has 32 bits, but 36 would be required to cover the whole pte space. Therefore use MmSystemPtesStart[SystemPtePoolType] as base for the pfn linked list instead of MmSystemPteBase, which is set to PTE_BASE.
svn path=/branches/ros-amd64-bringup/; revision=44204
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@ -64,7 +64,8 @@ MiReserveAlignedSystemPtes(IN ULONG NumberOfPtes,
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// Now move to the first free system PTE cluster
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//
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PreviousPte = PointerPte;
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PointerPte = MmSystemPteBase + PointerPte->u.List.NextEntry;
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PointerPte = MmSystemPtesStart[SystemPtePoolType] +
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PointerPte->u.List.NextEntry;
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//
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// Loop each cluster
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@ -152,7 +153,8 @@ MiReserveAlignedSystemPtes(IN ULONG NumberOfPtes,
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// Go to the next cluster
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//
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PreviousPte = PointerPte;
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PointerPte = MmSystemPteBase + PointerPte->u.List.NextEntry;
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PointerPte = MmSystemPtesStart[SystemPtePoolType] +
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PointerPte->u.List.NextEntry;
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ASSERT(PointerPte > PreviousPte);
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}
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@ -214,7 +216,7 @@ MiReleaseSystemPtes(IN PMMPTE StartingPte,
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// Zero PTEs
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//
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RtlZeroMemory(StartingPte, NumberOfPtes * sizeof(MMPTE));
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CurrentSize = (ULONG_PTR)(StartingPte - MmSystemPteBase);
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CurrentSize = (ULONG_PTR)(StartingPte - MmSystemPtesStart[SystemPtePoolType]);
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//
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// Acquire the system PTE lock
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@ -235,7 +237,8 @@ MiReleaseSystemPtes(IN PMMPTE StartingPte,
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//
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// Get the first real cluster of PTEs and check if it's ours
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//
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PointerPte = MmSystemPteBase + CurrentPte->u.List.NextEntry;
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PointerPte = MmSystemPtesStart[SystemPtePoolType] +
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CurrentPte->u.List.NextEntry;
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if (CurrentSize < CurrentPte->u.List.NextEntry)
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{
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//
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@ -395,7 +398,7 @@ MiInitializeSystemPtes(IN PMMPTE StartingPte,
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StartingPte->u.List.NextEntry = ((ULONG)0xFFFFF);
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MmFirstFreeSystemPte[PoolType].u.Long = 0;
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MmFirstFreeSystemPte[PoolType].u.List.NextEntry = StartingPte -
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MmSystemPteBase;
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MmSystemPtesStart[PoolType];
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//
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// The second entry stores the size of this PTE space
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