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Allocate the map registers according to the dma controllers properties (boundary and highest possible address).
svn path=/trunk/; revision=17186
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6faab780d4
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@ -68,11 +68,6 @@ HalAllocateAdapterChannel(
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if(KeInsertDeviceQueue(&AdapterObject->ChannelWaitQueue, &WaitContextBlock->WaitQueueEntry))
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return STATUS_SUCCESS;
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/* 24-bit max address due to 16-bit dma controllers */
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MinAddress.QuadPart = 0x0000000;
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MaxAddress.QuadPart = 0x1000000;
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BoundryAddressMultiple.QuadPart = 0;
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/* why 64K alignment? */
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/*
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* X86 lacks map registers, so for now, we allocate a contiguous
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@ -83,13 +78,35 @@ HalAllocateAdapterChannel(
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* buffer transfers. See a comment in IoMapTransfer about common buffer
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* support.
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*/
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AdapterObject->MapRegisterBase = MmAllocateContiguousAlignedMemory(
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MinAddress.QuadPart = 0;
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BoundryAddressMultiple.QuadPart = 0;
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if ((AdapterObject->Dma64BitAddresses) && (AdapterObject->MasterDevice))
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{
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MaxAddress.QuadPart = 0xFFFFFFFFFFFFFFFFLL; /* 64Bit: >4GB address range */
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}
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else if ((AdapterObject->Dma32BitAddresses) && (AdapterObject->MasterDevice))
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{
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MaxAddress.QuadPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
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}
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else
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{
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MaxAddress.QuadPart = 0x00FFFFFF; /* 24Bit: 16MB address range */
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if (AdapterObject->Width16Bits)
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{
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BoundryAddressMultiple.QuadPart = 0x20000; /* 128k boundary */
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}
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else
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{
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BoundryAddressMultiple.QuadPart = 0x10000; /* 64k boundary */
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}
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}
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AdapterObject->MapRegisterBase = MmAllocateContiguousMemorySpecifyCache(
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NumberOfMapRegisters * PAGE_SIZE,
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MinAddress,
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MaxAddress,
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BoundryAddressMultiple,
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MmCached,
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0x10000 );
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MmCached);
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if(!AdapterObject->MapRegisterBase)
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return STATUS_INSUFFICIENT_RESOURCES;
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@ -387,18 +404,35 @@ IoFreeAdapterChannel (PADAPTER_OBJECT AdapterObject)
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* function really can't return an error code. FIXME.
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*/
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/* 24-bit max address due to 16-bit dma controllers */
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MinAddress.QuadPart = 0x0000000;
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MaxAddress.QuadPart = 0x1000000;
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MinAddress.QuadPart = 0;
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BoundryAddressMultiple.QuadPart = 0;
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if ((AdapterObject->Dma64BitAddresses) && (AdapterObject->MasterDevice))
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{
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MaxAddress.QuadPart = 0xFFFFFFFFFFFFFFFFLL; /* 64Bit: >4GB address range */
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}
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else if ((AdapterObject->Dma32BitAddresses) && (AdapterObject->MasterDevice))
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{
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MaxAddress.QuadPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
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}
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else
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{
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MaxAddress.QuadPart = 0x00FFFFFF; /* 24Bit: 16MB address range */
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if (AdapterObject->Width16Bits)
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{
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BoundryAddressMultiple.QuadPart = 0x20000; /* 128k boundary */
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}
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else
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{
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BoundryAddressMultiple.QuadPart = 0x10000; /* 64k boundary */
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}
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}
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AdapterObject->MapRegisterBase = MmAllocateContiguousAlignedMemory(
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AdapterObject->MapRegisterBase = MmAllocateContiguousMemorySpecifyCache(
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WaitContextBlock->NumberOfMapRegisters * PAGE_SIZE,
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MinAddress,
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MaxAddress,
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BoundryAddressMultiple,
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MmCached,
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0x10000 );
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MmCached);
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if(!AdapterObject->MapRegisterBase)
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return;
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@ -54,20 +54,29 @@ HalAllocateCommonBuffer (PADAPTER_OBJECT AdapterObject,
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LowestAddress.QuadPart = 0;
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BoundryAddressMultiple.QuadPart = 0;
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HighestAddress.u.HighPart = 0;
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if ((AdapterObject->Dma32BitAddresses) && (AdapterObject->MasterDevice)) {
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HighestAddress.u.LowPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
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if ((AdapterObject->Dma64BitAddresses) && (AdapterObject->MasterDevice)) {
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HighestAddress.QuadPart = 0xFFFFFFFFFFFFFFFFLL; /* 64Bit: >4GB address range */
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} else if ((AdapterObject->Dma32BitAddresses) && (AdapterObject->MasterDevice)) {
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HighestAddress.QuadPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
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} else {
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HighestAddress.u.LowPart = 0x00FFFFFF; /* 24Bit: 16MB address range */
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HighestAddress.QuadPart = 0x00FFFFFF; /* 24Bit: 16MB address range */
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if (AdapterObject->Width16Bits)
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{
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BoundryAddressMultiple.QuadPart = 0x20000; /* 128k boundary */
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}
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else
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{
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BoundryAddressMultiple.QuadPart = 0x10000; /* 64k boundary */
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}
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}
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BaseAddress = MmAllocateContiguousAlignedMemory(
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BaseAddress = MmAllocateContiguousMemorySpecifyCache(
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Length,
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LowestAddress,
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HighestAddress,
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BoundryAddressMultiple,
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CacheEnabled ? MmCached : MmNonCached,
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0x10000 );
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CacheEnabled ? MmCached : MmNonCached);
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if (!BaseAddress)
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return 0;
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