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[SOFT386]

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Implement the "MOV reg8, imm8" instruction.


svn path=/branches/ntvdm/; revision=59952
This commit is contained in:
Aleksandar Andrejevic 2013-09-01 17:54:51 +00:00
parent 179627bf40
commit b61bbb9d66
2 changed files with 53 additions and 8 deletions
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53
lib/soft386/opcodes.c
View file

@ -200,14 +200,14 @@ Soft386OpcodeHandlers[SOFT386_NUM_OPCODE_HANDLERS] =
NULL, // TODO: OPCODE 0xAD NOT SUPPORTED
NULL, // TODO: OPCODE 0xAE NOT SUPPORTED
NULL, // TODO: OPCODE 0xAF NOT SUPPORTED
NULL, // TODO: OPCODE 0xB0 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB1 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB2 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB3 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB4 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB5 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB6 NOT SUPPORTED
NULL, // TODO: OPCODE 0xB7 NOT SUPPORTED
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovByteRegImm,
Soft386OpcodeMovRegImm,
Soft386OpcodeMovRegImm,
Soft386OpcodeMovRegImm,
@ -1221,3 +1221,40 @@ Soft386OpcodeMovRegImm(PSOFT386_STATE State, UCHAR Opcode)
return TRUE;
}
BOOLEAN
FASTCALL
Soft386OpcodeMovByteRegImm(PSOFT386_STATE State, UCHAR Opcode)
{
UCHAR Value;
/* Make sure this is the right instruction */
ASSERT((Opcode & 0xF8) == 0xB0);
if (State->PrefixFlags != 0)
{
/* Invalid prefix */
Soft386Exception(State, SOFT386_EXCEPTION_UD);
return FALSE;
}
/* Fetch the byte */
if (!Soft386FetchByte(State, &Value))
{
/* Exception occurred */
return FALSE;
}
if (Opcode & 0x04)
{
/* AH, CH, DH or BH */
State->GeneralRegs[Opcode & 0x03].HighByte = Value;
}
else
{
/* AL, CL, DL or BL */
State->GeneralRegs[Opcode & 0x03].LowByte = Value;
}
return TRUE;
}

8
lib/soft386/opcodes.h
View file

@ -199,4 +199,12 @@ Soft386OpcodeMovRegImm
UCHAR Opcode
);
BOOLEAN
FASTCALL
Soft386OpcodeMovByteRegImm
(
PSOFT386_STATE State,
UCHAR Opcode
);
#endif // _OPCODES_H_