mirror of
https://github.com/reactos/reactos.git
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Implement KeQueryPerformanceCounter() and move all timer related stuff to
a single file timer.c svn path=/trunk/; revision=4926
This commit is contained in:
parent
17b476d572
commit
b5c47abf10
4 changed files with 275 additions and 288 deletions
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@ -1,4 +1,4 @@
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# $Id: Makefile,v 1.9 2003/04/27 18:12:15 ekohl Exp $
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# $Id: Makefile,v 1.10 2003/06/19 16:00:03 gvg Exp $
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PATH_TO_TOP = ../..
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PATH_TO_TOP = ../..
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@ -55,14 +55,13 @@ HAL_OBJECTS = \
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misc.o \
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misc.o \
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mp.o \
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mp.o \
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pci.o \
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pci.o \
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perfcnt.o \
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portio.o \
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portio.o \
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reboot.o \
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reboot.o \
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spinlock.o \
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spinlock.o \
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sysbus.o \
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sysbus.o \
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sysinfo.o \
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sysinfo.o \
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time.o \
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time.o \
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udelay.o
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timer.o
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#pwroff.o
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#pwroff.o
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@ -1,62 +0,0 @@
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/* $Id: perfcnt.c,v 1.3 2002/09/08 10:22:24 chorns Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/hal/x86/perfcnt.c
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* PURPOSE: Performance counter functions
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* PROGRAMMER: David Welch (welch@mcmail.com)
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* Eric Kohl (ekohl@rz-online.de)
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* UPDATE HISTORY:
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* 09/06/2000: Created
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*/
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/* INCLUDES ***************************************************************/
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#include <ddk/ntddk.h>
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/* FUNCTIONS **************************************************************/
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VOID STDCALL
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HalCalibratePerformanceCounter(ULONG Count)
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{
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ULONG i;
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/* save flags and disable interrupts */
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__asm__("pushf\n\t" \
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"cli\n\t");
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for (i = 0; i < Count; i++);
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/* restore flags */
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__asm__("popf\n\t");
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}
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LARGE_INTEGER STDCALL
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KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
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/*
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* FUNCTION: Queries the finest grained running count avaiable in the system
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* ARGUMENTS:
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* PerformanceFreq (OUT) = The routine stores the number of
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* performance counters tick per second here
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* RETURNS: The performance counter value in HERTZ
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* NOTE: Returns the system tick count or the time-stamp on the pentium
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*/
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{
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if (PerformanceFreq != NULL)
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{
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PerformanceFreq->QuadPart = 0;
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return *PerformanceFreq;
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}
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else
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{
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LARGE_INTEGER Value;
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Value.QuadPart = 0;
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return Value;
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}
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}
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/* EOF */
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273
reactos/hal/halx86/timer.c
Normal file
273
reactos/hal/halx86/timer.c
Normal file
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/*
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* ReactOS kernel
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* Copyright (C) 2000 David Welch <welch@cwcom.net>
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* Copyright (C) 1999 Gareth Owen <gaz@athene.co.uk>, Ramon von Handel
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* Copyright (C) 1991, 1992 Linus Torvalds
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*
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* This software is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This software is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software; see the file COPYING. If not, write
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* to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge,
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* MA 02139, USA.
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*
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*/
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/* $Id: timer.c,v 1.1 2003/06/19 16:00:03 gvg Exp $
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*
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/hal/x86/udelay.c
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* PURPOSE: Busy waiting
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* PROGRAMMER: David Welch (david.welch@seh.ox.ac.uk)
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* UPDATE HISTORY:
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* 06/11/99 Created
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*/
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/* INCLUDES ***************************************************************/
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#include <ddk/ntddk.h>
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#define NDEBUG
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#include <internal/debug.h>
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/* GLOBALS ******************************************************************/
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static unsigned int delay_count = 1;
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#define TMR_CTRL 0x43 /* I/O for control */
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#define TMR_CNT0 0x40 /* I/O for counter 0 */
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#define TMR_CNT1 0x41 /* I/O for counter 1 */
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#define TMR_CNT2 0x42 /* I/O for counter 2 */
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#define TMR_SC0 0 /* Select channel 0 */
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#define TMR_SC1 0x40 /* Select channel 1 */
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#define TMR_SC2 0x80 /* Select channel 2 */
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#define TMR_LOW 0x10 /* RW low byte only */
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#define TMR_HIGH 0x20 /* RW high byte only */
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#define TMR_BOTH 0x30 /* RW both bytes */
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#define TMR_MD0 0 /* Mode 0 */
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#define TMR_MD1 0x2 /* Mode 1 */
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#define TMR_MD2 0x4 /* Mode 2 */
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#define TMR_MD3 0x6 /* Mode 3 */
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#define TMR_MD4 0x8 /* Mode 4 */
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#define TMR_MD5 0xA /* Mode 5 */
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#define TMR_BCD 1 /* BCD mode */
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#define TMR_LATCH 0 /* Latch command */
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#define TMR_READ 0xF0 /* Read command */
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#define TMR_CNT 0x20 /* CNT bit (Active low, subtract it) */
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#define TMR_STAT 0x10 /* Status bit (Active low, subtract it) */
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#define TMR_CH2 0x8 /* Channel 2 bit */
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#define TMR_CH1 0x4 /* Channel 1 bit */
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#define TMR_CH0 0x2 /* Channel 0 bit */
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#define MILLISEC 10 /* Number of millisec between interrupts */
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#define HZ (1000 / MILLISEC) /* Number of interrupts per second */
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#define CLOCK_TICK_RATE 1193182 /* Clock frequency of the timer chip */
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#define LATCH (CLOCK_TICK_RATE / HZ) /* Count to program into the timer chip */
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#define PRECISION 8 /* Number of bits to calibrate for delay loop */
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static BOOLEAN UdelayCalibrated = FALSE;
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/* FUNCTIONS **************************************************************/
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VOID STDCALL
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__KeStallExecutionProcessor(ULONG Loops)
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{
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register unsigned int i;
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for (i=0; i<Loops;i++);
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}
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VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
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{
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__KeStallExecutionProcessor((delay_count*Microseconds)/1000);
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}
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static ULONG Read8254Timer(VOID)
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{
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ULONG Count;
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/* save flags and disable interrupts */
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__asm__("pushf\n\t" \
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"cli\n\t");
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WRITE_PORT_UCHAR((PUCHAR) TMR_CTRL, TMR_SC0 | TMR_LATCH);
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Count = READ_PORT_UCHAR((PUCHAR) TMR_CNT0);
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Count |= READ_PORT_UCHAR((PUCHAR) TMR_CNT0) << 8;
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/* restore flags */
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__asm__("popf\n\t");
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return Count;
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}
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static VOID WaitFor8254Wraparound(VOID)
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{
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ULONG CurCount, PrevCount = ~0;
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LONG Delta;
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CurCount = Read8254Timer();
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do
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{
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PrevCount = CurCount;
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CurCount = Read8254Timer();
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Delta = CurCount - PrevCount;
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/*
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* This limit for delta seems arbitrary, but it isn't, it's
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* slightly above the level of error a buggy Mercury/Neptune
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* chipset timer can cause.
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*/
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}
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while (Delta < 300);
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}
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VOID HalpCalibrateStallExecution(VOID)
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{
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ULONG i;
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ULONG calib_bit;
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ULONG CurCount;
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if (UdelayCalibrated)
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{
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return;
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}
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UdelayCalibrated = TRUE;
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DbgPrint("Calibrating delay loop... [");
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/* Initialise timer interrupt with MILLISEC ms interval */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CTRL, TMR_SC0 | TMR_BOTH | TMR_MD2); /* binary, mode 2, LSB/MSB, ch 0 */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH & 0xff); /* LSB */
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WRITE_PORT_UCHAR((PUCHAR) TMR_CNT0, LATCH >> 8); /* MSB */
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/* Stage 1: Coarse calibration */
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WaitFor8254Wraparound();
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delay_count = 1;
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do
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{
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delay_count <<= 1; /* Next delay count to try */
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WaitFor8254Wraparound();
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__KeStallExecutionProcessor(delay_count); /* Do the delay */
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CurCount = Read8254Timer();
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}
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while (CurCount > LATCH / 2);
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delay_count >>= 1; /* Get bottom value for delay */
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/* Stage 2: Fine calibration */
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DbgPrint("delay_count: %d", delay_count);
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calib_bit = delay_count; /* Which bit are we going to test */
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for (i = 0; i < PRECISION; i++)
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{
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calib_bit >>= 1; /* Next bit to calibrate */
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if (!calib_bit)
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{
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break; /* If we have done all bits, stop */
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}
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delay_count |= calib_bit; /* Set the bit in delay_count */
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WaitFor8254Wraparound();
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__KeStallExecutionProcessor(delay_count); /* Do the delay */
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CurCount = Read8254Timer();
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if (CurCount <= LATCH / 2) /* If a tick has passed, turn the */
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{ /* calibrated bit back off */
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delay_count &= ~calib_bit;
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}
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}
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/* We're finished: Do the finishing touches */
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delay_count /= (MILLISEC / 2); /* Calculate delay_count for 1ms */
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DbgPrint("]\n");
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DbgPrint("delay_count: %d\n", delay_count);
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DbgPrint("CPU speed: %d\n", delay_count / 250);
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#if 0
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DbgPrint("About to start delay loop test\n");
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DbgPrint("Waiting for five minutes...");
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for (i = 0; i < (5*60*1000*20); i++)
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{
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KeStallExecutionProcessor(50);
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}
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DbgPrint("finished\n");
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for(;;);
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#endif
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}
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VOID STDCALL
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HalCalibratePerformanceCounter(ULONG Count)
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{
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ULONG i;
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/* save flags and disable interrupts */
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__asm__("pushf\n\t" \
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"cli\n\t");
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for (i = 0; i < Count; i++);
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/* restore flags */
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__asm__("popf\n\t");
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}
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LARGE_INTEGER STDCALL
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KeQueryPerformanceCounter(PLARGE_INTEGER PerformanceFreq)
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/*
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* FUNCTION: Queries the finest grained running count available in the system
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* ARGUMENTS:
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* PerformanceFreq (OUT) = The routine stores the number of
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* performance counter ticks per second here
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* RETURNS: The number of performance counter ticks since boot
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*/
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{
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LARGE_INTEGER TicksOld;
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LARGE_INTEGER TicksNew;
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LARGE_INTEGER Value;
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ULONG CountsLeft;
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if (NULL != PerformanceFreq)
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{
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PerformanceFreq->QuadPart = CLOCK_TICK_RATE;
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}
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do
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{
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KeQueryTickCount(&TicksOld);
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CountsLeft = Read8254Timer();
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Value.QuadPart = TicksOld.QuadPart * LATCH + (LATCH - CountsLeft);
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KeQueryTickCount(&TicksNew);
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}
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while (TicksOld.QuadPart != TicksNew.QuadPart);
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return Value;
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}
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||||||
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/* EOF */
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@ -1,223 +0,0 @@
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||||||
/*
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|
||||||
* ReactOS kernel
|
|
||||||
* Copyright (C) 2000 David Welch <welch@cwcom.net>
|
|
||||||
* Copyright (C) 1999 Gareth Owen <gaz@athene.co.uk>, Ramon von Handel
|
|
||||||
* Copyright (C) 1991, 1992 Linus Torvalds
|
|
||||||
*
|
|
||||||
* This software is free software; you can redistribute it and/or
|
|
||||||
* modify it under the terms of the GNU General Public License as
|
|
||||||
* published by the Free Software Foundation; either version 2 of the
|
|
||||||
* License, or (at your option) any later version.
|
|
||||||
*
|
|
||||||
* This software is distributed in the hope that it will be useful,
|
|
||||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
||||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
||||||
* General Public License for more details.
|
|
||||||
*
|
|
||||||
* You should have received a copy of the GNU General Public License
|
|
||||||
* along with this software; see the file COPYING. If not, write
|
|
||||||
* to the Free Software Foundation, Inc., 675 Mass Ave, Cambridge,
|
|
||||||
* MA 02139, USA.
|
|
||||||
*
|
|
||||||
*/
|
|
||||||
/* $Id: udelay.c,v 1.3 2002/09/08 10:22:25 chorns Exp $
|
|
||||||
*
|
|
||||||
* PROJECT: ReactOS kernel
|
|
||||||
* FILE: ntoskrnl/hal/x86/udelay.c
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|
||||||
* PURPOSE: Busy waiting
|
|
||||||
* PROGRAMMER: David Welch (david.welch@seh.ox.ac.uk)
|
|
||||||
* UPDATE HISTORY:
|
|
||||||
* 06/11/99 Created
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* INCLUDES ***************************************************************/
|
|
||||||
|
|
||||||
#include <ddk/ntddk.h>
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|
||||||
|
|
||||||
#define NDEBUG
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|
||||||
#include <internal/debug.h>
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|
||||||
/* GLOBALS ******************************************************************/
|
|
||||||
|
|
||||||
static unsigned int delay_count = 1;
|
|
||||||
|
|
||||||
#define MILLISEC (10)
|
|
||||||
#define FREQ (1000/MILLISEC)
|
|
||||||
|
|
||||||
#define PRECISION (8)
|
|
||||||
|
|
||||||
#define TMR_CTRL 0x43 /* I/O for control */
|
|
||||||
#define TMR_CNT0 0x40 /* I/O for counter 0 */
|
|
||||||
#define TMR_CNT1 0x41 /* I/O for counter 1 */
|
|
||||||
#define TMR_CNT2 0x42 /* I/O for counter 2 */
|
|
||||||
|
|
||||||
#define TMR_SC0 0 /* Select channel 0 */
|
|
||||||
#define TMR_SC1 0x40 /* Select channel 1 */
|
|
||||||
#define TMR_SC2 0x80 /* Select channel 2 */
|
|
||||||
|
|
||||||
#define TMR_LOW 0x10 /* RW low byte only */
|
|
||||||
#define TMR_HIGH 0x20 /* RW high byte only */
|
|
||||||
#define TMR_BOTH 0x30 /* RW both bytes */
|
|
||||||
|
|
||||||
#define TMR_MD0 0 /* Mode 0 */
|
|
||||||
#define TMR_MD1 0x2 /* Mode 1 */
|
|
||||||
#define TMR_MD2 0x4 /* Mode 2 */
|
|
||||||
#define TMR_MD3 0x6 /* Mode 3 */
|
|
||||||
#define TMR_MD4 0x8 /* Mode 4 */
|
|
||||||
#define TMR_MD5 0xA /* Mode 5 */
|
|
||||||
|
|
||||||
#define TMR_BCD 1 /* BCD mode */
|
|
||||||
|
|
||||||
#define TMR_LATCH 0 /* Latch command */
|
|
||||||
|
|
||||||
#define TMR_READ 0xF0 /* Read command */
|
|
||||||
#define TMR_CNT 0x20 /* CNT bit (Active low, subtract it) */
|
|
||||||
#define TMR_STAT 0x10 /* Status bit (Active low, subtract it) */
|
|
||||||
#define TMR_CH2 0x8 /* Channel 2 bit */
|
|
||||||
#define TMR_CH1 0x4 /* Channel 1 bit */
|
|
||||||
#define TMR_CH0 0x2 /* Channel 0 bit */
|
|
||||||
|
|
||||||
static BOOLEAN UdelayCalibrated = FALSE;
|
|
||||||
|
|
||||||
/* FUNCTIONS **************************************************************/
|
|
||||||
|
|
||||||
void init_pit(float h, unsigned char channel)
|
|
||||||
{
|
|
||||||
unsigned int temp=0;
|
|
||||||
|
|
||||||
temp = 1193180/h;
|
|
||||||
|
|
||||||
// WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL,
|
|
||||||
// (channel*0x40) + TMR_BOTH + TMR_MD3);
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)TMR_CTRL,
|
|
||||||
(channel*0x40) + TMR_BOTH + TMR_MD2);
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)(0x40+channel),
|
|
||||||
(unsigned char) temp);
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)(0x40+channel),
|
|
||||||
(unsigned char) (temp>>8));
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID STDCALL
|
|
||||||
__KeStallExecutionProcessor(ULONG Loops)
|
|
||||||
{
|
|
||||||
register unsigned int i;
|
|
||||||
for (i=0; i<Loops;i++);
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID STDCALL KeStallExecutionProcessor(ULONG Microseconds)
|
|
||||||
{
|
|
||||||
__KeStallExecutionProcessor((delay_count*Microseconds)/1000);
|
|
||||||
}
|
|
||||||
|
|
||||||
#define HZ (100)
|
|
||||||
#define CLOCK_TICK_RATE (1193182)
|
|
||||||
#define LATCH (CLOCK_TICK_RATE / HZ)
|
|
||||||
|
|
||||||
static ULONG Read8254Timer(VOID)
|
|
||||||
{
|
|
||||||
ULONG Count;
|
|
||||||
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)0x43, 0x00);
|
|
||||||
Count = READ_PORT_UCHAR((PUCHAR)0x40);
|
|
||||||
Count |= READ_PORT_UCHAR((PUCHAR)0x40) << 8;
|
|
||||||
return Count;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
static VOID WaitFor8254Wraparound(VOID)
|
|
||||||
{
|
|
||||||
ULONG CurCount, PrevCount = ~0;
|
|
||||||
LONG Delta;
|
|
||||||
|
|
||||||
CurCount = Read8254Timer();
|
|
||||||
|
|
||||||
do {
|
|
||||||
PrevCount = CurCount;
|
|
||||||
CurCount = Read8254Timer();
|
|
||||||
Delta = CurCount - PrevCount;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This limit for delta seems arbitrary, but it isn't, it's
|
|
||||||
* slightly above the level of error a buggy Mercury/Neptune
|
|
||||||
* chipset timer can cause.
|
|
||||||
*/
|
|
||||||
|
|
||||||
} while (Delta < 300);
|
|
||||||
}
|
|
||||||
|
|
||||||
VOID HalpCalibrateStallExecution(VOID)
|
|
||||||
{
|
|
||||||
ULONG i;
|
|
||||||
ULONG calib_bit;
|
|
||||||
ULONG CurCount;
|
|
||||||
|
|
||||||
if (UdelayCalibrated)
|
|
||||||
return;
|
|
||||||
|
|
||||||
UdelayCalibrated = TRUE;
|
|
||||||
|
|
||||||
DbgPrint("Calibrating delay loop... [");
|
|
||||||
|
|
||||||
/* Initialise timer interrupt with MILLISECOND ms interval */
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)0x43, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH & 0xff); /* LSB */
|
|
||||||
WRITE_PORT_UCHAR((PUCHAR)0x40, LATCH >> 8); /* MSB */
|
|
||||||
|
|
||||||
/* Stage 1: Coarse calibration */
|
|
||||||
|
|
||||||
WaitFor8254Wraparound();
|
|
||||||
|
|
||||||
delay_count = 1;
|
|
||||||
|
|
||||||
do {
|
|
||||||
delay_count <<= 1; /* Next delay count to try */
|
|
||||||
|
|
||||||
WaitFor8254Wraparound();
|
|
||||||
|
|
||||||
__KeStallExecutionProcessor(delay_count); /* Do the delay */
|
|
||||||
|
|
||||||
CurCount = Read8254Timer();
|
|
||||||
} while (CurCount > LATCH / 2);
|
|
||||||
|
|
||||||
delay_count >>= 1; /* Get bottom value for delay */
|
|
||||||
|
|
||||||
/* Stage 2: Fine calibration */
|
|
||||||
DbgPrint("delay_count: %d", delay_count);
|
|
||||||
|
|
||||||
calib_bit = delay_count; /* Which bit are we going to test */
|
|
||||||
|
|
||||||
for(i=0;i<PRECISION;i++) {
|
|
||||||
calib_bit >>= 1; /* Next bit to calibrate */
|
|
||||||
if(!calib_bit) break; /* If we have done all bits, stop */
|
|
||||||
|
|
||||||
delay_count |= calib_bit; /* Set the bit in delay_count */
|
|
||||||
|
|
||||||
WaitFor8254Wraparound();
|
|
||||||
|
|
||||||
__KeStallExecutionProcessor(delay_count); /* Do the delay */
|
|
||||||
|
|
||||||
CurCount = Read8254Timer();
|
|
||||||
if (CurCount <= LATCH / 2) /* If a tick has passed, turn the */
|
|
||||||
delay_count &= ~calib_bit; /* calibrated bit back off */
|
|
||||||
}
|
|
||||||
|
|
||||||
/* We're finished: Do the finishing touches */
|
|
||||||
|
|
||||||
delay_count /= (MILLISEC / 2); /* Calculate delay_count for 1ms */
|
|
||||||
|
|
||||||
DbgPrint("]\n");
|
|
||||||
DbgPrint("delay_count: %d\n", delay_count);
|
|
||||||
DbgPrint("CPU speed: %d\n", delay_count/250);
|
|
||||||
#if 0
|
|
||||||
DbgPrint("About to start delay loop test\n");
|
|
||||||
DbgPrint("Waiting for five minutes...");
|
|
||||||
for (i = 0; i < (5*60*1000*20); i++)
|
|
||||||
{
|
|
||||||
KeStallExecutionProcessor(50);
|
|
||||||
}
|
|
||||||
DbgPrint("finished\n");
|
|
||||||
for(;;);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
/* EOF */
|
|
Loading…
Reference in a new issue