From b51b7135a4ec04fdb5043d829c28febebbf6fc58 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?G=C3=A9=20van=20Geldorp?= <ge@gse.nl>
Date: Sat, 18 Dec 2004 22:15:07 +0000
Subject: [PATCH] Add some stubs

svn path=/trunk/; revision=12208
---
 reactos/lib/msvcrt/misc/stubs.c | 103 ++++++++++++++++++++++++++++++++
 reactos/lib/msvcrt/msvcrt.def   |  18 +++---
 2 files changed, 112 insertions(+), 9 deletions(-)

diff --git a/reactos/lib/msvcrt/misc/stubs.c b/reactos/lib/msvcrt/misc/stubs.c
index 7ab8a3afbc1..e2e40baa841 100644
--- a/reactos/lib/msvcrt/misc/stubs.c
+++ b/reactos/lib/msvcrt/misc/stubs.c
@@ -1,5 +1,8 @@
 #include "precomp.h"
 
+#define NDEBUG
+#include <msvcrt/msvcrtdbg.h>
+
 /*********************************************************************
  *		$I10_OUTPUT (MSVCRT.@)
  * Function not really understood but needed to make the DLL work
@@ -8,3 +11,103 @@ void MSVCRT_I10_OUTPUT(void)
 {
   /* FIXME: This is probably data, not a function */
 }
+
+/***********************************************************************
+ *		_adj_fdiv_m32 (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdiv_m32( unsigned int arg )
+{
+  DPRINT1("_adj_fdiv_m32 stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdiv_m32i (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdiv_m32i( int arg )
+{
+  DPRINT1("_adj_fdiv_m32i stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdiv_m64 (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdiv_m64( unsigned __int64 arg )
+{
+  DPRINT1("_adj_fdiv_m64 stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdiv_r (MSVCRT.@)
+ * FIXME
+ *    This function is likely to have the wrong number of arguments.
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void _adj_fdiv_r(void)
+{
+  DPRINT1("_adj_fdiv_r stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdivr_m32 (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdivr_m32( unsigned int arg )
+{
+  DPRINT1("_adj_fdivr_m32i stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdivr_m32i (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdivr_m32i( int arg )
+{
+  DPRINT1("_adj_fdivr_m32i stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fdivr_m64 (MSVCRT.@)
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void __stdcall _adj_fdivr_m64( unsigned __int64 arg )
+{
+  DPRINT1("_adj_fdivr_m64 stub\n");
+}
+
+/***********************************************************************
+ *		_adj_fpatan (MSVCRT.@)
+ * FIXME
+ *    This function is likely to have the wrong number of arguments.
+ *
+ * NOTE
+ *    I _think_ this function is intended to work around the Pentium
+ *    fdiv bug.
+ */
+void _adj_fpatan(void)
+{
+  DPRINT1("_adj_fpatan stub\n");
+}
diff --git a/reactos/lib/msvcrt/msvcrt.def b/reactos/lib/msvcrt/msvcrt.def
index 9b9ef8fc5a4..01b9f69417a 100644
--- a/reactos/lib/msvcrt/msvcrt.def
+++ b/reactos/lib/msvcrt/msvcrt.def
@@ -1,4 +1,4 @@
-; $Id: msvcrt.def,v 1.36 2004/08/27 03:08:23 navaraf Exp $
+; $Id: msvcrt.def,v 1.37 2004/12/18 22:15:07 gvg Exp $
 ;
 ; ReactOS MSVCRT Compatibility Library
 ;
@@ -183,15 +183,15 @@ _abnormal_termination
 _access
 _acmdln DATA
 ;_adj_fdiv_m16i
-;_adj_fdiv_m32
-;_adj_fdiv_m32i
-;_adj_fdiv_m64
-;_adj_fdiv_r
+_adj_fdiv_m32 = _adj_fdiv_m32@4
+_adj_fdiv_m32i = _adj_fdiv_m32i@4
+_adj_fdiv_m64 = _adj_fdiv_m64@8
+_adj_fdiv_r
 ;_adj_fdivr_m16i
-;_adj_fdivr_m32
-;_adj_fdivr_m32i
-;_adj_fdivr_m64
-;_adj_fpatan
+_adj_fdivr_m32 = _adj_fdivr_m32@4
+_adj_fdivr_m32i = _adj_fdivr_m32i@4
+_adj_fdivr_m64 = _adj_fdivr_m64@8
+_adj_fpatan
 ;_adj_fprem
 ;_adj_fprem1
 ;_adj_fptan