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- MiniportAdapterHandle is PLOGICAL_ADAPTER not PNDIS_MINIPORT_BLOCK

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svn path=/branches/aicom-network-fixes/; revision=36495
This commit is contained in:
Cameron Gutman 2008-09-24 21:56:07 +00:00
parent 23c2ae170f
commit b4f76ec0bb
2 changed files with 52 additions and 52 deletions
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94
drivers/network/ndis/ndis/io.c
View file

@ -268,7 +268,7 @@ NdisMAllocateMapRegisters(
UINT MapRegistersPerBaseRegister = 0;
ULONG AvailableMapRegisters;
NTSTATUS NtStatus;
PNDIS_MINIPORT_BLOCK Adapter = 0;
PLOGICAL_ADAPTER Adapter;
PDEVICE_OBJECT DeviceObject = 0;
KEVENT AllocationEvent;
KIRQL OldIrql;
@ -278,19 +278,19 @@ NdisMAllocateMapRegisters(
memset(&Description,0,sizeof(Description));
Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
ASSERT(Adapter);
/* only bus masters may call this routine */
ASSERT(Adapter->Flags & NDIS_ATTRIBUTE_BUS_MASTER);
if(!(Adapter->Flags & NDIS_ATTRIBUTE_BUS_MASTER))
ASSERT(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER);
if(!(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER))
return NDIS_STATUS_SUCCESS;
DeviceObject = Adapter->DeviceObject;
DeviceObject = Adapter->NdisMiniportBlock.DeviceObject;
KeInitializeEvent(&AllocationEvent, NotificationEvent, FALSE);
Adapter->AllocationEvent = &AllocationEvent;
Adapter->NdisMiniportBlock.AllocationEvent = &AllocationEvent;
/*
* map registers correlate to physical pages. ndis documents a
@ -310,12 +310,12 @@ NdisMAllocateMapRegisters(
Description.Master = TRUE; /* implied by calling this function */
Description.ScatterGather = TRUE; /* XXX UNTRUE: All BM DMA are S/G (ms seems to do this) */
Description.Dma32BitAddresses = DmaSize;
Description.BusNumber = Adapter->BusNumber;
Description.InterfaceType = Adapter->BusType;
Description.BusNumber = Adapter->NdisMiniportBlock.BusNumber;
Description.InterfaceType = Adapter->NdisMiniportBlock.BusType;
Description.DmaChannel = DmaChannel;
Description.MaximumLength = MaximumBufferSize;
if(Adapter->AdapterType == Isa)
if(Adapter->NdisMiniportBlock.AdapterType == Isa)
{
/* system dma */
if(DmaChannel < 4)
@ -325,7 +325,7 @@ NdisMAllocateMapRegisters(
Description.DmaSpeed = Compatible;
}
else if(Adapter->AdapterType == PCIBus)
else if(Adapter->NdisMiniportBlock.AdapterType == PCIBus)
{
if(DmaSize == NDIS_DMA_64BITS)
Description.Dma64BitAddresses = TRUE;
@ -339,7 +339,7 @@ NdisMAllocateMapRegisters(
}
AdapterObject = IoGetDmaAdapter(
Adapter->PhysicalDeviceObject, &Description, &AvailableMapRegisters);
Adapter->NdisMiniportBlock.PhysicalDeviceObject, &Description, &AvailableMapRegisters);
if(!AdapterObject)
{
@ -347,7 +347,7 @@ NdisMAllocateMapRegisters(
return NDIS_STATUS_RESOURCES;
}
Adapter->SystemAdapterObject = AdapterObject;
Adapter->NdisMiniportBlock.SystemAdapterObject = AdapterObject;
if(AvailableMapRegisters < MapRegistersPerBaseRegister)
{
@ -358,22 +358,22 @@ NdisMAllocateMapRegisters(
}
/* allocate & zero space in the miniport block for the registers */
Adapter->MapRegisters = ExAllocatePool(NonPagedPool, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
if(!Adapter->MapRegisters)
Adapter->NdisMiniportBlock.MapRegisters = ExAllocatePool(NonPagedPool, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
if(!Adapter->NdisMiniportBlock.MapRegisters)
{
NDIS_DbgPrint(MIN_TRACE, ("insufficient resources.\n"));
return NDIS_STATUS_RESOURCES;
}
memset(Adapter->MapRegisters, 0, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
Adapter->BaseMapRegistersNeeded = (USHORT)BaseMapRegistersNeeded;
memset(Adapter->NdisMiniportBlock.MapRegisters, 0, BaseMapRegistersNeeded * sizeof(MAP_REGISTER_ENTRY));
Adapter->NdisMiniportBlock.BaseMapRegistersNeeded = (USHORT)BaseMapRegistersNeeded;
while(BaseMapRegistersNeeded)
{
NDIS_DbgPrint(MAX_TRACE, ("iterating, basemapregistersneeded = %d\n", BaseMapRegistersNeeded));
BaseMapRegistersNeeded--;
Adapter->CurrentMapRegister = (USHORT)BaseMapRegistersNeeded;
Adapter->NdisMiniportBlock.CurrentMapRegister = (USHORT)BaseMapRegistersNeeded;
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
{
NtStatus = AdapterObject->DmaOperations->AllocateAdapterChannel(
@ -385,7 +385,7 @@ NdisMAllocateMapRegisters(
if(!NT_SUCCESS(NtStatus))
{
NDIS_DbgPrint(MIN_TRACE, ("IoAllocateAdapterChannel failed: 0x%x\n", NtStatus));
ExFreePool(Adapter->MapRegisters);
ExFreePool(Adapter->NdisMiniportBlock.MapRegisters);
return NDIS_STATUS_RESOURCES;
}
@ -396,7 +396,7 @@ NdisMAllocateMapRegisters(
if(!NT_SUCCESS(NtStatus))
{
NDIS_DbgPrint(MIN_TRACE, ("KeWaitForSingleObject failed: 0x%x\n", NtStatus));
ExFreePool(Adapter->MapRegisters);
ExFreePool(Adapter->NdisMiniportBlock.MapRegisters);
return NDIS_STATUS_RESOURCES;
}
@ -439,7 +439,7 @@ NdisMStartBufferPhysicalMapping(
* - The caller supplies storage for the physical address array.
*/
{
PNDIS_MINIPORT_BLOCK Adapter;
PLOGICAL_ADAPTER Adapter;
PVOID CurrentVa;
ULONG TotalLength;
PHYSICAL_ADDRESS ReturnedAddress;
@ -448,7 +448,7 @@ NdisMStartBufferPhysicalMapping(
ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
ASSERT(MiniportAdapterHandle && Buffer && PhysicalAddressArray && ArraySize);
Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
CurrentVa = MmGetMdlVirtualAddress(Buffer);
TotalLength = MmGetMdlByteCount(Buffer);
@ -456,12 +456,12 @@ NdisMStartBufferPhysicalMapping(
{
ULONG Length = TotalLength;
ReturnedAddress = Adapter->SystemAdapterObject->DmaOperations->MapTransfer(
Adapter->SystemAdapterObject, Buffer,
Adapter->MapRegisters[PhysicalMapRegister].MapRegister,
ReturnedAddress = Adapter->NdisMiniportBlock.SystemAdapterObject->DmaOperations->MapTransfer(
Adapter->NdisMiniportBlock.SystemAdapterObject, Buffer,
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].MapRegister,
CurrentVa, &Length, WriteToDevice);
Adapter->MapRegisters[PhysicalMapRegister].WriteToDevice = WriteToDevice;
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].WriteToDevice = WriteToDevice;
PhysicalAddressArray[LoopCount].PhysicalAddress = ReturnedAddress;
PhysicalAddressArray[LoopCount].Length = Length;
@ -495,22 +495,22 @@ NdisMCompleteBufferPhysicalMapping(
* - May be called at IRQL <= DISPATCH_LEVEL
*/
{
PNDIS_MINIPORT_BLOCK Adapter;
PLOGICAL_ADAPTER Adapter;
VOID *CurrentVa;
ULONG Length;
ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
ASSERT(MiniportAdapterHandle && Buffer);
Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
CurrentVa = MmGetMdlVirtualAddress(Buffer);
Length = MmGetMdlByteCount(Buffer);
Adapter->SystemAdapterObject->DmaOperations->FlushAdapterBuffers(
Adapter->SystemAdapterObject, Buffer,
Adapter->MapRegisters[PhysicalMapRegister].MapRegister,
Adapter->NdisMiniportBlock.SystemAdapterObject->DmaOperations->FlushAdapterBuffers(
Adapter->NdisMiniportBlock.SystemAdapterObject, Buffer,
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].MapRegister,
CurrentVa, Length,
Adapter->MapRegisters[PhysicalMapRegister].WriteToDevice);
Adapter->NdisMiniportBlock.MapRegisters[PhysicalMapRegister].WriteToDevice);
}
@ -582,7 +582,7 @@ NdisMFreeMapRegisters(
*/
{
KIRQL OldIrql;
PNDIS_MINIPORT_BLOCK Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
PDMA_ADAPTER AdapterObject;
UINT MapRegistersPerBaseRegister;
UINT i;
@ -592,31 +592,31 @@ NdisMFreeMapRegisters(
ASSERT(Adapter);
/* only bus masters may call this routine */
ASSERT(Adapter->Flags & NDIS_ATTRIBUTE_BUS_MASTER);
if(!(Adapter->Flags & NDIS_ATTRIBUTE_BUS_MASTER) ||
Adapter->SystemAdapterObject == NULL)
ASSERT(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER);
if(!(Adapter->NdisMiniportBlock.Flags & NDIS_ATTRIBUTE_BUS_MASTER) ||
Adapter->NdisMiniportBlock.SystemAdapterObject == NULL)
return;
MapRegistersPerBaseRegister = ((Adapter->MaximumPhysicalMapping - 2) / PAGE_SIZE) + 2;
MapRegistersPerBaseRegister = ((Adapter->NdisMiniportBlock.MaximumPhysicalMapping - 2) / PAGE_SIZE) + 2;
AdapterObject = Adapter->SystemAdapterObject;
AdapterObject = Adapter->NdisMiniportBlock.SystemAdapterObject;
KeRaiseIrql(DISPATCH_LEVEL, &OldIrql);
{
for(i = 0; i < Adapter->BaseMapRegistersNeeded; i++)
for(i = 0; i < Adapter->NdisMiniportBlock.BaseMapRegistersNeeded; i++)
{
AdapterObject->DmaOperations->FreeMapRegisters(
Adapter->SystemAdapterObject,
Adapter->MapRegisters[i].MapRegister,
Adapter->NdisMiniportBlock.SystemAdapterObject,
Adapter->NdisMiniportBlock.MapRegisters[i].MapRegister,
MapRegistersPerBaseRegister);
}
}
KeLowerIrql(OldIrql);
AdapterObject->DmaOperations->PutDmaAdapter(AdapterObject);
Adapter->SystemAdapterObject = NULL;
Adapter->NdisMiniportBlock.SystemAdapterObject = NULL;
ExFreePool(Adapter->MapRegisters);
ExFreePool(Adapter->NdisMiniportBlock.MapRegisters);
}
@ -752,7 +752,7 @@ NdisMRegisterInterrupt(
ULONG MappedIRQ;
KIRQL DIrql;
KAFFINITY Affinity;
PNDIS_MINIPORT_BLOCK Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
NDIS_DbgPrint(MAX_TRACE, ("Called. InterruptVector (0x%X) InterruptLevel (0x%X) "
"SharedInterrupt (%d) InterruptMode (0x%X)\n",
@ -768,9 +768,9 @@ NdisMRegisterInterrupt(
Interrupt->SharedInterrupt = SharedInterrupt;
Adapter->Interrupt = Interrupt;
Adapter->NdisMiniportBlock.Interrupt = Interrupt;
MappedIRQ = HalGetInterruptVector(Adapter->BusType, Adapter->BusNumber,
MappedIRQ = HalGetInterruptVector(Adapter->NdisMiniportBlock.BusType, Adapter->NdisMiniportBlock.BusNumber,
InterruptLevel, InterruptVector, &DIrql,
&Affinity);
@ -818,7 +818,7 @@ NdisMRegisterIoPortRange(
*/
{
PHYSICAL_ADDRESS PortAddress, TranslatedAddress;
PNDIS_MINIPORT_BLOCK Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
ULONG AddressSpace = 1; /* FIXME The HAL handles this wrong atm */
*PortOffset = 0;
@ -840,7 +840,7 @@ NdisMRegisterIoPortRange(
NDIS_DbgPrint(MAX_TRACE, ("Translating address 0x%x 0x%x\n", PortAddress.u.HighPart, PortAddress.u.LowPart));
if(!HalTranslateBusAddress(Adapter->BusType, Adapter->BusNumber,
if(!HalTranslateBusAddress(Adapter->NdisMiniportBlock.BusType, Adapter->NdisMiniportBlock.BusNumber,
PortAddress, &AddressSpace, &TranslatedAddress))
{
NDIS_DbgPrint(MIN_TRACE, ("Unable to translate address\n"));

10
drivers/network/ndis/ndis/memory.c
View file

@ -189,12 +189,12 @@ NdisMAllocateSharedMemory(
* - Cached is ignored; we always allocate non-cached
*/
{
PNDIS_MINIPORT_BLOCK Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
NDIS_DbgPrint(MAX_TRACE,("Called.\n"));
*VirtualAddress = Adapter->SystemAdapterObject->DmaOperations->AllocateCommonBuffer(
Adapter->SystemAdapterObject, Length, PhysicalAddress, Cached);
*VirtualAddress = Adapter->NdisMiniportBlock.SystemAdapterObject->DmaOperations->AllocateCommonBuffer(
Adapter->NdisMiniportBlock.SystemAdapterObject, Length, PhysicalAddress, Cached);
}
@ -267,7 +267,7 @@ NdisMFreeSharedMemory(
*/
{
HANDLE ThreadHandle;
PNDIS_MINIPORT_BLOCK Adapter = (PNDIS_MINIPORT_BLOCK)MiniportAdapterHandle;
PLOGICAL_ADAPTER Adapter = (PLOGICAL_ADAPTER)MiniportAdapterHandle;
PMINIPORT_SHARED_MEMORY Memory;
NDIS_DbgPrint(MAX_TRACE,("Called.\n"));
@ -283,7 +283,7 @@ NdisMFreeSharedMemory(
return;
}
Memory->AdapterObject = Adapter->SystemAdapterObject;
Memory->AdapterObject = Adapter->NdisMiniportBlock.SystemAdapterObject;
Memory->Length = Length;
Memory->PhysicalAddress = PhysicalAddress;
Memory->VirtualAddress = VirtualAddress;