From af9020285fd659a795963656e5219e1f78994cc1 Mon Sep 17 00:00:00 2001 From: ReactOS Portable Systems Group Date: Sun, 12 Jul 2009 10:41:50 +0000 Subject: [PATCH] Define the base addresses as ULONG_PTR since pointer math on void* is illegal svn path=/trunk/; revision=41918 --- reactos/include/reactos/arm/peripherals/pl011.h | 2 +- reactos/include/reactos/arm/peripherals/pl190.h | 2 +- reactos/include/reactos/arm/peripherals/sp804.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/reactos/include/reactos/arm/peripherals/pl011.h b/reactos/include/reactos/arm/peripherals/pl011.h index e423c0b9c63..6fa3cdc1fc9 100644 --- a/reactos/include/reactos/arm/peripherals/pl011.h +++ b/reactos/include/reactos/arm/peripherals/pl011.h @@ -11,7 +11,7 @@ // // UART Registers // -#define UART_BASE (PVOID)0xE00F1000 /* HACK: freeldr mapped it here */ +#define UART_BASE (ULONG_PTR)0xE00F1000 /* HACK: freeldr mapped it here */ #define UART_PL01x_DR (UART_BASE + 0x00) #define UART_PL01x_RSR (UART_BASE + 0x04) diff --git a/reactos/include/reactos/arm/peripherals/pl190.h b/reactos/include/reactos/arm/peripherals/pl190.h index 0d266b4e3ee..a6e336a6abf 100644 --- a/reactos/include/reactos/arm/peripherals/pl190.h +++ b/reactos/include/reactos/arm/peripherals/pl190.h @@ -11,7 +11,7 @@ // // VIC Registers // -#define VIC_BASE (PVOID)0xE0040000 /* HACK: freeldr mapped it here */ +#define VIC_BASE (ULONG_PTR)0xE0040000 /* HACK: freeldr mapped it here */ #define VIC_INT_STATUS (VIC_BASE + 0x00) #define VIC_INT_ENABLE (VIC_BASE + 0x10) diff --git a/reactos/include/reactos/arm/peripherals/sp804.h b/reactos/include/reactos/arm/peripherals/sp804.h index 7dea73b36cf..68acd91b149 100644 --- a/reactos/include/reactos/arm/peripherals/sp804.h +++ b/reactos/include/reactos/arm/peripherals/sp804.h @@ -11,7 +11,7 @@ // // Timer Registers // -#define TIMER_BASE(x) (PVOID)(0xE00E2000 + (x * 0x1000)) /* HACK: freeldr mapped it here */ +#define TIMER_BASE(x) (ULONG_PTR)(0xE00E2000 + (x * 0x1000)) /* HACK: freeldr mapped it here */ #define TIMER0_LOAD TIMER_BASE(0) + 0x00 #define TIMER0_VALUE TIMER_BASE(0) + 0x04 #define TIMER0_CONTROL TIMER_BASE(0) + 0x08