mirror of
https://github.com/reactos/reactos.git
synced 2025-04-21 04:37:15 +00:00
[NTOSKRNL]
Fix ARM build svn path=/trunk/; revision=67735
This commit is contained in:
parent
014f5582c3
commit
adc234ba9c
17 changed files with 400 additions and 309 deletions
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@ -1597,7 +1597,9 @@ QSI_DEF(SystemExceptionInformation)
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{
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{
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AlignmentFixupCount += Prcb->KeAlignmentFixupCount;
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AlignmentFixupCount += Prcb->KeAlignmentFixupCount;
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ExceptionDispatchCount += Prcb->KeExceptionDispatchCount;
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ExceptionDispatchCount += Prcb->KeExceptionDispatchCount;
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#ifndef _M_ARM
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FloatingEmulationCount += Prcb->KeFloatingEmulationCount;
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FloatingEmulationCount += Prcb->KeFloatingEmulationCount;
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#endif // _M_ARM
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}
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}
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}
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}
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@ -2353,7 +2355,7 @@ NtFlushInstructionCache(IN HANDLE ProcessHandle,
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DPRINT1("NtFlushInstructionCache() is not implemented\n");
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DPRINT1("NtFlushInstructionCache() is not implemented\n");
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for (;;);
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for (;;);
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#elif defined(_M_ARM)
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#elif defined(_M_ARM)
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__asm__ __volatile__("mov r1, #0; mcr p15, 0, r1, c7, c5, 0");
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//__asm__ __volatile__("mov r1, #0; mcr p15, 0, r1, c7, c5, 0");
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#else
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#else
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#error Unknown architecture
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#error Unknown architecture
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#endif
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#endif
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@ -18,7 +18,7 @@
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//
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//
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#define KD_BREAKPOINT_TYPE ULONG
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#define KD_BREAKPOINT_TYPE ULONG
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#define KD_BREAKPOINT_SIZE sizeof(ULONG)
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#define KD_BREAKPOINT_SIZE sizeof(ULONG)
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//#define KD_BREAKPOINT_VALUE
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#define KD_BREAKPOINT_VALUE 0xDEFE
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//
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//
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// Maximum IRQs
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// Maximum IRQs
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@ -59,7 +59,7 @@
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// All architectures but x86 have it in the PRCB's KeContextSwitches
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// All architectures but x86 have it in the PRCB's KeContextSwitches
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//
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//
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#define KeGetContextSwitches(Prcb) \
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#define KeGetContextSwitches(Prcb) \
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CONTAINING_RECORD(Prcb, KIPCR, PrcbData)->ContextSwitches
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(Prcb)->KeContextSwitches
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//
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//
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// Macro to get the second level cache size field name which differs between
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// Macro to get the second level cache size field name which differs between
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@ -71,7 +71,7 @@
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// Returns the Interrupt State from a Trap Frame.
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// Returns the Interrupt State from a Trap Frame.
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// ON = TRUE, OFF = FALSE
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// ON = TRUE, OFF = FALSE
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//
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//
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//#define KeGetTrapFrameInterruptState(TrapFrame)
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#define KeGetTrapFrameInterruptState(TrapFrame) 0
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FORCEINLINE
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FORCEINLINE
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BOOLEAN
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BOOLEAN
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@ -162,7 +162,7 @@ HalSweepIcache(
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#define KiEndInterrupt(x,y)
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#define KiEndInterrupt(x,y)
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#define KiGetLinkedTrapFrame(x) \
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#define KiGetLinkedTrapFrame(x) \
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(PKTRAP_FRAME)((x)->PreviousTrapFrame)
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(PKTRAP_FRAME)((x)->TrapFrame)
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#define KiGetPreviousMode(tf) \
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#define KiGetPreviousMode(tf) \
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((tf->Spsr & CPSR_MODES) == CPSR_USER_MODE) ? UserMode: KernelMode
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((tf->Cpsr & CPSRM_MASK) == CPSRM_USER) ? UserMode: KernelMode
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@ -383,7 +383,7 @@ KiRescheduleThread(IN BOOLEAN NewThread,
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IN ULONG Cpu)
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IN ULONG Cpu)
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{
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{
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/* Check if a new thread needs to be scheduled on a different CPU */
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/* Check if a new thread needs to be scheduled on a different CPU */
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if ((NewThread) && !(KeGetPcr()->Number == Cpu))
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if ((NewThread) && !(KeGetCurrentPrcb()->Number == Cpu))
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{
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{
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/* Send an IPI to request delivery */
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/* Send an IPI to request delivery */
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KiIpiSend(AFFINITY_MASK(Cpu), IPI_DPC);
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KiIpiSend(AFFINITY_MASK(Cpu), IPI_DPC);
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@ -534,7 +534,7 @@ KiRequestApcInterrupt(IN BOOLEAN NeedApc,
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if (NeedApc)
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if (NeedApc)
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{
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{
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/* Check if it's on another CPU */
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/* Check if it's on another CPU */
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if (KeGetPcr()->Number != Processor)
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if (KeGetCurrentPrcb()->Number != Processor)
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{
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{
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/* Send an IPI to request delivery */
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/* Send an IPI to request delivery */
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KiIpiSend(AFFINITY_MASK(Processor), IPI_APC);
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KiIpiSend(AFFINITY_MASK(Processor), IPI_APC);
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@ -55,24 +55,24 @@ KdPortInitializeEx(IN PCPPORT PortInformation,
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//
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//
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// Disable interrupts
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// Disable interrupts
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//
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//
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WRITE_REGISTER_ULONG(UART_PL011_CR, 0);
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_CR, 0);
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//
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//
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// Set the baud rate
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// Set the baud rate
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//
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//
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WRITE_REGISTER_ULONG(UART_PL011_IBRD, Divider);
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_IBRD, Divider);
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WRITE_REGISTER_ULONG(UART_PL011_FBRD, Fraction);
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_FBRD, Fraction);
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//
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//
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// Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
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// Set 8 bits for data, 1 stop bit, no parity, FIFO enabled
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//
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//
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WRITE_REGISTER_ULONG(UART_PL011_LCRH,
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_LCRH,
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UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN);
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UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN);
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//
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//
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// Clear and enable FIFO
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// Clear and enable FIFO
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//
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//
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WRITE_REGISTER_ULONG(UART_PL011_CR,
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WRITE_REGISTER_ULONG((PULONG)UART_PL011_CR,
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UART_PL011_CR_UARTEN |
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UART_PL011_CR_UARTEN |
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UART_PL011_CR_TXE |
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UART_PL011_CR_TXE |
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UART_PL011_CR_RXE);
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UART_PL011_CR_RXE);
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@ -101,12 +101,12 @@ KdPortPutByteEx(IN PCPPORT PortInformation,
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//
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//
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// Wait for ready
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// Wait for ready
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//
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//
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while ((READ_REGISTER_ULONG(UART_PL01x_FR) & UART_PL01x_FR_TXFF) != 0);
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while ((READ_REGISTER_ULONG((PULONG)UART_PL01x_FR) & UART_PL01x_FR_TXFF) != 0);
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//
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//
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// Send the character
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// Send the character
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//
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//
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WRITE_REGISTER_ULONG(UART_PL01x_DR, ByteToSend);
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WRITE_REGISTER_ULONG((PULONG)UART_PL01x_DR, ByteToSend);
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}
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}
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/* EOF */
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/* EOF */
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@ -46,7 +46,7 @@ VOID NTAPI RtlpBreakWithStatusInstruction(VOID);
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#elif defined(_ARM_)
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#elif defined(_ARM_)
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#define KPCR_SELF_PCR_OFFSET 0
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#define KPCR_SELF_PCR_OFFSET 0
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#define KPCR_CURRENT_PRCB_OFFSET FIELD_OFFSET(KPCR, Prcb)
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#define KPCR_CURRENT_PRCB_OFFSET FIELD_OFFSET(KIPCR, Prcb)
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#define KPCR_CONTAINED_PRCB_OFFSET 0
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#define KPCR_CONTAINED_PRCB_OFFSET 0
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#define KPCR_INITIAL_STACK_OFFSET FIELD_OFFSET(KPCR, InitialStack)
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#define KPCR_INITIAL_STACK_OFFSET FIELD_OFFSET(KPCR, InitialStack)
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#define KPCR_STACK_LIMIT_OFFSET FIELD_OFFSET(KPCR, StackLimit)
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#define KPCR_STACK_LIMIT_OFFSET FIELD_OFFSET(KPCR, StackLimit)
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@ -510,9 +510,16 @@ KDDEBUGGER_DATA64 KdDebuggerDataBlock =
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KPCR_CONTAINED_PRCB_OFFSET,
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KPCR_CONTAINED_PRCB_OFFSET,
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0,
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0,
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0,
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0,
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#if defined(_M_ARM)
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_WARN("KPCR_INITIAL_STACK_OFFSET, KPCR_STACK_LIMIT_OFFSET and KPRCB_PCR_PAGE_OFFSET not properly defined on ARM")
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0,
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0,
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0,
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#else
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KPCR_INITIAL_STACK_OFFSET,
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KPCR_INITIAL_STACK_OFFSET,
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KPCR_STACK_LIMIT_OFFSET,
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KPCR_STACK_LIMIT_OFFSET,
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KPRCB_PCR_PAGE_OFFSET,
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KPRCB_PCR_PAGE_OFFSET,
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#endif
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FIELD_OFFSET(KPRCB, ProcessorState.SpecialRegisters),
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FIELD_OFFSET(KPRCB, ProcessorState.SpecialRegisters),
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#if defined(_X86_)
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#if defined(_X86_)
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//
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//
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@ -67,10 +67,26 @@ KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
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//
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//
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// Save some critical stuff we use
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// Save some critical stuff we use
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//
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//
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__debugbreak();
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#if 0
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ProcessorState->SpecialRegisters.ControlRegister = KeArmControlRegisterGet();
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ProcessorState->SpecialRegisters.ControlRegister = KeArmControlRegisterGet();
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ProcessorState->SpecialRegisters.LockdownRegister = KeArmLockdownRegisterGet();
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ProcessorState->SpecialRegisters.LockdownRegister = KeArmLockdownRegisterGet();
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ProcessorState->SpecialRegisters.CacheRegister = KeArmCacheRegisterGet();
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ProcessorState->SpecialRegisters.CacheRegister = KeArmCacheRegisterGet();
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ProcessorState->SpecialRegisters.StatusRegister = KeArmStatusRegisterGet();
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ProcessorState->SpecialRegisters.StatusRegister = KeArmStatusRegisterGet();
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#endif
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}
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VOID
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NTAPI
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KiRestoreProcessorControlState(PKPROCESSOR_STATE ProcessorState)
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{
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__debugbreak();
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#if 0
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KeArmControlRegisterSet(ProcessorState->SpecialRegisters.ControlRegister);
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KeArmLockdownRegisterSet(ProcessorState->SpecialRegisters.LockdownRegister);
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KeArmCacheRegisterSet(ProcessorState->SpecialRegisters.CacheRegister);
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KeArmStatusRegisterSet(ProcessorState->SpecialRegisters.StatusRegister);
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#endif
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}
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}
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BOOLEAN
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BOOLEAN
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@ -170,30 +186,14 @@ KeSaveStateForHibernate(IN PKPROCESSOR_STATE State)
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KiSaveProcessorControlState(State);
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KiSaveProcessorControlState(State);
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}
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}
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/*
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VOID
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* @implemented
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*/
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NTSTATUS
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NTAPI
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NTAPI
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KeSaveFloatingPointState(OUT PKFLOATING_SAVE Save)
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KeFlushIoBuffers(
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_In_ PMDL Mdl,
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_In_ BOOLEAN ReadOperation,
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_In_ BOOLEAN DmaOperation)
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{
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{
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//
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DbgBreakPoint();
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// Nothing to do on ARM
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//
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return STATUS_SUCCESS;
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}
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/*
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* @implemented
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*/
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NTSTATUS
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NTAPI
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KeRestoreFloatingPointState(IN PKFLOATING_SAVE Save)
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{
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//
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// Nothing to do on ARM
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//
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return STATUS_SUCCESS;
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}
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}
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/* SYSTEM CALLS NOT VALID ON THIS CPU *****************************************/
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/* SYSTEM CALLS NOT VALID ON THIS CPU *****************************************/
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@ -9,7 +9,6 @@
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/* INCLUDES *******************************************************************/
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/* INCLUDES *******************************************************************/
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#include <ntoskrnl.h>
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#include <ntoskrnl.h>
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#include <internal/arm/ksarm.h>
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#define NDEBUG
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#define NDEBUG
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#include <debug.h>
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#include <debug.h>
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@ -39,28 +38,18 @@ KeContextToTrapFrame(IN PCONTEXT Context,
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//
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//
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// So this basically means all the special stuff
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// So this basically means all the special stuff
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//
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//
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if (PreviousMode == UserMode)
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{
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//
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//
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// ARM has register banks
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// ARM has register banks
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//
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//
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TrapFrame->UserSp = Context->Sp;
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TrapFrame->Sp = Context->Sp;
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TrapFrame->UserLr = Context->Lr;
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TrapFrame->Lr = Context->Lr;
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}
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else
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{
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//
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// ARM has register banks
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//
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TrapFrame->SvcSp = Context->Sp;
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TrapFrame->SvcLr = Context->Lr;
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}
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//
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//
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// The rest is already in the right mode
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// The rest is already in the right mode
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//
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//
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TrapFrame->Pc = Context->Pc;
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TrapFrame->Pc = Context->Pc;
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TrapFrame->Spsr = Context->Psr;
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TrapFrame->Cpsr = Context->Cpsr;
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}
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}
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//
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//
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@ -75,14 +64,14 @@ KeContextToTrapFrame(IN PCONTEXT Context,
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TrapFrame->R1 = Context->R1;
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TrapFrame->R1 = Context->R1;
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TrapFrame->R2 = Context->R2;
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TrapFrame->R2 = Context->R2;
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TrapFrame->R3 = Context->R3;
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TrapFrame->R3 = Context->R3;
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TrapFrame->R4 = Context->R4;
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ExceptionFrame->R4 = Context->R4;
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TrapFrame->R5 = Context->R5;
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ExceptionFrame->R5 = Context->R5;
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TrapFrame->R6 = Context->R6;
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ExceptionFrame->R6 = Context->R6;
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TrapFrame->R7 = Context->R7;
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ExceptionFrame->R7 = Context->R7;
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TrapFrame->R8 = Context->R8;
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ExceptionFrame->R8 = Context->R8;
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TrapFrame->R0 = Context->R9;
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ExceptionFrame->R9 = Context->R9;
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TrapFrame->R10 = Context->R10;
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ExceptionFrame->R10 = Context->R10;
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TrapFrame->R11 = Context->R11;
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ExceptionFrame->R11 = Context->R11;
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TrapFrame->R12 = Context->R12;
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TrapFrame->R12 = Context->R12;
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}
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}
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@ -114,28 +103,18 @@ KeTrapFrameToContext(IN PKTRAP_FRAME TrapFrame,
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//
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//
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// So this basically means all the special stuff
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// So this basically means all the special stuff
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//
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//
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if (KiGetPreviousMode(TrapFrame) == UserMode)
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{
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//
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//
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// ARM has register banks
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// ARM has register banks
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//
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//
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Context->Sp = TrapFrame->UserSp;
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Context->Sp = TrapFrame->Sp;
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Context->Lr = TrapFrame->UserLr;
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Context->Lr = TrapFrame->Lr;
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}
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else
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{
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//
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// ARM has register banks
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//
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Context->Sp = TrapFrame->SvcSp;
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Context->Lr = TrapFrame->SvcLr;
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}
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//
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//
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// The rest is already in the right mode
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// The rest is already in the right mode
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//
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//
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Context->Pc = TrapFrame->Pc;
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Context->Pc = TrapFrame->Pc;
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Context->Psr = TrapFrame->Spsr;
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Context->Cpsr = TrapFrame->Cpsr;
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}
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}
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//
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//
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@ -150,14 +129,14 @@ KeTrapFrameToContext(IN PKTRAP_FRAME TrapFrame,
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Context->R1 = TrapFrame->R1;
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Context->R1 = TrapFrame->R1;
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Context->R2 = TrapFrame->R2;
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Context->R2 = TrapFrame->R2;
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Context->R3 = TrapFrame->R3;
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Context->R3 = TrapFrame->R3;
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Context->R4 = TrapFrame->R4;
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Context->R4 = ExceptionFrame->R4;
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Context->R5 = TrapFrame->R5;
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Context->R5 = ExceptionFrame->R5;
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Context->R6 = TrapFrame->R6;
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Context->R6 = ExceptionFrame->R6;
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Context->R7 = TrapFrame->R7;
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Context->R7 = ExceptionFrame->R7;
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Context->R8 = TrapFrame->R8;
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Context->R8 = ExceptionFrame->R8;
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Context->R0 = TrapFrame->R9;
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Context->R0 = ExceptionFrame->R9;
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Context->R10 = TrapFrame->R10;
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Context->R10 = ExceptionFrame->R10;
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Context->R11 = TrapFrame->R11;
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Context->R11 = ExceptionFrame->R11;
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Context->R12 = TrapFrame->R12;
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Context->R12 = TrapFrame->R12;
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}
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}
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@ -281,3 +260,12 @@ Handled:
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PreviousMode);
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PreviousMode);
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return;
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return;
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}
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}
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NTSTATUS
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NTAPI
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KeRaiseUserException(
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_In_ NTSTATUS ExceptionCode)
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{
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ASSERT(FALSE);
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return STATUS_NOT_IMPLEMENTED;
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||||||
|
}
|
||||||
|
|
|
@ -12,6 +12,13 @@
|
||||||
#define NDEBUG
|
#define NDEBUG
|
||||||
#include <debug.h>
|
#include <debug.h>
|
||||||
|
|
||||||
|
VOID
|
||||||
|
NTAPI
|
||||||
|
KdPortPutByteEx(
|
||||||
|
PCPPORT PortInformation,
|
||||||
|
UCHAR ByteToSend
|
||||||
|
);
|
||||||
|
|
||||||
/* GLOBALS ********************************************************************/
|
/* GLOBALS ********************************************************************/
|
||||||
|
|
||||||
KINTERRUPT KxUnexpectedInterrupt;
|
KINTERRUPT KxUnexpectedInterrupt;
|
||||||
|
@ -52,7 +59,8 @@ KiInitializeKernel(IN PKPROCESS InitProcess,
|
||||||
KiInitSpinLocks(Prcb, Number);
|
KiInitSpinLocks(Prcb, Number);
|
||||||
|
|
||||||
/* Set stack pointers */
|
/* Set stack pointers */
|
||||||
Pcr->InitialStack = IdleStack;
|
//Pcr->InitialStack = IdleStack;
|
||||||
|
Pcr->Prcb.SpBase = IdleStack; // ???
|
||||||
|
|
||||||
/* Check if this is the Boot CPU */
|
/* Check if this is the Boot CPU */
|
||||||
if (!Number)
|
if (!Number)
|
||||||
|
@ -74,12 +82,13 @@ KiInitializeKernel(IN PKPROCESS InitProcess,
|
||||||
/* Set boot-level flags */
|
/* Set boot-level flags */
|
||||||
KeProcessorArchitecture = PROCESSOR_ARCHITECTURE_ARM;
|
KeProcessorArchitecture = PROCESSOR_ARCHITECTURE_ARM;
|
||||||
KeFeatureBits = 0;
|
KeFeatureBits = 0;
|
||||||
KeProcessorLevel = (USHORT)(Pcr->ProcessorId >> 8);
|
/// FIXME: just a wild guess
|
||||||
KeProcessorRevision = (USHORT)(Pcr->ProcessorId & 0xFF);
|
KeProcessorLevel = (USHORT)(Pcr->Prcb.ProcessorState.ArchState.Cp15_Cr0_CpuId >> 8);
|
||||||
|
KeProcessorRevision = (USHORT)(Pcr->Prcb.ProcessorState.ArchState.Cp15_Cr0_CpuId & 0xFF);
|
||||||
|
#if 0
|
||||||
/* Set the current MP Master KPRCB to the Boot PRCB */
|
/* Set the current MP Master KPRCB to the Boot PRCB */
|
||||||
Prcb->MultiThreadSetMaster = Prcb;
|
Prcb->MultiThreadSetMaster = Prcb;
|
||||||
|
#endif
|
||||||
/* Lower to APC_LEVEL */
|
/* Lower to APC_LEVEL */
|
||||||
KeLowerIrql(APC_LEVEL);
|
KeLowerIrql(APC_LEVEL);
|
||||||
|
|
||||||
|
@ -160,9 +169,9 @@ KiInitializeKernel(IN PKPROCESS InitProcess,
|
||||||
LoaderBlock->Prcb = 0;
|
LoaderBlock->Prcb = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
C_ASSERT((PKIPCR)KeGetPcr() == (PKIPCR)0xFFDFF000);
|
//C_ASSERT((PKIPCR)KeGetPcr() == (PKIPCR)0xFFDFF000);
|
||||||
C_ASSERT((FIELD_OFFSET(KIPCR, FirstLevelDcacheSize) & 4) == 0);
|
//C_ASSERT((FIELD_OFFSET(KIPCR, FirstLevelDcacheSize) & 4) == 0);
|
||||||
C_ASSERT(sizeof(KIPCR) <= PAGE_SIZE);
|
//C_ASSERT(sizeof(KIPCR) <= PAGE_SIZE);
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
NTAPI
|
NTAPI
|
||||||
|
@ -175,107 +184,125 @@ KiInitializePcr(IN ULONG ProcessorNumber,
|
||||||
ULONG i;
|
ULONG i;
|
||||||
|
|
||||||
/* Set the Current Thread */
|
/* Set the Current Thread */
|
||||||
Pcr->PrcbData.CurrentThread = IdleThread;
|
Pcr->Prcb.CurrentThread = IdleThread;
|
||||||
|
|
||||||
/* Set pointers to ourselves */
|
/* Set pointers to ourselves */
|
||||||
Pcr->Self = (PKPCR)Pcr;
|
Pcr->Self = (PKPCR)Pcr;
|
||||||
Pcr->Prcb = &Pcr->PrcbData;
|
Pcr->CurrentPrcb = &Pcr->Prcb;
|
||||||
|
|
||||||
/* Set the PCR Version */
|
/* Set the PCR Version */
|
||||||
Pcr->MajorVersion = PCR_MAJOR_VERSION;
|
Pcr->MajorVersion = PCR_MAJOR_VERSION;
|
||||||
Pcr->MinorVersion = PCR_MINOR_VERSION;
|
Pcr->MinorVersion = PCR_MINOR_VERSION;
|
||||||
|
|
||||||
/* Set the PCRB Version */
|
/* Set the PCRB Version */
|
||||||
Pcr->PrcbData.MajorVersion = 1;
|
Pcr->Prcb.MajorVersion = 1;
|
||||||
Pcr->PrcbData.MinorVersion = 1;
|
Pcr->Prcb.MinorVersion = 1;
|
||||||
|
|
||||||
/* Set the Build Type */
|
/* Set the Build Type */
|
||||||
Pcr->PrcbData.BuildType = 0;
|
Pcr->Prcb.BuildType = 0;
|
||||||
#ifndef CONFIG_SMP
|
#ifndef CONFIG_SMP
|
||||||
Pcr->PrcbData.BuildType |= PRCB_BUILD_UNIPROCESSOR;
|
Pcr->Prcb.BuildType |= PRCB_BUILD_UNIPROCESSOR;
|
||||||
#endif
|
#endif
|
||||||
#if DBG
|
#if DBG
|
||||||
Pcr->PrcbData.BuildType |= PRCB_BUILD_DEBUG;
|
Pcr->Prcb.BuildType |= PRCB_BUILD_DEBUG;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Set the Processor Number and current Processor Mask */
|
/* Set the Processor Number and current Processor Mask */
|
||||||
Pcr->PrcbData.Number = (UCHAR)ProcessorNumber;
|
Pcr->Prcb.Number = (UCHAR)ProcessorNumber;
|
||||||
Pcr->PrcbData.SetMember = 1 << ProcessorNumber;
|
Pcr->Prcb.SetMember = 1 << ProcessorNumber;
|
||||||
|
|
||||||
/* Set the PRCB for this Processor */
|
/* Set the PRCB for this Processor */
|
||||||
KiProcessorBlock[ProcessorNumber] = Pcr->Prcb;
|
KiProcessorBlock[ProcessorNumber] = Pcr->CurrentPrcb;
|
||||||
|
|
||||||
/* Start us out at PASSIVE_LEVEL */
|
/* Start us out at PASSIVE_LEVEL */
|
||||||
Pcr->Irql = PASSIVE_LEVEL;
|
Pcr->CurrentIrql = PASSIVE_LEVEL;
|
||||||
|
|
||||||
/* Set the stacks */
|
/* Set the stacks */
|
||||||
Pcr->PanicStack = PanicStack;
|
Pcr->Prcb.PanicStackBase = (ULONG)PanicStack;
|
||||||
Pcr->InterruptStack = InterruptStack;
|
Pcr->Prcb.IsrStack = InterruptStack;
|
||||||
|
#if 0
|
||||||
/* Setup the processor set */
|
/* Setup the processor set */
|
||||||
Pcr->PrcbData.MultiThreadProcessorSet = Pcr->PrcbData.SetMember;
|
Pcr->Prcb.MultiThreadProcessorSet = Pcr->Prcb.SetMember;
|
||||||
|
#endif
|
||||||
|
|
||||||
/* Copy cache information from the loader block */
|
/* Copy cache information from the loader block */
|
||||||
Pcr->FirstLevelDcacheSize = KeLoaderBlock->u.Arm.FirstLevelDcacheSize;
|
Pcr->Prcb.Cache[FirstLevelDcache].Type = CacheData;
|
||||||
Pcr->SecondLevelDcacheSize = KeLoaderBlock->u.Arm.SecondLevelDcacheSize;
|
Pcr->Prcb.Cache[FirstLevelDcache].Level = 1;
|
||||||
Pcr->FirstLevelIcacheSize = KeLoaderBlock->u.Arm.FirstLevelIcacheSize;
|
Pcr->Prcb.Cache[FirstLevelDcache].Associativity = 0; // FIXME
|
||||||
Pcr->SecondLevelIcacheSize = KeLoaderBlock->u.Arm.SecondLevelIcacheSize;
|
Pcr->Prcb.Cache[FirstLevelDcache].LineSize = KeLoaderBlock->u.Arm.FirstLevelDcacheFillSize;
|
||||||
Pcr->FirstLevelDcacheFillSize = KeLoaderBlock->u.Arm.FirstLevelDcacheFillSize;
|
Pcr->Prcb.Cache[FirstLevelDcache].Size = KeLoaderBlock->u.Arm.FirstLevelDcacheSize;
|
||||||
Pcr->SecondLevelDcacheFillSize = KeLoaderBlock->u.Arm.SecondLevelDcacheFillSize;
|
|
||||||
Pcr->FirstLevelIcacheFillSize = KeLoaderBlock->u.Arm.FirstLevelIcacheFillSize;
|
Pcr->Prcb.Cache[SecondLevelDcache].Type = CacheData;
|
||||||
Pcr->SecondLevelIcacheFillSize = KeLoaderBlock->u.Arm.SecondLevelIcacheFillSize;
|
Pcr->Prcb.Cache[SecondLevelDcache].Level = 2;
|
||||||
|
Pcr->Prcb.Cache[SecondLevelDcache].Associativity = 0; // FIXME
|
||||||
|
Pcr->Prcb.Cache[SecondLevelDcache].LineSize = KeLoaderBlock->u.Arm.SecondLevelDcacheFillSize;
|
||||||
|
Pcr->Prcb.Cache[SecondLevelDcache].Size = KeLoaderBlock->u.Arm.SecondLevelDcacheSize;
|
||||||
|
|
||||||
|
Pcr->Prcb.Cache[FirstLevelIcache].Type = CacheInstruction;
|
||||||
|
Pcr->Prcb.Cache[FirstLevelIcache].Level = 1;
|
||||||
|
Pcr->Prcb.Cache[FirstLevelIcache].Associativity = 0; // FIXME
|
||||||
|
Pcr->Prcb.Cache[FirstLevelIcache].LineSize = KeLoaderBlock->u.Arm.FirstLevelIcacheFillSize;
|
||||||
|
Pcr->Prcb.Cache[FirstLevelIcache].Size = KeLoaderBlock->u.Arm.FirstLevelIcacheSize;
|
||||||
|
|
||||||
|
Pcr->Prcb.Cache[SecondLevelIcache].Type = CacheInstruction;
|
||||||
|
Pcr->Prcb.Cache[SecondLevelIcache].Level = 2;
|
||||||
|
Pcr->Prcb.Cache[SecondLevelIcache].Associativity = 0; // FIXME
|
||||||
|
Pcr->Prcb.Cache[SecondLevelIcache].LineSize = KeLoaderBlock->u.Arm.SecondLevelIcacheFillSize;
|
||||||
|
Pcr->Prcb.Cache[SecondLevelIcache].Size = KeLoaderBlock->u.Arm.SecondLevelIcacheSize;
|
||||||
|
|
||||||
/* Set global d-cache fill and alignment values */
|
/* Set global d-cache fill and alignment values */
|
||||||
if (!Pcr->SecondLevelDcacheSize)
|
if (Pcr->Prcb.Cache[SecondLevelDcache].Size == 0)
|
||||||
{
|
{
|
||||||
/* Use the first level */
|
/* Use the first level */
|
||||||
Pcr->DcacheFillSize = Pcr->FirstLevelDcacheSize;
|
Pcr->Prcb.Cache[GlobalDcache] = Pcr->Prcb.Cache[FirstLevelDcache];
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Use the second level */
|
/* Use the second level */
|
||||||
Pcr->DcacheFillSize = Pcr->SecondLevelDcacheSize;
|
Pcr->Prcb.Cache[GlobalDcache] = Pcr->Prcb.Cache[SecondLevelDcache];
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set the alignment */
|
/* Set the alignment */
|
||||||
Pcr->DcacheAlignment = Pcr->DcacheFillSize - 1;
|
//Pcr->DcacheAlignment = Pcr->DcacheFillSize - 1;
|
||||||
|
|
||||||
/* Set global i-cache fill and alignment values */
|
/* Set global i-cache fill and alignment values */
|
||||||
if (!Pcr->SecondLevelIcacheSize)
|
if (Pcr->Prcb.Cache[SecondLevelIcache].Size == 0)
|
||||||
{
|
{
|
||||||
/* Use the first level */
|
/* Use the first level */
|
||||||
Pcr->IcacheFillSize = Pcr->FirstLevelIcacheSize;
|
Pcr->Prcb.Cache[GlobalIcache] = Pcr->Prcb.Cache[FirstLevelIcache];
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
/* Use the second level */
|
/* Use the second level */
|
||||||
Pcr->IcacheFillSize = Pcr->SecondLevelIcacheSize;
|
Pcr->Prcb.Cache[GlobalIcache] = Pcr->Prcb.Cache[SecondLevelIcache];
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set the alignment */
|
/* Set the alignment */
|
||||||
Pcr->IcacheAlignment = Pcr->IcacheFillSize - 1;
|
//Pcr->IcacheAlignment = Pcr->IcacheFillSize - 1;
|
||||||
|
|
||||||
/* Set processor information */
|
/* Set processor information */
|
||||||
Pcr->ProcessorId = KeArmIdCodeRegisterGet().AsUlong;
|
//Pcr->ProcessorId = KeArmIdCodeRegisterGet().AsUlong;
|
||||||
|
|
||||||
/* Set all interrupt routines to unexpected interrupts as well */
|
/* Set all interrupt routines to unexpected interrupts as well */
|
||||||
for (i = 0; i < MAXIMUM_VECTOR; i++)
|
for (i = 0; i < MAXIMUM_VECTOR; i++)
|
||||||
{
|
{
|
||||||
/* Point to the same template */
|
/* Point to the same template */
|
||||||
Pcr->InterruptRoutine[i] = (PVOID)&KxUnexpectedInterrupt.DispatchCode;
|
Pcr->Idt[i] = (PVOID)&KxUnexpectedInterrupt.DispatchCode;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Set default stall factor */
|
/* Set default stall factor */
|
||||||
Pcr->StallScaleFactor = 50;
|
Pcr->StallScaleFactor = 50;
|
||||||
|
|
||||||
/* Setup software interrupts */
|
/* Setup software interrupts */
|
||||||
Pcr->InterruptRoutine[PASSIVE_LEVEL] = KiPassiveRelease;
|
Pcr->Idt[PASSIVE_LEVEL] = KiPassiveRelease;
|
||||||
Pcr->InterruptRoutine[APC_LEVEL] = KiApcInterrupt;
|
Pcr->Idt[APC_LEVEL] = KiApcInterrupt;
|
||||||
Pcr->InterruptRoutine[DISPATCH_LEVEL] = KiDispatchInterrupt;
|
Pcr->Idt[DISPATCH_LEVEL] = KiDispatchInterrupt;
|
||||||
|
#if 0
|
||||||
Pcr->ReservedVectors = (1 << PASSIVE_LEVEL) |
|
Pcr->ReservedVectors = (1 << PASSIVE_LEVEL) |
|
||||||
(1 << APC_LEVEL) |
|
(1 << APC_LEVEL) |
|
||||||
(1 << DISPATCH_LEVEL) |
|
(1 << DISPATCH_LEVEL) |
|
||||||
(1 << IPI_LEVEL);
|
(1 << IPI_LEVEL);
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
|
@ -345,16 +372,14 @@ KiInitializeSystem(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
|
||||||
|
|
||||||
AppCpuInit:
|
AppCpuInit:
|
||||||
/* Setup CPU-related fields */
|
/* Setup CPU-related fields */
|
||||||
Pcr->Number = Cpu;
|
Pcr->Prcb.Number = Cpu;
|
||||||
Pcr->SetMember = 1 << Cpu;
|
Pcr->Prcb.SetMember = 1 << Cpu;
|
||||||
Pcr->SetMemberCopy = 1 << Cpu;
|
|
||||||
Pcr->PrcbData.SetMember = 1 << Cpu;
|
|
||||||
|
|
||||||
/* Initialize the Processor with HAL */
|
/* Initialize the Processor with HAL */
|
||||||
HalInitializeProcessor(Cpu, KeLoaderBlock);
|
HalInitializeProcessor(Cpu, KeLoaderBlock);
|
||||||
|
|
||||||
/* Set active processors */
|
/* Set active processors */
|
||||||
KeActiveProcessors |= Pcr->SetMember;
|
KeActiveProcessors |= Pcr->Prcb.SetMember;
|
||||||
KeNumberProcessors++;
|
KeNumberProcessors++;
|
||||||
|
|
||||||
/* Check if this is the boot CPU */
|
/* Check if this is the boot CPU */
|
||||||
|
@ -382,8 +407,8 @@ AppCpuInit:
|
||||||
KiInitializeKernel((PKPROCESS)LoaderBlock->Process,
|
KiInitializeKernel((PKPROCESS)LoaderBlock->Process,
|
||||||
(PKTHREAD)LoaderBlock->Thread,
|
(PKTHREAD)LoaderBlock->Thread,
|
||||||
(PVOID)LoaderBlock->KernelStack,
|
(PVOID)LoaderBlock->KernelStack,
|
||||||
Pcr->Prcb,
|
&Pcr->Prcb,
|
||||||
Pcr->Prcb->Number,
|
Pcr->Prcb.Number,
|
||||||
KeLoaderBlock);
|
KeLoaderBlock);
|
||||||
|
|
||||||
/* Set the priority of this thread to 0 */
|
/* Set the priority of this thread to 0 */
|
||||||
|
|
|
@ -101,7 +101,7 @@ KiInitializeContextThread(IN PKTHREAD Thread,
|
||||||
//
|
//
|
||||||
// Clear the return address
|
// Clear the return address
|
||||||
//
|
//
|
||||||
ExceptionFrame->Lr = 0;
|
ExceptionFrame->Return = 0;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Context switch frame to setup below
|
// Context switch frame to setup below
|
||||||
|
@ -131,7 +131,7 @@ KiInitializeContextThread(IN PKTHREAD Thread,
|
||||||
//
|
//
|
||||||
// Now setup the context switch frame
|
// Now setup the context switch frame
|
||||||
//
|
//
|
||||||
CtxSwitchFrame->Lr = (ULONG)KiThreadStartup;
|
CtxSwitchFrame->Return = (ULONG)KiThreadStartup;
|
||||||
CtxSwitchFrame->R11 = (ULONG)(ExceptionFrame ? ExceptionFrame : CtxSwitchFrame);
|
CtxSwitchFrame->R11 = (ULONG)(ExceptionFrame ? ExceptionFrame : CtxSwitchFrame);
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -221,7 +221,7 @@ KiSwapContextExit(IN PKTHREAD OldThread,
|
||||||
ARM_TTB_REGISTER TtbRegister;
|
ARM_TTB_REGISTER TtbRegister;
|
||||||
|
|
||||||
/* We are on the new thread stack now */
|
/* We are on the new thread stack now */
|
||||||
NewThread = Pcr->PrcbData.CurrentThread;
|
NewThread = Pcr->Prcb.CurrentThread;
|
||||||
|
|
||||||
/* Now we are the new thread. Check if it's in a new process */
|
/* Now we are the new thread. Check if it's in a new process */
|
||||||
OldProcess = OldThread->ApcState.Process;
|
OldProcess = OldThread->ApcState.Process;
|
||||||
|
@ -236,11 +236,8 @@ KiSwapContextExit(IN PKTHREAD OldThread,
|
||||||
/* Increase thread context switches */
|
/* Increase thread context switches */
|
||||||
NewThread->ContextSwitches++;
|
NewThread->ContextSwitches++;
|
||||||
|
|
||||||
/* Load data from switch frame */
|
|
||||||
Pcr->NtTib.ExceptionList = SwitchFrame->ExceptionList;
|
|
||||||
|
|
||||||
/* DPCs shouldn't be active */
|
/* DPCs shouldn't be active */
|
||||||
if (Pcr->PrcbData.DpcRoutineActive)
|
if (Pcr->Prcb.DpcRoutineActive)
|
||||||
{
|
{
|
||||||
/* Crash the machine */
|
/* Crash the machine */
|
||||||
KeBugCheckEx(ATTEMPTED_SWITCH_FROM_DPC,
|
KeBugCheckEx(ATTEMPTED_SWITCH_FROM_DPC,
|
||||||
|
@ -276,20 +273,21 @@ KiSwapContextEntry(IN PKSWITCHFRAME SwitchFrame,
|
||||||
|
|
||||||
/* Save APC bypass disable */
|
/* Save APC bypass disable */
|
||||||
SwitchFrame->ApcBypassDisable = OldThreadAndApcFlag & 3;
|
SwitchFrame->ApcBypassDisable = OldThreadAndApcFlag & 3;
|
||||||
SwitchFrame->ExceptionList = Pcr->NtTib.ExceptionList;
|
|
||||||
|
|
||||||
/* Increase context switch count and check if tracing is enabled */
|
/* Increase context switch count and check if tracing is enabled */
|
||||||
Pcr->ContextSwitches++;
|
Pcr->Prcb.KeContextSwitches++;
|
||||||
|
#if 0
|
||||||
if (Pcr->PerfGlobalGroupMask)
|
if (Pcr->PerfGlobalGroupMask)
|
||||||
{
|
{
|
||||||
/* We don't support this yet on x86 either */
|
/* We don't support this yet on x86 either */
|
||||||
DPRINT1("WMI Tracing not supported\n");
|
DPRINT1("WMI Tracing not supported\n");
|
||||||
ASSERT(FALSE);
|
ASSERT(FALSE);
|
||||||
}
|
}
|
||||||
|
#endif // 0
|
||||||
|
|
||||||
/* Get thread pointers */
|
/* Get thread pointers */
|
||||||
OldThread = (PKTHREAD)(OldThreadAndApcFlag & ~3);
|
OldThread = (PKTHREAD)(OldThreadAndApcFlag & ~3);
|
||||||
NewThread = Pcr->PrcbData.CurrentThread;
|
NewThread = Pcr->Prcb.CurrentThread;
|
||||||
|
|
||||||
/* Get the old thread and set its kernel stack */
|
/* Get the old thread and set its kernel stack */
|
||||||
OldThread->KernelStack = SwitchFrame;
|
OldThread->KernelStack = SwitchFrame;
|
||||||
|
@ -303,8 +301,7 @@ NTAPI
|
||||||
KiDispatchInterrupt(VOID)
|
KiDispatchInterrupt(VOID)
|
||||||
{
|
{
|
||||||
PKIPCR Pcr = (PKIPCR)KeGetPcr();
|
PKIPCR Pcr = (PKIPCR)KeGetPcr();
|
||||||
PKPRCB Prcb = &Pcr->PrcbData;
|
PKPRCB Prcb = &Pcr->Prcb;
|
||||||
PVOID OldHandler;
|
|
||||||
PKTHREAD NewThread, OldThread;
|
PKTHREAD NewThread, OldThread;
|
||||||
|
|
||||||
/* Disable interrupts */
|
/* Disable interrupts */
|
||||||
|
@ -315,17 +312,10 @@ KiDispatchInterrupt(VOID)
|
||||||
(Prcb->TimerRequest) ||
|
(Prcb->TimerRequest) ||
|
||||||
(Prcb->DeferredReadyListHead.Next))
|
(Prcb->DeferredReadyListHead.Next))
|
||||||
{
|
{
|
||||||
/* Switch to safe execution context */
|
|
||||||
OldHandler = Pcr->NtTib.ExceptionList;
|
|
||||||
Pcr->NtTib.ExceptionList = EXCEPTION_CHAIN_END;
|
|
||||||
|
|
||||||
/* Retire DPCs while under the DPC stack */
|
/* Retire DPCs while under the DPC stack */
|
||||||
//KiRetireDpcListInDpcStack(Prcb, Prcb->DpcStack);
|
//KiRetireDpcListInDpcStack(Prcb, Prcb->DpcStack);
|
||||||
// FIXME!!! //
|
// FIXME!!! //
|
||||||
KiRetireDpcList(Prcb);
|
KiRetireDpcList(Prcb);
|
||||||
|
|
||||||
/* Restore context */
|
|
||||||
Pcr->NtTib.ExceptionList = OldHandler;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Re-enable interrupts */
|
/* Re-enable interrupts */
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
/* INCLUDES *******************************************************************/
|
/* INCLUDES *******************************************************************/
|
||||||
|
|
||||||
#include <ntoskrnl.h>
|
#include <ntoskrnl.h>
|
||||||
#include <internal/arm/ksarm.h>
|
|
||||||
#define NDEBUG
|
#define NDEBUG
|
||||||
#include <debug.h>
|
#include <debug.h>
|
||||||
|
|
||||||
|
@ -355,22 +354,22 @@ KiInterruptHandler(IN PKTRAP_FRAME TrapFrame,
|
||||||
IN ULONG Reserved)
|
IN ULONG Reserved)
|
||||||
{
|
{
|
||||||
KIRQL OldIrql, Irql;
|
KIRQL OldIrql, Irql;
|
||||||
ULONG InterruptCause, InterruptMask;
|
ULONG InterruptCause;//, InterruptMask;
|
||||||
PKIPCR Pcr;
|
PKIPCR Pcr;
|
||||||
PKTRAP_FRAME OldTrapFrame;
|
PKTRAP_FRAME OldTrapFrame;
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Increment interrupt count
|
// Increment interrupt count
|
||||||
//
|
//
|
||||||
Pcr = (PKIPCR)KeGetPcr();
|
Pcr = (PKIPCR)KeGetPcr();
|
||||||
Pcr->Prcb->InterruptCount++;
|
Pcr->Prcb.InterruptCount++;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Get the old IRQL
|
// Get the old IRQL
|
||||||
//
|
//
|
||||||
OldIrql = KeGetCurrentIrql();
|
OldIrql = KeGetCurrentIrql();
|
||||||
TrapFrame->OldIrql = OldIrql;
|
TrapFrame->PreviousIrql = OldIrql;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Get the interrupt source
|
// Get the interrupt source
|
||||||
|
@ -381,8 +380,11 @@ KiInterruptHandler(IN PKTRAP_FRAME TrapFrame,
|
||||||
//
|
//
|
||||||
// Get the new IRQL and Interrupt Mask
|
// Get the new IRQL and Interrupt Mask
|
||||||
//
|
//
|
||||||
Irql = Pcr->IrqlMask[InterruptCause];
|
/// FIXME: use a global table in ntoskrnl instead of HAL?
|
||||||
InterruptMask = Pcr->IrqlTable[Irql];
|
//Irql = Pcr->IrqlMask[InterruptCause];
|
||||||
|
//InterruptMask = Pcr->IrqlTable[Irql];
|
||||||
|
Irql = 0;
|
||||||
|
__debugbreak();
|
||||||
|
|
||||||
//
|
//
|
||||||
// Raise to the new IRQL
|
// Raise to the new IRQL
|
||||||
|
@ -417,7 +419,9 @@ KiInterruptHandler(IN PKTRAP_FRAME TrapFrame,
|
||||||
//
|
//
|
||||||
// Call the registered interrupt routine
|
// Call the registered interrupt routine
|
||||||
//
|
//
|
||||||
Pcr->InterruptRoutine[Irql]();
|
/// FIXME: this should probably go into a table in ntoskrnl
|
||||||
|
//Pcr->InterruptRoutine[Irql]();
|
||||||
|
__debugbreak();
|
||||||
ASSERT(KeGetCurrentThread()->TrapFrame == TrapFrame);
|
ASSERT(KeGetCurrentThread()->TrapFrame == TrapFrame);
|
||||||
KeGetCurrentThread()->TrapFrame = OldTrapFrame;
|
KeGetCurrentThread()->TrapFrame = OldTrapFrame;
|
||||||
// DPRINT1("[ISR RETURN]\n");
|
// DPRINT1("[ISR RETURN]\n");
|
||||||
|
@ -433,13 +437,13 @@ NTSTATUS
|
||||||
KiPrefetchAbortHandler(IN PKTRAP_FRAME TrapFrame)
|
KiPrefetchAbortHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
{
|
{
|
||||||
PVOID Address = (PVOID)KeArmFaultAddressRegisterGet();
|
PVOID Address = (PVOID)KeArmFaultAddressRegisterGet();
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
ULONG Instruction = *(PULONG)TrapFrame->Pc;
|
ULONG Instruction = *(PULONG)TrapFrame->Pc;
|
||||||
ULONG DebugType, Parameter0;
|
ULONG DebugType, Parameter0;
|
||||||
EXCEPTION_RECORD ExceptionRecord;
|
EXCEPTION_RECORD ExceptionRecord;
|
||||||
|
|
||||||
DPRINT1("[PREFETCH ABORT] (%x) @ %p/%p/%p\n",
|
DPRINT1("[PREFETCH ABORT] (%x) @ %p/%p/%p\n",
|
||||||
KeArmInstructionFaultStatusRegisterGet(), Address, TrapFrame->SvcLr, TrapFrame->Pc);
|
KeArmInstructionFaultStatusRegisterGet(), Address, TrapFrame->Lr, TrapFrame->Pc);
|
||||||
while (TRUE);
|
while (TRUE);
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -514,10 +518,10 @@ KiDataAbortHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
{
|
{
|
||||||
NTSTATUS Status;
|
NTSTATUS Status;
|
||||||
PVOID Address = (PVOID)KeArmFaultAddressRegisterGet();
|
PVOID Address = (PVOID)KeArmFaultAddressRegisterGet();
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
|
|
||||||
DPRINT1("[ABORT] (%x) @ %p/%p/%p\n",
|
DPRINT1("[ABORT] (%x) @ %p/%p/%p\n",
|
||||||
KeArmFaultStatusRegisterGet(), Address, TrapFrame->SvcLr, TrapFrame->Pc);
|
KeArmFaultStatusRegisterGet(), Address, TrapFrame->Lr, TrapFrame->Pc);
|
||||||
while (TRUE);
|
while (TRUE);
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -546,9 +550,9 @@ KiSoftwareInterruptHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
PKTHREAD Thread;
|
PKTHREAD Thread;
|
||||||
KPROCESSOR_MODE PreviousMode;
|
KPROCESSOR_MODE PreviousMode;
|
||||||
ULONG Instruction;
|
ULONG Instruction;
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
|
|
||||||
DPRINT1("[SWI] @ %p/%p\n", TrapFrame->SvcLr, TrapFrame->Pc);
|
DPRINT1("[SWI] @ %p/%p\n", TrapFrame->Lr, TrapFrame->Pc);
|
||||||
while (TRUE);
|
while (TRUE);
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -565,7 +569,7 @@ KiSoftwareInterruptHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
// Save old previous mode
|
// Save old previous mode
|
||||||
//
|
//
|
||||||
TrapFrame->PreviousMode = PreviousMode;
|
TrapFrame->PreviousMode = PreviousMode;
|
||||||
TrapFrame->PreviousTrapFrame = (ULONG_PTR)Thread->TrapFrame;
|
TrapFrame->TrapFrame = (ULONG_PTR)Thread->TrapFrame;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Save previous mode and trap frame
|
// Save previous mode and trap frame
|
||||||
|
@ -587,12 +591,12 @@ KiSoftwareInterruptHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
NTSTATUS
|
NTSTATUS
|
||||||
KiUndefinedExceptionHandler(IN PKTRAP_FRAME TrapFrame)
|
KiUndefinedExceptionHandler(IN PKTRAP_FRAME TrapFrame)
|
||||||
{
|
{
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
|
|
||||||
//
|
//
|
||||||
// This should never happen
|
// This should never happen
|
||||||
//
|
//
|
||||||
DPRINT1("[UNDEF] @ %p/%p\n", TrapFrame->SvcLr, TrapFrame->Pc);
|
DPRINT1("[UNDEF] @ %p/%p\n", TrapFrame->Lr, TrapFrame->Pc);
|
||||||
UNIMPLEMENTED;
|
UNIMPLEMENTED;
|
||||||
ASSERT(FALSE);
|
ASSERT(FALSE);
|
||||||
return STATUS_SUCCESS;
|
return STATUS_SUCCESS;
|
||||||
|
|
|
@ -9,7 +9,6 @@
|
||||||
/* INCLUDES *******************************************************************/
|
/* INCLUDES *******************************************************************/
|
||||||
|
|
||||||
#include <ntoskrnl.h>
|
#include <ntoskrnl.h>
|
||||||
#include <internal/arm/ksarm.h>
|
|
||||||
#define NDEBUG
|
#define NDEBUG
|
||||||
#include <debug.h>
|
#include <debug.h>
|
||||||
|
|
||||||
|
@ -92,13 +91,13 @@ KiSystemService(IN PKTHREAD Thread,
|
||||||
PVOID* Argument;
|
PVOID* Argument;
|
||||||
PVOID Arguments[0x11]; // Maximum 17 arguments
|
PVOID Arguments[0x11]; // Maximum 17 arguments
|
||||||
KIRQL OldIrql;
|
KIRQL OldIrql;
|
||||||
ASSERT(TrapFrame->DbgArgMark == 0xBADB0D00);
|
ASSERT(TrapFrame->Reserved == 0xBADB0D00);
|
||||||
|
|
||||||
//
|
//
|
||||||
// Increase count of system calls
|
// Increase count of system calls
|
||||||
//
|
//
|
||||||
Pcr = (PKPCR)KeGetPcr();
|
Pcr = KeGetPcr();
|
||||||
Pcr->Prcb->KeSystemCalls++;
|
Pcr->CurrentPrcb->KeSystemCalls++;
|
||||||
|
|
||||||
//
|
//
|
||||||
// Get the system call ID
|
// Get the system call ID
|
||||||
|
@ -178,7 +177,7 @@ KiSystemService(IN PKTHREAD Thread,
|
||||||
// FIXME-USER: Validate the user stack
|
// FIXME-USER: Validate the user stack
|
||||||
//
|
//
|
||||||
ASSERT(FALSE);
|
ASSERT(FALSE);
|
||||||
Argument = (PVOID*)TrapFrame->UserSp;
|
Argument = (PVOID*)TrapFrame->Sp;
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
|
@ -226,7 +225,7 @@ KiSystemService(IN PKTHREAD Thread,
|
||||||
//
|
//
|
||||||
// Forcibly put us in a sane state
|
// Forcibly put us in a sane state
|
||||||
//
|
//
|
||||||
KeGetPcr()->Irql = 0;
|
KeGetPcr()->CurrentIrql = 0;
|
||||||
_disable();
|
_disable();
|
||||||
|
|
||||||
//
|
//
|
||||||
|
@ -259,7 +258,7 @@ KiSystemService(IN PKTHREAD Thread,
|
||||||
//
|
//
|
||||||
// Restore the old trap frame
|
// Restore the old trap frame
|
||||||
//
|
//
|
||||||
Thread->TrapFrame = (PKTRAP_FRAME)TrapFrame->PreviousTrapFrame;
|
Thread->TrapFrame = KiGetLinkedTrapFrame(TrapFrame);
|
||||||
}
|
}
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
|
@ -301,7 +300,40 @@ KiInitializeUserApc(IN PKEXCEPTION_FRAME ExceptionFrame,
|
||||||
TrapFrame->R1 = (ULONG)SystemArgument1;
|
TrapFrame->R1 = (ULONG)SystemArgument1;
|
||||||
TrapFrame->R2 = (ULONG)SystemArgument2;
|
TrapFrame->R2 = (ULONG)SystemArgument2;
|
||||||
TrapFrame->R3 = (ULONG)NormalRoutine;
|
TrapFrame->R3 = (ULONG)NormalRoutine;
|
||||||
TrapFrame->R8 = Stack;
|
TrapFrame->Sp = Stack;
|
||||||
TrapFrame->UserSp = Stack;
|
TrapFrame->Lr = (ULONG)KeUserApcDispatcher;
|
||||||
TrapFrame->UserLr = (ULONG)KeUserApcDispatcher;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
NTSTATUS
|
||||||
|
NTAPI
|
||||||
|
KeUserModeCallback(IN ULONG RoutineIndex,
|
||||||
|
IN PVOID Argument,
|
||||||
|
IN ULONG ArgumentLength,
|
||||||
|
OUT PVOID *Result,
|
||||||
|
OUT PULONG ResultLength)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
return STATUS_NOT_IMPLEMENTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
NTSTATUS
|
||||||
|
NTAPI
|
||||||
|
KiCallUserMode(
|
||||||
|
IN PVOID *OutputBuffer,
|
||||||
|
IN PULONG OutputLength)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
return STATUS_NOT_IMPLEMENTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
NTSTATUS
|
||||||
|
NTAPI
|
||||||
|
NtCallbackReturn(
|
||||||
|
_In_ PVOID Result,
|
||||||
|
_In_ ULONG ResultLength,
|
||||||
|
_In_ NTSTATUS CallbackStatus)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
return STATUS_NOT_IMPLEMENTED;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -167,6 +167,9 @@ KiIpiServiceRoutine(IN PKTRAP_FRAME TrapFrame,
|
||||||
|
|
||||||
if (InterlockedBitTestAndReset((PLONG)&Prcb->IpiFrozen, IPI_SYNCH_REQUEST))
|
if (InterlockedBitTestAndReset((PLONG)&Prcb->IpiFrozen, IPI_SYNCH_REQUEST))
|
||||||
{
|
{
|
||||||
|
#ifdef _M_ARM
|
||||||
|
DbgBreakPoint();
|
||||||
|
#else
|
||||||
(void)InterlockedDecrementUL(&Prcb->SignalDone->CurrentPacket[1]);
|
(void)InterlockedDecrementUL(&Prcb->SignalDone->CurrentPacket[1]);
|
||||||
if (InterlockedCompareExchangeUL(&Prcb->SignalDone->CurrentPacket[2], 0, 0))
|
if (InterlockedCompareExchangeUL(&Prcb->SignalDone->CurrentPacket[2], 0, 0))
|
||||||
{
|
{
|
||||||
|
@ -179,6 +182,7 @@ KiIpiServiceRoutine(IN PKTRAP_FRAME TrapFrame,
|
||||||
while (0 != InterlockedCompareExchangeUL(&Prcb->SignalDone->TargetSet, 0, 0));
|
while (0 != InterlockedCompareExchangeUL(&Prcb->SignalDone->TargetSet, 0, 0));
|
||||||
}
|
}
|
||||||
(void)InterlockedExchangePointer((PVOID*)&Prcb->SignalDone, NULL);
|
(void)InterlockedExchangePointer((PVOID*)&Prcb->SignalDone, NULL);
|
||||||
|
#endif // _M_ARM
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
return TRUE;
|
return TRUE;
|
||||||
|
|
|
@ -530,7 +530,12 @@ KeStartThread(IN OUT PKTHREAD Thread)
|
||||||
NodePrcb = KiProcessorBlock[Process->ThreadSeed];
|
NodePrcb = KiProcessorBlock[Process->ThreadSeed];
|
||||||
|
|
||||||
/* Calculate affinity mask */
|
/* Calculate affinity mask */
|
||||||
|
#ifdef _M_ARM
|
||||||
|
DbgBreakPoint();
|
||||||
|
Set = 0;
|
||||||
|
#else
|
||||||
Set = ~NodePrcb->MultiThreadProcessorSet;
|
Set = ~NodePrcb->MultiThreadProcessorSet;
|
||||||
|
#endif
|
||||||
Mask = (ULONG)(Node->ProcessorMask & Process->Affinity);
|
Mask = (ULONG)(Node->ProcessorMask & Process->Affinity);
|
||||||
Set &= Mask;
|
Set &= Mask;
|
||||||
if (Set) Mask = Set;
|
if (Set) Mask = Set;
|
||||||
|
|
|
@ -725,7 +725,7 @@ KiSetAffinityThread(IN PKTHREAD Thread,
|
||||||
#elif _M_AMD64
|
#elif _M_AMD64
|
||||||
#define KiGetCurrentReadySummary() __readgsdword(FIELD_OFFSET(KIPCR, Prcb.ReadySummary))
|
#define KiGetCurrentReadySummary() __readgsdword(FIELD_OFFSET(KIPCR, Prcb.ReadySummary))
|
||||||
#else
|
#else
|
||||||
#error Implement me!
|
#define KiGetCurrentReadySummary() KeGetCurrentPrcb()->ReadySummary
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
|
@ -1555,6 +1555,10 @@ MmArmAccessFault(IN BOOLEAN StoreInstruction,
|
||||||
DbgPrint("MM:***RIP %p, EFL %p\n", TrapFrame->Rip, TrapFrame->EFlags);
|
DbgPrint("MM:***RIP %p, EFL %p\n", TrapFrame->Rip, TrapFrame->EFlags);
|
||||||
DbgPrint("MM:***RAX %p, RCX %p RDX %p\n", TrapFrame->Rax, TrapFrame->Rcx, TrapFrame->Rdx);
|
DbgPrint("MM:***RAX %p, RCX %p RDX %p\n", TrapFrame->Rax, TrapFrame->Rcx, TrapFrame->Rdx);
|
||||||
DbgPrint("MM:***RBX %p, RSI %p RDI %p\n", TrapFrame->Rbx, TrapFrame->Rsi, TrapFrame->Rdi);
|
DbgPrint("MM:***RBX %p, RSI %p RDI %p\n", TrapFrame->Rbx, TrapFrame->Rsi, TrapFrame->Rdi);
|
||||||
|
#elif defined(_M_ARM)
|
||||||
|
DbgPrint("MM:***PC %p\n", TrapFrame->Pc);
|
||||||
|
DbgPrint("MM:***R0 %p, R1 %p R2 %p, R3 %p\n", TrapFrame->R0, TrapFrame->R1, TrapFrame->R2, TrapFrame->R3);
|
||||||
|
DbgPrint("MM:***R11 %p, R12 %p SP %p, LR %p\n", TrapFrame->R11, TrapFrame->R12, TrapFrame->Sp, TrapFrame->Lr);
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -117,6 +117,10 @@ MMPTE DemandZeroPte = {.u.Long = (MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BI
|
||||||
/* Template PTE for prototype page */
|
/* Template PTE for prototype page */
|
||||||
MMPTE PrototypePte = {.u.Long = (MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS) | PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << PAGE_SHIFT)};
|
MMPTE PrototypePte = {.u.Long = (MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS) | PTE_PROTOTYPE | (MI_PTE_LOOKUP_NEEDED << PAGE_SHIFT)};
|
||||||
|
|
||||||
|
MMPTE ValidKernelPteLocal = {{0}};
|
||||||
|
MMPDE ValidKernelPdeLocal = {{0}};
|
||||||
|
MMPTE MmDecommittedPte = {{0}};
|
||||||
|
|
||||||
/* PRIVATE FUNCTIONS **********************************************************/
|
/* PRIVATE FUNCTIONS **********************************************************/
|
||||||
|
|
||||||
VOID
|
VOID
|
||||||
|
@ -290,3 +294,29 @@ MmInitGlobalKernelPageDirectory(VOID)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
VOID
|
||||||
|
NTAPI
|
||||||
|
MmGetPageFileMapping(
|
||||||
|
PEPROCESS Process,
|
||||||
|
PVOID Address,
|
||||||
|
SWAPENTRY* SwapEntry)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
}
|
||||||
|
|
||||||
|
BOOLEAN
|
||||||
|
NTAPI
|
||||||
|
MmIsDisabledPage(PEPROCESS Process, PVOID Address)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
return FALSE;
|
||||||
|
}
|
||||||
|
|
||||||
|
VOID
|
||||||
|
NTAPI
|
||||||
|
INIT_FUNCTION
|
||||||
|
MiInitializeSessionSpaceLayout(VOID)
|
||||||
|
{
|
||||||
|
NT_ASSERT(FALSE);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
|
@ -506,7 +506,7 @@ RtlWalkFrameChain(OUT PVOID *Callers,
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef _AMD64_
|
#if defined(_M_AMD64) || defined(_M_ARM)
|
||||||
VOID
|
VOID
|
||||||
NTAPI
|
NTAPI
|
||||||
RtlpGetStackLimits(
|
RtlpGetStackLimits(
|
||||||
|
|
Loading…
Reference in a new issue