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[HAL]
Fix amd64 build svn path=/trunk/; revision=53704
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parent
ca9e3a9c67
commit
a6a01dd912
5 changed files with 41 additions and 37 deletions
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@ -19,7 +19,7 @@ BOOLEAN HalpPciLockSettings;
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/* PRIVATE FUNCTIONS *********************************************************/
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/* FUNCTIONS *****************************************************************/
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#if 0
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VOID
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NTAPI
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HalpInitProcessor(
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@ -49,4 +49,5 @@ HalpInitPhase1(VOID)
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}
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#endif
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@ -28,26 +28,6 @@ HaliHaltSystem(VOID)
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/* FUNCTIONS *****************************************************************/
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/*
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* @implemented
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*/
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VOID
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NTAPI
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HalInitializeProcessor(IN ULONG ProcessorNumber,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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/* Set default stall count */
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KeGetPcr()->StallScaleFactor = INITIAL_STALL_COUNT;
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/* Update the interrupt affinity and processor mask */
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InterlockedBitTestAndSet((PLONG)&HalpActiveProcessors, ProcessorNumber);
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InterlockedBitTestAndSet((PLONG)&HalpDefaultInterruptAffinity,
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ProcessorNumber);
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/* Register routines for KDCOM */
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//HalpRegisterKdSupportFunctions();
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}
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/*
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* @implemented
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*/
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@ -18,7 +18,9 @@
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#include "apic.h"
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void HackEoi(void);
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#ifndef _M_AMD64
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#define APIC_LAZY_IRQL
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#endif
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/* GLOBALS ********************************************************************/
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@ -393,9 +395,10 @@ ApicInitializeLocalApic(ULONG Cpu)
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/* Set the IRQL from the PCR */
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ApicWrite(APIC_TPR, IrqlToTpr(KeGetPcr()->Irql));
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#ifdef APIC_LAZY_IRQL
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/* Save the new hard IRQL in the IRR field */
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KeGetPcr()->IRR = KeGetPcr()->Irql;
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#endif
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}
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UCHAR
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@ -549,6 +552,7 @@ HalpInitializePICs(IN BOOLEAN EnableInterrupts)
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/* SOFTWARE INTERRUPT TRAPS ***************************************************/
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#ifndef _M_AMD64
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VOID
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DECLSPEC_NORETURN
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FASTCALL
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@ -598,7 +602,6 @@ HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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KiEoiHelper(TrapFrame);
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}
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#ifndef _M_AMD64
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VOID
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DECLSPEC_NORETURN
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FASTCALL
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@ -15,7 +15,8 @@
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#define APIC_PROFILE_VECTOR 0xFD // IRQL 31
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#define APIC_NMI_VECTOR 0xFF
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#define IrqlToTpr(Irql) (Irql << 4)
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#define TprToIrql(Tpr) (Tpr >> 4)
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#define TprToIrql(Tpr) ((KIRQL)(Tpr >> 4))
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#define CLOCK2_LEVEL CLOCK_LEVEL
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#else
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#define APIC_BASE 0xFFFE0000
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#define IOAPIC_BASE 0xFFFE1000 // checkme
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@ -14,20 +14,46 @@
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#include <ksamd64.inc>
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#include <trapamd64.inc>
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#define KI_PUSH_FAKE_ERROR_CODE TF_PUSH_FAKE_ERROR_CODE
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.code
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TRAP_ENTRY HalpClockInterrupt, KI_PUSH_FAKE_ERROR_CODE
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TRAP_ENTRY HalpProfileInterrupt, KI_PUSH_FAKE_ERROR_CODE
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PUBLIC ApicSpuriousService
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ApicSpuriousService:
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iret
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PUBLIC HackEoi
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HackEoi:
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xor rax, rax
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mov ax, ss
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push rax
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push rsp
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pushfq
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mov ax, cs
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push rax
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lea rax, HackEoiReturn[rip]
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push rax
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mov dword ptr [HEX(0FFFFFFFFFEE000B0)], 0
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iretq
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HackEoiReturn:
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ret
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#else
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#include <ks386.inc>
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#include <internal/i386/asmmacro.S>
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PUBLIC _ApicSpuriousService
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#endif
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.code
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#ifndef _M_AMD64
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TRAP_ENTRY HalpClockInterrupt, KI_PUSH_FAKE_ERROR_CODE
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TRAP_ENTRY HalpProfileInterrupt, KI_PUSH_FAKE_ERROR_CODE
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TRAP_ENTRY HalpTrap0D, 0
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TRAP_ENTRY HalpApcInterrupt, KI_PUSH_FAKE_ERROR_CODE
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TRAP_ENTRY HalpDispatchInterrupt, KI_PUSH_FAKE_ERROR_CODE
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PUBLIC _ApicSpuriousService
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_ApicSpuriousService:
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iret
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// VBox APIC needs an iret more or less directly following the EOI
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PUBLIC _HackEoi
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_HackEoi:
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@ -40,16 +66,9 @@ OnlyOnePersonKnowsHowToHackAroundVBoxBugsAndThatIsNotYou:
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ret
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#endif
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TRAP_ENTRY HalpClockInterrupt, KI_PUSH_FAKE_ERROR_CODE
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TRAP_ENTRY HalpProfileInterrupt, KI_PUSH_FAKE_ERROR_CODE
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FUNC ApicSpuriousService
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#ifdef _M_AMD64
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.ENDPROLOG
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#endif
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int 3
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iret
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ENDFUNC ApicSpuriousService
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END
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