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[UNIATA]

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Update to 0.45e.
CORE-8727 #resolve
Sorry for the delay !

svn path=/trunk/; revision=66104
This commit is contained in:
Sylvain Petreolle 2015-01-28 22:20:09 +00:00
parent c58284202d
commit 9c919ee3e2
6 changed files with 107 additions and 16 deletions
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4
reactos/drivers/storage/ide/uniata/bsmaster.h
View file

@ -1026,8 +1026,9 @@ typedef struct _HW_CHANNEL {
BOOLEAN CopyDmaBuffer;
//BOOLEAN MemIo;
BOOLEAN AltRegMap;
BOOLEAN Force80pin;
UCHAR Reserved[3];
UCHAR Reserved[2];
MECHANICAL_STATUS_INFORMATION_HEADER MechStatusData;
SENSE_DATA MechStatusSense;
@ -1303,6 +1304,7 @@ typedef struct _HW_DEVICE_EXTENSION {
//PIDE_AHCI_PORT_REGISTERS BaseIoAHCIPort[AHCI_MAX_PORT];
ULONG AHCI_CAP;
ULONG AHCI_PI;
ULONG AHCI_PI_mask; // for port exclusion, usually = AHCI_PI
PATA_REQ AhciInternalAtaReq0;
PSCSI_REQUEST_BLOCK AhciInternalSrb0;

13
reactos/drivers/storage/ide/uniata/id_dma.cpp
View file

@ -1453,9 +1453,9 @@ set_new_acard:
}
GetPciConfig2(0x48, reg48);
if(!(ChipFlags & ICH4_FIX)) {
// if(!(ChipFlags & ICH4_FIX)) {
GetPciConfig2(0x4a, reg4a);
}
// }
GetPciConfig2(0x54, reg54);
// if(udmamode >= 0) {
// enable the write buffer to be used in a split (ping/pong) manner.
@ -1472,7 +1472,7 @@ set_new_acard:
/* Set UDMA reference clock (33 MHz or more). */
SetPciConfig1(0x48, reg48 | (0x0001 << dev));
if(!(ChipFlags & ICH4_FIX)) {
// if(!(ChipFlags & ICH4_FIX)) {
if(deviceExtension->MaxTransferMode == ATA_UDMA3) {
// Special case (undocumented overclock !) for PIIX4e
SetPciConfig2(0x4a, (reg4a | (0x03 << (dev<<2)) ) );
@ -1480,18 +1480,15 @@ set_new_acard:
SetPciConfig2(0x4a, (reg4a & ~(0x03 << (dev<<2))) |
(((USHORT)(intel_utimings[i])) << (dev<<2) ) );
}
}
// }
/* Set UDMA reference clock (66 MHz or more). */
reg54 &= ~(0x1001 << dev);
if(i > 2) {
reg54 |= (0x1 << dev);
} else {
reg54 &= ~(0x1 << dev);
}
/* Set UDMA reference clock (133 MHz). */
if(i >= 5) {
reg54 |= (0x1000 << dev);
} else {
reg54 &= ~(0x1000 << dev);
}
SetPciConfig2(0x54, reg54);

72
reactos/drivers/storage/ide/uniata/id_init.cpp
View file

@ -66,9 +66,12 @@ UniataChipDetectChannels(
//ULONG RevID = deviceExtension->RevID;
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
ULONG ChipFlags= deviceExtension->HwFlags & CHIPFLAG_MASK;
ULONG i,n;
KdPrint2((PRINT_PREFIX "UniataChipDetectChannels:\n" ));
deviceExtension->AHCI_PI_mask = 0;
if(ChipFlags & (UNIATA_SATA | UNIATA_AHCI)) {
if(!deviceExtension->NumberChannels) {
KdPrint2((PRINT_PREFIX "uninitialized SATA/AHCI port number -> 1\n"));
@ -88,6 +91,21 @@ UniataChipDetectChannels(
KdPrint2((PRINT_PREFIX "MasterDev -> 1 chan\n"));
deviceExtension->NumberChannels = 1;
}
for(n=0; n<deviceExtension->NumberChannels; n++) {
if(AtapiRegCheckDevValue(deviceExtension, n, DEVNUM_NOT_SPECIFIED, L"Exclude", 0)) {
KdPrint2((PRINT_PREFIX "Channel %d excluded\n", n));
deviceExtension->AHCI_PI_mask &= ~((ULONG)1 << n);
} else {
deviceExtension->AHCI_PI_mask |= ((ULONG)1 << n);
}
}
KdPrint2((PRINT_PREFIX "PortMask %#x\n", deviceExtension->AHCI_PI_mask));
deviceExtension->AHCI_PI_mask =
AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PortMask", (ULONG)0xffffffff >> (32-deviceExtension->NumberChannels) );
KdPrint2((PRINT_PREFIX "Force PortMask %#x\n", deviceExtension->AHCI_PI_mask));
for(i=deviceExtension->AHCI_PI_mask, n=0; i; n++, i=i>>1);
KdPrint2((PRINT_PREFIX "mask -> %d chans\n", n));
switch(VendorID) {
case ATA_ACER_LABS_ID:
@ -271,6 +289,21 @@ UniataChipDetectChannels(
}
break;
} // end switch(VendorID)
i = AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"NumberChannels", n);
if(!i) {
i = n;
}
KdPrint2((PRINT_PREFIX "reg -> %d chans\n", n));
deviceExtension->NumberChannels = min(i, deviceExtension->NumberChannels);
if(!deviceExtension->NumberChannels) {
KdPrint2((PRINT_PREFIX "all channels blocked\n", n));
return FALSE;
}
deviceExtension->AHCI_PI_mask &= (ULONG)0xffffffff >> (32-deviceExtension->NumberChannels);
KdPrint2((PRINT_PREFIX "Final PortMask %#x\n", deviceExtension->AHCI_PI_mask));
return TRUE;
} // end UniataChipDetectChannels()
@ -1542,8 +1575,19 @@ hpt_cable80(
UCHAR reg, val, res;
PCI_SLOT_NUMBER slotData;
PHW_CHANNEL chan;
ULONG c; // logical channel (for Compatible Mode controllers)
c = channel - deviceExtension->Channel; // logical channel (for Compatible Mode controllers)
chan = &deviceExtension->chan[c];
slotData.u.AsULONG = deviceExtension->slotNumber;
if(deviceExtension->HwFlags & UNIATA_NO80CHK) {
KdPrint2((PRINT_PREFIX "UNIATA_NO80CHK\n"));
return TRUE;
}
if(ChipType == HPT374 && slotData.u.bits.FunctionNumber == 1) {
reg = channel ? 0x57 : 0x53;
GetPciConfig1(reg, val);
@ -1557,6 +1601,10 @@ hpt_cable80(
GetPciConfig1(0x5a, res);
res = res & (channel ? 0x01 : 0x02);
SetPciConfig1(reg, val);
if(chan->Force80pin) {
KdPrint2((PRINT_PREFIX "Force80pin\n"));
res = 0;
}
KdPrint2((PRINT_PREFIX "hpt_cable80(%d) = %d\n", channel, !res));
return !res;
} // end hpt_cable80()
@ -1638,6 +1686,11 @@ generic_cable80(
c = channel - deviceExtension->Channel; // logical channel (for Compatible Mode controllers)
chan = &deviceExtension->chan[c];
if(chan->Force80pin) {
KdPrint2((PRINT_PREFIX "Force80pin\n"));
return TRUE;
}
GetPciConfig1(pci_reg, tmp8);
if(!(tmp8 & (1 << (channel << bit_offs)))) {
chan->MaxTransferMode = min(deviceExtension->MaxTransferMode, ATA_UDMA2);
@ -1793,6 +1846,13 @@ AtapiReadChipConfig(
KdPrint2((PRINT_PREFIX "MaxTransferMode (overriden): %#x\n", chan->MaxTransferMode));
chan->MaxTransferMode = tmp32;
}
tmp32 = AtapiRegCheckDevValue(deviceExtension, c, DEVNUM_NOT_SPECIFIED, L"Force80pin", FALSE);
chan->Force80pin = tmp32 ? TRUE : FALSE;
if(chan->Force80pin) {
KdPrint2((PRINT_PREFIX "Force80pin on chip\n"));
deviceExtension->HwFlags |= UNIATA_NO80CHK;
}
//UniAtaReadLunConfig(deviceExtension, c, 0);
//UniAtaReadLunConfig(deviceExtension, c, 1);
}
@ -1824,6 +1884,12 @@ AtapiReadChipConfig(
tmp32 = AtapiRegCheckDevValue(deviceExtension, c, DEVNUM_NOT_SPECIFIED, L"ReorderEnable", TRUE);
chan->UseReorder = tmp32 ? TRUE : FALSE;
tmp32 = AtapiRegCheckDevValue(deviceExtension, c, DEVNUM_NOT_SPECIFIED, L"Force80pin", FALSE);
chan->Force80pin = tmp32 ? TRUE : FALSE;
if(chan->Force80pin) {
KdPrint2((PRINT_PREFIX "Force80pin on channel\n"));
}
for(i=0; i<deviceExtension->NumberLuns; i++) {
UniAtaReadLunConfig(deviceExtension, channel, i);
}
@ -2145,6 +2211,12 @@ AtapiChipInit(
chan = &deviceExtension->chan[c];
GetPciConfig2(0x54, reg54);
KdPrint2((PRINT_PREFIX " intel 80-pin check (reg54=%x)\n", reg54));
if(deviceExtension->HwFlags & UNIATA_NO80CHK) {
KdPrint2((PRINT_PREFIX " No check (administrative)\n"));
if(chan->Force80pin) {
KdPrint2((PRINT_PREFIX "Force80pin\n"));
}
} else
if(reg54 == 0x0000 || reg54 == 0xffff) {
KdPrint2((PRINT_PREFIX " check failed (not supported)\n"));
} else

5
reactos/drivers/storage/ide/uniata/id_probe.cpp
View file

@ -1111,6 +1111,11 @@ UniataFindBusMasterController(
if(MasterDev) {
KdPrint2((PRINT_PREFIX "MasterDev (1)\n"));
deviceExtension->MasterDev = TRUE;
KdPrint2((PRINT_PREFIX "Check exclude\n"));
if(AtapiRegCheckDevValue(deviceExtension, channel, DEVNUM_NOT_SPECIFIED, L"Exclude", 0)) {
KdPrint2((PRINT_PREFIX "Device excluded\n"));
goto exit_notfound;
}
}
status = UniataChipDetect(HwDeviceExtension, &pciData, i, ConfigInfo, &simplexOnly);

17
reactos/drivers/storage/ide/uniata/id_sata.cpp
View file

@ -760,6 +760,9 @@ UniataAhciInit(
PI = UniataAhciReadHostPort4(deviceExtension, IDX_AHCI_PI);
deviceExtension->AHCI_PI = PI;
KdPrint2((PRINT_PREFIX " AHCI PI %#x\n", PI));
KdPrint2((PRINT_PREFIX " AHCI PI mask %#x\n", deviceExtension->AHCI_PI_mask));
deviceExtension->AHCI_PI = PI = PI & deviceExtension->AHCI_PI_mask;
KdPrint2((PRINT_PREFIX " masked AHCI PI %#x\n", PI));
CAP2 = UniataAhciReadHostPort4(deviceExtension, IDX_AHCI_CAP2);
if(CAP2 & AHCI_CAP2_BOH) {
@ -975,8 +978,20 @@ UniataAhciDetect(
* both CAP.NOP and PI.
*/
PI = UniataAhciReadHostPort4(deviceExtension, IDX_AHCI_PI);
deviceExtension->AHCI_PI = PI;
deviceExtension->AHCI_PI = deviceExtension->AHCI_PI_mask = PI;
KdPrint2((PRINT_PREFIX " AHCI PI %#x\n", PI));
for(i=PI, n=0; i; n++, i=i>>1) {
if(AtapiRegCheckDevValue(deviceExtension, n, DEVNUM_NOT_SPECIFIED, L"Exclude", 0)) {
KdPrint2((PRINT_PREFIX "Channel %d excluded\n", n));
deviceExtension->AHCI_PI &= ~((ULONG)1 << n);
deviceExtension->AHCI_PI_mask &= ~((ULONG)1 << n);
}
}
deviceExtension->AHCI_PI_mask =
AtapiRegCheckDevValue(deviceExtension, CHAN_NOT_SPECIFIED, DEVNUM_NOT_SPECIFIED, L"PortMask", deviceExtension->AHCI_PI_mask);
KdPrint2((PRINT_PREFIX "Force PortMask %#x\n", deviceExtension->AHCI_PI_mask));
for(i=PI, n=0; i; n++, i=i>>1);
NumberChannels =
max((CAP & AHCI_CAP_NOP_MASK)+1, n);

12
reactos/drivers/storage/ide/uniata/uniata_ver.h
View file

@ -1,10 +1,10 @@
#define UNIATA_VER_STR "45c1"
#define UNIATA_VER_DOT 0.45.3.1
#define UNIATA_VER_STR "45e"
#define UNIATA_VER_DOT 0.45.5.0
#define UNIATA_VER_MJ 0
#define UNIATA_VER_MN 45
#define UNIATA_VER_SUB_MJ 2
#define UNIATA_VER_SUB_MN 1
#define UNIATA_VER_DOT_COMMA 0,45,3,1
#define UNIATA_VER_DOT_STR "0.45.3.1"
#define UNIATA_VER_SUB_MJ 5
#define UNIATA_VER_SUB_MN 0
#define UNIATA_VER_DOT_COMMA 0,45,5,0
#define UNIATA_VER_DOT_STR "0.45.5.0"
#define UNIATA_VER_YEAR 2014
#define UNIATA_VER_YEAR_STR "2014"