mirror of
https://github.com/reactos/reactos.git
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- Move more stuff to wdm.h
- CmResourceTypeMaximum -> CmResourceTypeMemoryLarge - Add some missing CM_RESOURCE_* defines - Fix CM_Power_Data_s svn path=/branches/header-work/; revision=45721
This commit is contained in:
Amine Khaldi
parent
b249cfa837
commit
98cde9a0b4
3 changed files with 405 additions and 397 deletions
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@ -1131,6 +1131,410 @@ typedef struct _IRP *PIRP;
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#define IRP_ALLOCATED_FIXED_SIZE 0x04
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#define IRP_LOOKASIDE_ALLOCATION 0x08
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typedef struct _BOOTDISK_INFORMATION {
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LONGLONG BootPartitionOffset;
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LONGLONG SystemPartitionOffset;
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ULONG BootDeviceSignature;
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ULONG SystemDeviceSignature;
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} BOOTDISK_INFORMATION, *PBOOTDISK_INFORMATION;
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typedef struct _BOOTDISK_INFORMATION_EX {
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LONGLONG BootPartitionOffset;
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LONGLONG SystemPartitionOffset;
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ULONG BootDeviceSignature;
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ULONG SystemDeviceSignature;
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GUID BootDeviceGuid;
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GUID SystemDeviceGuid;
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BOOLEAN BootDeviceIsGpt;
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BOOLEAN SystemDeviceIsGpt;
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} BOOTDISK_INFORMATION_EX, *PBOOTDISK_INFORMATION_EX;
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typedef struct _EISA_MEMORY_TYPE {
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UCHAR ReadWrite : 1;
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UCHAR Cached : 1;
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UCHAR Reserved0 : 1;
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UCHAR Type : 2;
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UCHAR Shared : 1;
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UCHAR Reserved1 : 1;
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UCHAR MoreEntries : 1;
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} EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
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#include <pshpack1.h>
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typedef struct _EISA_MEMORY_CONFIGURATION {
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EISA_MEMORY_TYPE ConfigurationByte;
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UCHAR DataSize;
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USHORT AddressLowWord;
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UCHAR AddressHighByte;
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USHORT MemorySize;
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} EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
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#include <poppack.h>
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typedef struct _EISA_IRQ_DESCRIPTOR {
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UCHAR Interrupt : 4;
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UCHAR Reserved : 1;
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UCHAR LevelTriggered : 1;
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UCHAR Shared : 1;
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UCHAR MoreEntries : 1;
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} EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
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typedef struct _EISA_IRQ_CONFIGURATION {
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EISA_IRQ_DESCRIPTOR ConfigurationByte;
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UCHAR Reserved;
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} EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
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typedef struct _DMA_CONFIGURATION_BYTE0 {
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UCHAR Channel : 3;
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UCHAR Reserved : 3;
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UCHAR Shared : 1;
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UCHAR MoreEntries : 1;
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} DMA_CONFIGURATION_BYTE0;
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typedef struct _DMA_CONFIGURATION_BYTE1 {
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UCHAR Reserved0 : 2;
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UCHAR TransferSize : 2;
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UCHAR Timing : 2;
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UCHAR Reserved1 : 2;
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} DMA_CONFIGURATION_BYTE1;
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typedef struct _EISA_DMA_CONFIGURATION {
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DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
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DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
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} EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
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#include <pshpack1.h>
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typedef struct _EISA_PORT_DESCRIPTOR {
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UCHAR NumberPorts : 5;
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UCHAR Reserved : 1;
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UCHAR Shared : 1;
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UCHAR MoreEntries : 1;
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} EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
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typedef struct _EISA_PORT_CONFIGURATION {
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EISA_PORT_DESCRIPTOR Configuration;
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USHORT PortAddress;
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} EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
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#include <poppack.h>
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typedef struct _CM_EISA_FUNCTION_INFORMATION {
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ULONG CompressedId;
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UCHAR IdSlotFlags1;
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UCHAR IdSlotFlags2;
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UCHAR MinorRevision;
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UCHAR MajorRevision;
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UCHAR Selections[26];
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UCHAR FunctionFlags;
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UCHAR TypeString[80];
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EISA_MEMORY_CONFIGURATION EisaMemory[9];
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EISA_IRQ_CONFIGURATION EisaIrq[7];
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EISA_DMA_CONFIGURATION EisaDma[4];
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EISA_PORT_CONFIGURATION EisaPort[20];
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UCHAR InitializationData[60];
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} CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
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/* CM_EISA_FUNCTION_INFORMATION.FunctionFlags */
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#define EISA_FUNCTION_ENABLED 0x80
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#define EISA_FREE_FORM_DATA 0x40
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#define EISA_HAS_PORT_INIT_ENTRY 0x20
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#define EISA_HAS_PORT_RANGE 0x10
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#define EISA_HAS_DMA_ENTRY 0x08
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#define EISA_HAS_IRQ_ENTRY 0x04
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#define EISA_HAS_MEMORY_ENTRY 0x02
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#define EISA_HAS_TYPE_ENTRY 0x01
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#define EISA_HAS_INFORMATION \
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(EISA_HAS_PORT_RANGE + EISA_HAS_DMA_ENTRY + EISA_HAS_IRQ_ENTRY \
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+ EISA_HAS_MEMORY_ENTRY + EISA_HAS_TYPE_ENTRY)
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typedef struct _CM_EISA_SLOT_INFORMATION {
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UCHAR ReturnCode;
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UCHAR ReturnFlags;
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UCHAR MajorRevision;
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UCHAR MinorRevision;
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USHORT Checksum;
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UCHAR NumberFunctions;
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UCHAR FunctionInformation;
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ULONG CompressedId;
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} CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
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/* CM_EISA_SLOT_INFORMATION.ReturnCode */
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#define EISA_INVALID_SLOT 0x80
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#define EISA_INVALID_FUNCTION 0x81
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#define EISA_INVALID_CONFIGURATION 0x82
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#define EISA_EMPTY_SLOT 0x83
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#define EISA_INVALID_BIOS_CALL 0x86
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typedef struct _CM_FLOPPY_DEVICE_DATA {
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USHORT Version;
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USHORT Revision;
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CHAR Size[8];
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ULONG MaxDensity;
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ULONG MountDensity;
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UCHAR StepRateHeadUnloadTime;
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UCHAR HeadLoadTime;
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UCHAR MotorOffTime;
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UCHAR SectorLengthCode;
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UCHAR SectorPerTrack;
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UCHAR ReadWriteGapLength;
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UCHAR DataTransferLength;
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UCHAR FormatGapLength;
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UCHAR FormatFillCharacter;
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UCHAR HeadSettleTime;
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UCHAR MotorSettleTime;
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UCHAR MaximumTrackValue;
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UCHAR DataTransferRate;
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} CM_FLOPPY_DEVICE_DATA, *PCM_FLOPPY_DEVICE_DATA;
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typedef struct _PNP_BUS_INFORMATION {
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GUID BusTypeGuid;
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INTERFACE_TYPE LegacyBusType;
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ULONG BusNumber;
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} PNP_BUS_INFORMATION, *PPNP_BUS_INFORMATION;
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#include <pshpack1.h>
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Type */
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#define CmResourceTypeNull 0
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#define CmResourceTypePort 1
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#define CmResourceTypeInterrupt 2
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#define CmResourceTypeMemory 3
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#define CmResourceTypeDma 4
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#define CmResourceTypeDeviceSpecific 5
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#define CmResourceTypeBusNumber 6
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#define CmResourceTypeMemoryLarge 7
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#define CmResourceTypeNonArbitrated 128
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#define CmResourceTypeConfigData 128
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#define CmResourceTypeDevicePrivate 129
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#define CmResourceTypePcCardConfig 130
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#define CmResourceTypeMfCardConfig 131
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.ShareDisposition */
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typedef enum _CM_SHARE_DISPOSITION {
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CmResourceShareUndetermined,
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CmResourceShareDeviceExclusive,
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CmResourceShareDriverExclusive,
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CmResourceShareShared
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} CM_SHARE_DISPOSITION;
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypePort */
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#define CM_RESOURCE_PORT_MEMORY 0x0000
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#define CM_RESOURCE_PORT_IO 0x0001
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#define CM_RESOURCE_PORT_10_BIT_DECODE 0x0004
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#define CM_RESOURCE_PORT_12_BIT_DECODE 0x0008
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#define CM_RESOURCE_PORT_16_BIT_DECODE 0x0010
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#define CM_RESOURCE_PORT_POSITIVE_DECODE 0x0020
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#define CM_RESOURCE_PORT_PASSIVE_DECODE 0x0040
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#define CM_RESOURCE_PORT_WINDOW_DECODE 0x0080
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#define CM_RESOURCE_PORT_BAR 0x0100
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeInterrupt */
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#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0x0000
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#define CM_RESOURCE_INTERRUPT_LATCHED 0x0001
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#define CM_RESOURCE_INTERRUPT_MESSAGE 0x0002
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#define CM_RESOURCE_INTERRUPT_POLICY_INCLUDED 0x0004
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeMemory */
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#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000
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#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001
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#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002
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#define CM_RESOURCE_MEMORY_WRITEABILITY_MASK 0x0003
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#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004
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#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008
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#define CM_RESOURCE_MEMORY_24 0x0010
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#define CM_RESOURCE_MEMORY_CACHEABLE 0x0020
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#define CM_RESOURCE_MEMORY_WINDOW_DECODE 0x0040
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#define CM_RESOURCE_MEMORY_BAR 0x0080
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#define CM_RESOURCE_MEMORY_COMPAT_FOR_INACCESSIBLE_RANGE 0x0100
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/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeDma */
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#define CM_RESOURCE_DMA_8 0x0000
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#define CM_RESOURCE_DMA_16 0x0001
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#define CM_RESOURCE_DMA_32 0x0002
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#define CM_RESOURCE_DMA_8_AND_16 0x0004
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#define CM_RESOURCE_DMA_BUS_MASTER 0x0008
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#define CM_RESOURCE_DMA_TYPE_A 0x0010
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#define CM_RESOURCE_DMA_TYPE_B 0x0020
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#define CM_RESOURCE_DMA_TYPE_F 0x0040
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typedef struct _CM_PARTIAL_RESOURCE_LIST {
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USHORT Version;
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USHORT Revision;
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ULONG Count;
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CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
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} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
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typedef struct _CM_FULL_RESOURCE_DESCRIPTOR {
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INTERFACE_TYPE InterfaceType;
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ULONG BusNumber;
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CM_PARTIAL_RESOURCE_LIST PartialResourceList;
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} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
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typedef struct _CM_RESOURCE_LIST {
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ULONG Count;
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CM_FULL_RESOURCE_DESCRIPTOR List[1];
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} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
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typedef struct _CM_INT13_DRIVE_PARAMETER {
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USHORT DriveSelect;
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ULONG MaxCylinders;
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USHORT SectorsPerTrack;
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USHORT MaxHeads;
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USHORT NumberDrives;
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} CM_INT13_DRIVE_PARAMETER, *PCM_INT13_DRIVE_PARAMETER;
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typedef struct _CM_PNP_BIOS_DEVICE_NODE
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{
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USHORT Size;
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UCHAR Node;
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ULONG ProductId;
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UCHAR DeviceType[3];
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USHORT DeviceAttributes;
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} CM_PNP_BIOS_DEVICE_NODE,*PCM_PNP_BIOS_DEVICE_NODE;
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typedef struct _CM_PNP_BIOS_INSTALLATION_CHECK
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{
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UCHAR Signature[4];
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UCHAR Revision;
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UCHAR Length;
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USHORT ControlField;
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UCHAR Checksum;
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ULONG EventFlagAddress;
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USHORT RealModeEntryOffset;
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USHORT RealModeEntrySegment;
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USHORT ProtectedModeEntryOffset;
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ULONG ProtectedModeCodeBaseAddress;
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ULONG OemDeviceId;
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USHORT RealModeDataBaseAddress;
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ULONG ProtectedModeDataBaseAddress;
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} CM_PNP_BIOS_INSTALLATION_CHECK, *PCM_PNP_BIOS_INSTALLATION_CHECK;
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#include <poppack.h>
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typedef struct _CM_DISK_GEOMETRY_DEVICE_DATA
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{
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ULONG BytesPerSector;
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ULONG NumberOfCylinders;
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ULONG SectorsPerTrack;
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ULONG NumberOfHeads;
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} CM_DISK_GEOMETRY_DEVICE_DATA, *PCM_DISK_GEOMETRY_DEVICE_DATA;
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typedef struct _CM_KEYBOARD_DEVICE_DATA {
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USHORT Version;
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USHORT Revision;
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UCHAR Type;
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UCHAR Subtype;
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USHORT KeyboardFlags;
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} CM_KEYBOARD_DEVICE_DATA, *PCM_KEYBOARD_DEVICE_DATA;
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typedef struct _CM_MCA_POS_DATA {
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USHORT AdapterId;
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UCHAR PosData1;
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UCHAR PosData2;
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UCHAR PosData3;
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UCHAR PosData4;
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} CM_MCA_POS_DATA, *PCM_MCA_POS_DATA;
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#if (NTDDI_VERSION >= NTDDI_WINXP)
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typedef struct CM_Power_Data_s {
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ULONG PD_Size;
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DEVICE_POWER_STATE PD_MostRecentPowerState;
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ULONG PD_Capabilities;
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ULONG PD_D1Latency;
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ULONG PD_D2Latency;
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ULONG PD_D3Latency;
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DEVICE_POWER_STATE PD_PowerStateMapping[PowerSystemMaximum];
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SYSTEM_POWER_STATE PD_DeepestSystemWake;
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} CM_POWER_DATA, *PCM_POWER_DATA;
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#define PDCAP_D0_SUPPORTED 0x00000001
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#define PDCAP_D1_SUPPORTED 0x00000002
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#define PDCAP_D2_SUPPORTED 0x00000004
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#define PDCAP_D3_SUPPORTED 0x00000008
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#define PDCAP_WAKE_FROM_D0_SUPPORTED 0x00000010
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#define PDCAP_WAKE_FROM_D1_SUPPORTED 0x00000020
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#define PDCAP_WAKE_FROM_D2_SUPPORTED 0x00000040
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#define PDCAP_WAKE_FROM_D3_SUPPORTED 0x00000080
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#define PDCAP_WARM_EJECT_SUPPORTED 0x00000100
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#endif /* (NTDDI_VERSION >= NTDDI_WINXP) */
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typedef struct _CM_SCSI_DEVICE_DATA {
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USHORT Version;
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USHORT Revision;
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UCHAR HostIdentifier;
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} CM_SCSI_DEVICE_DATA, *PCM_SCSI_DEVICE_DATA;
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typedef struct _CM_SERIAL_DEVICE_DATA {
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USHORT Version;
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USHORT Revision;
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ULONG BaudClock;
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} CM_SERIAL_DEVICE_DATA, *PCM_SERIAL_DEVICE_DATA;
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typedef enum _KINTERRUPT_POLARITY {
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InterruptPolarityUnknown,
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InterruptActiveHigh,
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InterruptActiveLow
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} KINTERRUPT_POLARITY, *PKINTERRUPT_POLARITY;
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typedef struct _IO_ERROR_LOG_PACKET {
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UCHAR MajorFunctionCode;
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UCHAR RetryCount;
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USHORT DumpDataSize;
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USHORT NumberOfStrings;
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USHORT StringOffset;
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USHORT EventCategory;
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NTSTATUS ErrorCode;
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ULONG UniqueErrorValue;
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NTSTATUS FinalStatus;
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ULONG SequenceNumber;
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ULONG IoControlCode;
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LARGE_INTEGER DeviceOffset;
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ULONG DumpData[1];
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} IO_ERROR_LOG_PACKET, *PIO_ERROR_LOG_PACKET;
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typedef struct _IO_ERROR_LOG_MESSAGE {
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USHORT Type;
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USHORT Size;
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USHORT DriverNameLength;
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LARGE_INTEGER TimeStamp;
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ULONG DriverNameOffset;
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IO_ERROR_LOG_PACKET EntryData;
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} IO_ERROR_LOG_MESSAGE, *PIO_ERROR_LOG_MESSAGE;
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#define ERROR_LOG_LIMIT_SIZE 240
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#define IO_ERROR_LOG_MESSAGE_HEADER_LENGTH (sizeof(IO_ERROR_LOG_MESSAGE) - \
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sizeof(IO_ERROR_LOG_PACKET) + \
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(sizeof(WCHAR) * 40))
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#define ERROR_LOG_MESSAGE_LIMIT_SIZE \
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(ERROR_LOG_LIMIT_SIZE + IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
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#define IO_ERROR_LOG_MESSAGE_LENGTH \
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((PORT_MAXIMUM_MESSAGE_LENGTH > ERROR_LOG_MESSAGE_LIMIT_SIZE) ? \
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ERROR_LOG_MESSAGE_LIMIT_SIZE : \
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PORT_MAXIMUM_MESSAGE_LENGTH)
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#define ERROR_LOG_MAXIMUM_SIZE (IO_ERROR_LOG_MESSAGE_LENGTH - \
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IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
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typedef enum _DMA_WIDTH {
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Width8Bits,
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Width16Bits,
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Width32Bits,
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MaximumDmaWidth
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} DMA_WIDTH, *PDMA_WIDTH;
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typedef enum _DMA_SPEED {
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Compatible,
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TypeA,
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TypeB,
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TypeC,
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TypeF,
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MaximumDmaSpeed
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} DMA_SPEED, *PDMA_SPEED;
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/* Simple types */
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typedef UCHAR KPROCESSOR_MODE;
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typedef LONG KPRIORITY;
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@ -451,301 +451,6 @@ typedef enum _TIMER_TYPE {
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SynchronizationTimer
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} TIMER_TYPE;
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typedef struct _BOOTDISK_INFORMATION {
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LONGLONG BootPartitionOffset;
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LONGLONG SystemPartitionOffset;
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ULONG BootDeviceSignature;
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ULONG SystemDeviceSignature;
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} BOOTDISK_INFORMATION, *PBOOTDISK_INFORMATION;
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typedef struct _BOOTDISK_INFORMATION_EX {
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LONGLONG BootPartitionOffset;
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LONGLONG SystemPartitionOffset;
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ULONG BootDeviceSignature;
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ULONG SystemDeviceSignature;
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GUID BootDeviceGuid;
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GUID SystemDeviceGuid;
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BOOLEAN BootDeviceIsGpt;
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BOOLEAN SystemDeviceIsGpt;
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} BOOTDISK_INFORMATION_EX, *PBOOTDISK_INFORMATION_EX;
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typedef struct _EISA_MEMORY_TYPE {
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UCHAR ReadWrite : 1;
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UCHAR Cached : 1;
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UCHAR Reserved0 : 1;
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UCHAR Type : 2;
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UCHAR Shared : 1;
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UCHAR Reserved1 : 1;
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UCHAR MoreEntries : 1;
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} EISA_MEMORY_TYPE, *PEISA_MEMORY_TYPE;
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#include <pshpack1.h>
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typedef struct _EISA_MEMORY_CONFIGURATION {
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EISA_MEMORY_TYPE ConfigurationByte;
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||||
UCHAR DataSize;
|
||||
USHORT AddressLowWord;
|
||||
UCHAR AddressHighByte;
|
||||
USHORT MemorySize;
|
||||
} EISA_MEMORY_CONFIGURATION, *PEISA_MEMORY_CONFIGURATION;
|
||||
#include <poppack.h>
|
||||
|
||||
typedef struct _EISA_IRQ_DESCRIPTOR {
|
||||
UCHAR Interrupt : 4;
|
||||
UCHAR Reserved : 1;
|
||||
UCHAR LevelTriggered : 1;
|
||||
UCHAR Shared : 1;
|
||||
UCHAR MoreEntries : 1;
|
||||
} EISA_IRQ_DESCRIPTOR, *PEISA_IRQ_DESCRIPTOR;
|
||||
|
||||
typedef struct _EISA_IRQ_CONFIGURATION {
|
||||
EISA_IRQ_DESCRIPTOR ConfigurationByte;
|
||||
UCHAR Reserved;
|
||||
} EISA_IRQ_CONFIGURATION, *PEISA_IRQ_CONFIGURATION;
|
||||
|
||||
typedef struct _DMA_CONFIGURATION_BYTE0 {
|
||||
UCHAR Channel : 3;
|
||||
UCHAR Reserved : 3;
|
||||
UCHAR Shared : 1;
|
||||
UCHAR MoreEntries : 1;
|
||||
} DMA_CONFIGURATION_BYTE0;
|
||||
|
||||
typedef struct _DMA_CONFIGURATION_BYTE1 {
|
||||
UCHAR Reserved0 : 2;
|
||||
UCHAR TransferSize : 2;
|
||||
UCHAR Timing : 2;
|
||||
UCHAR Reserved1 : 2;
|
||||
} DMA_CONFIGURATION_BYTE1;
|
||||
|
||||
typedef struct _EISA_DMA_CONFIGURATION {
|
||||
DMA_CONFIGURATION_BYTE0 ConfigurationByte0;
|
||||
DMA_CONFIGURATION_BYTE1 ConfigurationByte1;
|
||||
} EISA_DMA_CONFIGURATION, *PEISA_DMA_CONFIGURATION;
|
||||
|
||||
#include <pshpack1.h>
|
||||
typedef struct _EISA_PORT_DESCRIPTOR {
|
||||
UCHAR NumberPorts : 5;
|
||||
UCHAR Reserved : 1;
|
||||
UCHAR Shared : 1;
|
||||
UCHAR MoreEntries : 1;
|
||||
} EISA_PORT_DESCRIPTOR, *PEISA_PORT_DESCRIPTOR;
|
||||
|
||||
typedef struct _EISA_PORT_CONFIGURATION {
|
||||
EISA_PORT_DESCRIPTOR Configuration;
|
||||
USHORT PortAddress;
|
||||
} EISA_PORT_CONFIGURATION, *PEISA_PORT_CONFIGURATION;
|
||||
#include <poppack.h>
|
||||
|
||||
typedef struct _CM_EISA_FUNCTION_INFORMATION {
|
||||
ULONG CompressedId;
|
||||
UCHAR IdSlotFlags1;
|
||||
UCHAR IdSlotFlags2;
|
||||
UCHAR MinorRevision;
|
||||
UCHAR MajorRevision;
|
||||
UCHAR Selections[26];
|
||||
UCHAR FunctionFlags;
|
||||
UCHAR TypeString[80];
|
||||
EISA_MEMORY_CONFIGURATION EisaMemory[9];
|
||||
EISA_IRQ_CONFIGURATION EisaIrq[7];
|
||||
EISA_DMA_CONFIGURATION EisaDma[4];
|
||||
EISA_PORT_CONFIGURATION EisaPort[20];
|
||||
UCHAR InitializationData[60];
|
||||
} CM_EISA_FUNCTION_INFORMATION, *PCM_EISA_FUNCTION_INFORMATION;
|
||||
|
||||
/* CM_EISA_FUNCTION_INFORMATION.FunctionFlags */
|
||||
|
||||
#define EISA_FUNCTION_ENABLED 0x80
|
||||
#define EISA_FREE_FORM_DATA 0x40
|
||||
#define EISA_HAS_PORT_INIT_ENTRY 0x20
|
||||
#define EISA_HAS_PORT_RANGE 0x10
|
||||
#define EISA_HAS_DMA_ENTRY 0x08
|
||||
#define EISA_HAS_IRQ_ENTRY 0x04
|
||||
#define EISA_HAS_MEMORY_ENTRY 0x02
|
||||
#define EISA_HAS_TYPE_ENTRY 0x01
|
||||
#define EISA_HAS_INFORMATION \
|
||||
(EISA_HAS_PORT_RANGE + EISA_HAS_DMA_ENTRY + EISA_HAS_IRQ_ENTRY \
|
||||
+ EISA_HAS_MEMORY_ENTRY + EISA_HAS_TYPE_ENTRY)
|
||||
|
||||
typedef struct _CM_EISA_SLOT_INFORMATION {
|
||||
UCHAR ReturnCode;
|
||||
UCHAR ReturnFlags;
|
||||
UCHAR MajorRevision;
|
||||
UCHAR MinorRevision;
|
||||
USHORT Checksum;
|
||||
UCHAR NumberFunctions;
|
||||
UCHAR FunctionInformation;
|
||||
ULONG CompressedId;
|
||||
} CM_EISA_SLOT_INFORMATION, *PCM_EISA_SLOT_INFORMATION;
|
||||
|
||||
/* CM_EISA_SLOT_INFORMATION.ReturnCode */
|
||||
|
||||
#define EISA_INVALID_SLOT 0x80
|
||||
#define EISA_INVALID_FUNCTION 0x81
|
||||
#define EISA_INVALID_CONFIGURATION 0x82
|
||||
#define EISA_EMPTY_SLOT 0x83
|
||||
#define EISA_INVALID_BIOS_CALL 0x86
|
||||
|
||||
typedef struct _CM_FLOPPY_DEVICE_DATA {
|
||||
USHORT Version;
|
||||
USHORT Revision;
|
||||
CHAR Size[8];
|
||||
ULONG MaxDensity;
|
||||
ULONG MountDensity;
|
||||
UCHAR StepRateHeadUnloadTime;
|
||||
UCHAR HeadLoadTime;
|
||||
UCHAR MotorOffTime;
|
||||
UCHAR SectorLengthCode;
|
||||
UCHAR SectorPerTrack;
|
||||
UCHAR ReadWriteGapLength;
|
||||
UCHAR DataTransferLength;
|
||||
UCHAR FormatGapLength;
|
||||
UCHAR FormatFillCharacter;
|
||||
UCHAR HeadSettleTime;
|
||||
UCHAR MotorSettleTime;
|
||||
UCHAR MaximumTrackValue;
|
||||
UCHAR DataTransferRate;
|
||||
} CM_FLOPPY_DEVICE_DATA, *PCM_FLOPPY_DEVICE_DATA;
|
||||
|
||||
typedef struct _PNP_BUS_INFORMATION {
|
||||
GUID BusTypeGuid;
|
||||
INTERFACE_TYPE LegacyBusType;
|
||||
ULONG BusNumber;
|
||||
} PNP_BUS_INFORMATION, *PPNP_BUS_INFORMATION;
|
||||
|
||||
#include <pshpack1.h>
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Type */
|
||||
|
||||
#define CmResourceTypeNull 0
|
||||
#define CmResourceTypePort 1
|
||||
#define CmResourceTypeInterrupt 2
|
||||
#define CmResourceTypeMemory 3
|
||||
#define CmResourceTypeDma 4
|
||||
#define CmResourceTypeDeviceSpecific 5
|
||||
#define CmResourceTypeBusNumber 6
|
||||
#define CmResourceTypeMaximum 7
|
||||
#define CmResourceTypeNonArbitrated 128
|
||||
#define CmResourceTypeConfigData 128
|
||||
#define CmResourceTypeDevicePrivate 129
|
||||
#define CmResourceTypePcCardConfig 130
|
||||
#define CmResourceTypeMfCardConfig 131
|
||||
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.ShareDisposition */
|
||||
|
||||
typedef enum _CM_SHARE_DISPOSITION {
|
||||
CmResourceShareUndetermined,
|
||||
CmResourceShareDeviceExclusive,
|
||||
CmResourceShareDriverExclusive,
|
||||
CmResourceShareShared
|
||||
} CM_SHARE_DISPOSITION;
|
||||
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypePort */
|
||||
|
||||
#define CM_RESOURCE_PORT_MEMORY 0x0000
|
||||
#define CM_RESOURCE_PORT_IO 0x0001
|
||||
#define CM_RESOURCE_PORT_10_BIT_DECODE 0x0004
|
||||
#define CM_RESOURCE_PORT_12_BIT_DECODE 0x0008
|
||||
#define CM_RESOURCE_PORT_16_BIT_DECODE 0x0010
|
||||
#define CM_RESOURCE_PORT_POSITIVE_DECODE 0x0020
|
||||
#define CM_RESOURCE_PORT_PASSIVE_DECODE 0x0040
|
||||
#define CM_RESOURCE_PORT_WINDOW_DECODE 0x0080
|
||||
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeInterrupt */
|
||||
|
||||
#define CM_RESOURCE_INTERRUPT_LEVEL_SENSITIVE 0x0000
|
||||
#define CM_RESOURCE_INTERRUPT_LATCHED 0x0001
|
||||
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeMemory */
|
||||
|
||||
#define CM_RESOURCE_MEMORY_READ_WRITE 0x0000
|
||||
#define CM_RESOURCE_MEMORY_READ_ONLY 0x0001
|
||||
#define CM_RESOURCE_MEMORY_WRITE_ONLY 0x0002
|
||||
#define CM_RESOURCE_MEMORY_PREFETCHABLE 0x0004
|
||||
#define CM_RESOURCE_MEMORY_COMBINEDWRITE 0x0008
|
||||
#define CM_RESOURCE_MEMORY_24 0x0010
|
||||
#define CM_RESOURCE_MEMORY_CACHEABLE 0x0020
|
||||
|
||||
/* CM_PARTIAL_RESOURCE_DESCRIPTOR.Flags if Type = CmResourceTypeDma */
|
||||
|
||||
#define CM_RESOURCE_DMA_8 0x0000
|
||||
#define CM_RESOURCE_DMA_16 0x0001
|
||||
#define CM_RESOURCE_DMA_32 0x0002
|
||||
#define CM_RESOURCE_DMA_8_AND_16 0x0004
|
||||
#define CM_RESOURCE_DMA_BUS_MASTER 0x0008
|
||||
#define CM_RESOURCE_DMA_TYPE_A 0x0010
|
||||
#define CM_RESOURCE_DMA_TYPE_B 0x0020
|
||||
#define CM_RESOURCE_DMA_TYPE_F 0x0040
|
||||
|
||||
typedef struct _CM_PARTIAL_RESOURCE_LIST {
|
||||
USHORT Version;
|
||||
USHORT Revision;
|
||||
ULONG Count;
|
||||
CM_PARTIAL_RESOURCE_DESCRIPTOR PartialDescriptors[1];
|
||||
} CM_PARTIAL_RESOURCE_LIST, *PCM_PARTIAL_RESOURCE_LIST;
|
||||
|
||||
typedef struct _CM_FULL_RESOURCE_DESCRIPTOR {
|
||||
INTERFACE_TYPE InterfaceType;
|
||||
ULONG BusNumber;
|
||||
CM_PARTIAL_RESOURCE_LIST PartialResourceList;
|
||||
} CM_FULL_RESOURCE_DESCRIPTOR, *PCM_FULL_RESOURCE_DESCRIPTOR;
|
||||
|
||||
typedef struct _CM_RESOURCE_LIST {
|
||||
ULONG Count;
|
||||
CM_FULL_RESOURCE_DESCRIPTOR List[1];
|
||||
} CM_RESOURCE_LIST, *PCM_RESOURCE_LIST;
|
||||
|
||||
typedef struct _CM_INT13_DRIVE_PARAMETER {
|
||||
USHORT DriveSelect;
|
||||
ULONG MaxCylinders;
|
||||
USHORT SectorsPerTrack;
|
||||
USHORT MaxHeads;
|
||||
USHORT NumberDrives;
|
||||
} CM_INT13_DRIVE_PARAMETER, *PCM_INT13_DRIVE_PARAMETER;
|
||||
|
||||
typedef struct _CM_PNP_BIOS_DEVICE_NODE
|
||||
{
|
||||
USHORT Size;
|
||||
UCHAR Node;
|
||||
ULONG ProductId;
|
||||
UCHAR DeviceType[3];
|
||||
USHORT DeviceAttributes;
|
||||
} CM_PNP_BIOS_DEVICE_NODE,*PCM_PNP_BIOS_DEVICE_NODE;
|
||||
|
||||
typedef struct _CM_PNP_BIOS_INSTALLATION_CHECK
|
||||
{
|
||||
UCHAR Signature[4];
|
||||
UCHAR Revision;
|
||||
UCHAR Length;
|
||||
USHORT ControlField;
|
||||
UCHAR Checksum;
|
||||
ULONG EventFlagAddress;
|
||||
USHORT RealModeEntryOffset;
|
||||
USHORT RealModeEntrySegment;
|
||||
USHORT ProtectedModeEntryOffset;
|
||||
ULONG ProtectedModeCodeBaseAddress;
|
||||
ULONG OemDeviceId;
|
||||
USHORT RealModeDataBaseAddress;
|
||||
ULONG ProtectedModeDataBaseAddress;
|
||||
} CM_PNP_BIOS_INSTALLATION_CHECK, *PCM_PNP_BIOS_INSTALLATION_CHECK;
|
||||
|
||||
#include <poppack.h>
|
||||
|
||||
|
||||
typedef struct _CM_DISK_GEOMETRY_DEVICE_DATA
|
||||
{
|
||||
ULONG BytesPerSector;
|
||||
ULONG NumberOfCylinders;
|
||||
ULONG SectorsPerTrack;
|
||||
ULONG NumberOfHeads;
|
||||
} CM_DISK_GEOMETRY_DEVICE_DATA, *PCM_DISK_GEOMETRY_DEVICE_DATA;
|
||||
|
||||
typedef struct _CM_KEYBOARD_DEVICE_DATA {
|
||||
USHORT Version;
|
||||
USHORT Revision;
|
||||
UCHAR Type;
|
||||
UCHAR Subtype;
|
||||
USHORT KeyboardFlags;
|
||||
} CM_KEYBOARD_DEVICE_DATA, *PCM_KEYBOARD_DEVICE_DATA;
|
||||
|
||||
#define KEYBOARD_INSERT_ON 0x08
|
||||
#define KEYBOARD_CAPS_LOCK_ON 0x04
|
||||
#define KEYBOARD_NUM_LOCK_ON 0x02
|
||||
|
|
@ -755,46 +460,6 @@ typedef struct _CM_KEYBOARD_DEVICE_DATA {
|
|||
#define KEYBOARD_LEFT_SHIFT_DOWN 0x20
|
||||
#define KEYBOARD_RIGHT_SHIFT_DOWN 0x10
|
||||
|
||||
typedef struct _CM_MCA_POS_DATA {
|
||||
USHORT AdapterId;
|
||||
UCHAR PosData1;
|
||||
UCHAR PosData2;
|
||||
UCHAR PosData3;
|
||||
UCHAR PosData4;
|
||||
} CM_MCA_POS_DATA, *PCM_MCA_POS_DATA;
|
||||
|
||||
typedef struct CM_Power_Data_s {
|
||||
ULONG PD_Size;
|
||||
DEVICE_POWER_STATE PD_MostRecentPowerState;
|
||||
ULONG PD_Capabilities;
|
||||
ULONG PD_D1Latency;
|
||||
ULONG PD_D2Latency;
|
||||
ULONG PD_D3Latency;
|
||||
DEVICE_POWER_STATE PD_PowerStateMapping[PowerSystemMaximum];
|
||||
} CM_POWER_DATA, *PCM_POWER_DATA;
|
||||
|
||||
#define PDCAP_D0_SUPPORTED 0x00000001
|
||||
#define PDCAP_D1_SUPPORTED 0x00000002
|
||||
#define PDCAP_D2_SUPPORTED 0x00000004
|
||||
#define PDCAP_D3_SUPPORTED 0x00000008
|
||||
#define PDCAP_WAKE_FROM_D0_SUPPORTED 0x00000010
|
||||
#define PDCAP_WAKE_FROM_D1_SUPPORTED 0x00000020
|
||||
#define PDCAP_WAKE_FROM_D2_SUPPORTED 0x00000040
|
||||
#define PDCAP_WAKE_FROM_D3_SUPPORTED 0x00000080
|
||||
#define PDCAP_WARM_EJECT_SUPPORTED 0x00000100
|
||||
|
||||
typedef struct _CM_SCSI_DEVICE_DATA {
|
||||
USHORT Version;
|
||||
USHORT Revision;
|
||||
UCHAR HostIdentifier;
|
||||
} CM_SCSI_DEVICE_DATA, *PCM_SCSI_DEVICE_DATA;
|
||||
|
||||
typedef struct _CM_SERIAL_DEVICE_DATA {
|
||||
USHORT Version;
|
||||
USHORT Revision;
|
||||
ULONG BaudClock;
|
||||
} CM_SERIAL_DEVICE_DATA, *PCM_SERIAL_DEVICE_DATA;
|
||||
|
||||
typedef struct _IO_COUNTERS {
|
||||
ULONGLONG ReadOperationCount;
|
||||
ULONGLONG WriteOperationCount;
|
||||
|
|
@ -848,51 +513,6 @@ typedef struct _POOLED_USAGE_AND_LIMITS
|
|||
SIZE_T PagefileLimit;
|
||||
} POOLED_USAGE_AND_LIMITS, *PPOOLED_USAGE_AND_LIMITS;
|
||||
|
||||
typedef enum _KINTERRUPT_POLARITY
|
||||
{
|
||||
InterruptPolarityUnknown,
|
||||
InterruptActiveHigh,
|
||||
InterruptActiveLow
|
||||
} KINTERRUPT_POLARITY, *PKINTERRUPT_POLARITY;
|
||||
|
||||
typedef struct _IO_ERROR_LOG_PACKET {
|
||||
UCHAR MajorFunctionCode;
|
||||
UCHAR RetryCount;
|
||||
USHORT DumpDataSize;
|
||||
USHORT NumberOfStrings;
|
||||
USHORT StringOffset;
|
||||
USHORT EventCategory;
|
||||
NTSTATUS ErrorCode;
|
||||
ULONG UniqueErrorValue;
|
||||
NTSTATUS FinalStatus;
|
||||
ULONG SequenceNumber;
|
||||
ULONG IoControlCode;
|
||||
LARGE_INTEGER DeviceOffset;
|
||||
ULONG DumpData[1];
|
||||
} IO_ERROR_LOG_PACKET, *PIO_ERROR_LOG_PACKET;
|
||||
|
||||
typedef struct _IO_ERROR_LOG_MESSAGE {
|
||||
USHORT Type;
|
||||
USHORT Size;
|
||||
USHORT DriverNameLength;
|
||||
LARGE_INTEGER TimeStamp;
|
||||
ULONG DriverNameOffset;
|
||||
IO_ERROR_LOG_PACKET EntryData;
|
||||
} IO_ERROR_LOG_MESSAGE, *PIO_ERROR_LOG_MESSAGE;
|
||||
|
||||
#define ERROR_LOG_LIMIT_SIZE 240
|
||||
#define IO_ERROR_LOG_MESSAGE_HEADER_LENGTH (sizeof(IO_ERROR_LOG_MESSAGE) - \
|
||||
sizeof(IO_ERROR_LOG_PACKET) + \
|
||||
(sizeof(WCHAR) * 40))
|
||||
#define ERROR_LOG_MESSAGE_LIMIT_SIZE \
|
||||
(ERROR_LOG_LIMIT_SIZE + IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
|
||||
#define IO_ERROR_LOG_MESSAGE_LENGTH \
|
||||
((PORT_MAXIMUM_MESSAGE_LENGTH > ERROR_LOG_MESSAGE_LIMIT_SIZE) ? \
|
||||
ERROR_LOG_MESSAGE_LIMIT_SIZE : \
|
||||
PORT_MAXIMUM_MESSAGE_LENGTH)
|
||||
#define ERROR_LOG_MAXIMUM_SIZE (IO_ERROR_LOG_MESSAGE_LENGTH - \
|
||||
IO_ERROR_LOG_MESSAGE_HEADER_LENGTH)
|
||||
|
||||
typedef struct _CONTROLLER_OBJECT {
|
||||
CSHORT Type;
|
||||
CSHORT Size;
|
||||
|
|
@ -902,22 +522,6 @@ typedef struct _CONTROLLER_OBJECT {
|
|||
LARGE_INTEGER Spare2;
|
||||
} CONTROLLER_OBJECT, *PCONTROLLER_OBJECT;
|
||||
|
||||
typedef enum _DMA_WIDTH {
|
||||
Width8Bits,
|
||||
Width16Bits,
|
||||
Width32Bits,
|
||||
MaximumDmaWidth
|
||||
} DMA_WIDTH, *PDMA_WIDTH;
|
||||
|
||||
typedef enum _DMA_SPEED {
|
||||
Compatible,
|
||||
TypeA,
|
||||
TypeB,
|
||||
TypeC,
|
||||
TypeF,
|
||||
MaximumDmaSpeed
|
||||
} DMA_SPEED, *PDMA_SPEED;
|
||||
|
||||
/* DEVICE_DESCRIPTION.Version */
|
||||
|
||||
#define DEVICE_DESCRIPTION_VERSION 0x0000
|
||||
|
|
|
|||
|
|
@ -54,7 +54,7 @@ Author:
|
|||
#define CmResourceTypeDma 4
|
||||
#define CmResourceTypeDeviceSpecific 5
|
||||
#define CmResourceTypeBusNumber 6
|
||||
#define CmResourceTypeMaximum 7
|
||||
#define CmResourceTypeMemoryLarge 7
|
||||
#define CmResourceTypeNonArbitrated 128
|
||||
#define CmResourceTypeConfigData 128
|
||||
#define CmResourceTypeDevicePrivate 129
|
||||
|
|
|
|||
Loading…
Reference in a new issue