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- fix InterlockedExchangeAddSizeT

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- fix __writecrx instrinsics
- fix some mmtypes

svn path=/branches/ros-amd64-bringup/; revision=34925
This commit is contained in:
Timo Kreuzer 2008-07-29 15:22:17 +00:00
parent 57fe9d163d
commit 98797fa1bf
4 changed files with 60 additions and 55 deletions
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2
reactos/include/ddk/winddk.h
View file

@ -5772,7 +5772,7 @@ InterlockedExchangeAdd(
#if defined (_M_AMD64)
#define InterlockedExchangeAddSizeT(a, b) InterlockedExchangeAdd64((LONG *)a, b)
#define InterlockedExchangeAddSizeT(a, b) InterlockedExchangeAdd64((LONGLONG *)a, (LONGLONG)b)
#define InterlockedIncrementSizeT(a) InterlockedIncrement64((LONGLONG *)a)
#define InterlockedDecrementSizeT(a) InterlockedDecrement64((LONGLONG *)a)
#define InterlockedAnd _InterlockedAnd

92
reactos/include/ndk/amd64/mmtypes.h
View file

@ -1,18 +1,20 @@
/*++ NDK Version: 0095
Copyright (c) Alex Ionescu. All rights reserved.
Copyright (c) Timo Kreuzer All rights reserved.
Header Name:
mmtypes.h (X86)
mmtypes.h (AMD64)
Abstract:
i386 Type definitions for the Memory Manager
AMD64 Type definitions for the Memory Manager
Author:
Alex Ionescu (alex.ionescu@reactos.com) 06-Oct-2004
Timo Kreuzer (timo.kreuzer@reactos.com) 29-Jul-2008
--*/
@ -42,30 +44,27 @@ C_ASSERT(MM_ALLOCATION_GRANULARITY &&
C_ASSERT(MM_ALLOCATION_GRANULARITY >= PAGE_SIZE);
#endif
//
// PAE SEG0 Base?
//
#define KSEG0_BASE_PAE 0xE0000000
//
// Page Table Entry Definitions
//
typedef struct _HARDWARE_PTE_X86
typedef struct _HARDWARE_PTE_AMD64
{
ULONG Valid:1;
ULONG Write:1;
ULONG Owner:1;
ULONG WriteThrough:1;
ULONG CacheDisable:1;
ULONG Accessed:1;
ULONG Dirty:1;
ULONG LargePage:1;
ULONG Global:1;
ULONG CopyOnWrite:1;
ULONG Prototype: 1;
ULONG reserved: 1;
ULONG PageFrameNumber:20;
} HARDWARE_PTE_X86, *PHARDWARE_PTE_X86;
ULONGLONG Valid:1;
ULONGLONG Write:1;
ULONGLONG Owner:1;
ULONGLONG WriteThrough:1;
ULONGLONG CacheDisable:1;
ULONGLONG Accessed:1;
ULONGLONG Dirty:1;
ULONGLONG LargePage:1;
ULONGLONG Global:1;
ULONGLONG CopyOnWrite:1;
ULONGLONG Prototype: 1;
ULONGLONG reserved1: 1;
ULONGLONG PageFrameNumber:40;
ULONGLONG reserved2:11;
ULONGLONG NoExecute:1;
} HARDWARE_PTE_AMD64, *PHARDWARE_PTE_AMD64;
typedef struct _MMPTE_SOFTWARE
{
@ -124,46 +123,33 @@ typedef struct _MMPTE_LIST
typedef struct _MMPTE_HARDWARE
{
ULONG Valid:1;
ULONG Write:1;
ULONG Owner:1;
ULONG WriteThrough:1;
ULONG CacheDisable:1;
ULONG Accessed:1;
ULONG Dirty:1;
ULONG LargePage:1;
ULONG Global:1;
ULONG CopyOnWrite:1;
ULONG Prototype:1;
ULONG reserved:1;
ULONG PageFrameNumber:20;
ULONGLONG Valid:1;
ULONGLONG Write:1;
ULONGLONG Owner:1;
ULONGLONG WriteThrough:1;
ULONGLONG CacheDisable:1;
ULONGLONG Accessed:1;
ULONGLONG Dirty:1;
ULONGLONG LargePage:1;
ULONGLONG Global:1;
ULONGLONG CopyOnWrite:1;
ULONGLONG Prototype: 1;
ULONGLONG reserved1: 1;
ULONGLONG PageFrameNumber:40;
ULONGLONG reserved2:11;
ULONGLONG NoExecute:1;
} MMPTE_HARDWARE, *PMMPTE_HARDWARE;
#else
typedef struct _MMPTE_HARDWARE
{
ULONG Valid:1;
ULONG Writable:1;
ULONG Owner:1;
ULONG WriteThrough:1;
ULONG CacheDisable:1;
ULONG Accessed:1;
ULONG Dirty:1;
ULONG LargePage:1;
ULONG Global:1;
ULONG CopyOnWrite:1;
ULONG Prototype:1;
ULONG Write:1;
ULONG PageFrameNumber:20;
} MMPTE_HARDWARE, *PMMPTE_HARDWARE;
#error MMPTE_HARDWARE undeclared
#endif
//
// Use the right PTE structure
//
#define HARDWARE_PTE HARDWARE_PTE_X86
#define PHARDWARE_PTE PHARDWARE_PTE_X86
#define HARDWARE_PTE HARDWARE_PTE_AMD64
#define PHARDWARE_PTE PHARDWARE_PTE_AMD64
#endif

4
reactos/include/ndk/arch/mmtypes.h
View file

@ -22,12 +22,14 @@ Author:
//
// Include the right file for this architecture.
//
#if defined(_M_IX86) || defined(_M_AMD64)
#if defined(_M_IX86)
#include <i386/mmtypes.h>
#elif defined(_M_PPC)
#include <powerpc/mmtypes.h>
#elif defined(_M_ARM)
#include <arm/mmtypes.h>
#elif defined(_M_AMD64)
#include <amd64/mmtypes.h>
#else
#error "Unknown processor"
#endif

17
reactos/include/psdk/intrin_x86.h
View file

@ -1078,6 +1078,22 @@ static __inline__ __attribute__((always_inline)) unsigned long __readcr4(void)
return value;
}
#ifdef _M_AMD64
static __inline__ __attribute__((always_inline)) void __writecr0(const unsigned long long Data)
{
__asm__("movq %q[Data], %%cr0" : : [Data] "q" (Data) : "memory");
}
static __inline__ __attribute__((always_inline)) void __writecr3(const unsigned long long Data)
{
__asm__("movq %q[Data], %%cr3" : : [Data] "q" (Data) : "memory");
}
static __inline__ __attribute__((always_inline)) void __writecr4(const unsigned long long Data)
{
__asm__("movq %q[Data], %%cr4" : : [Data] "q" (Data) : "memory");
}
#else
static __inline__ __attribute__((always_inline)) void __writecr0(const unsigned long long Data)
{
__asm__("mov %[Data], %%cr0" : : [Data] "q" ((const unsigned long)(Data & 0xFFFFFFFF)) : "memory");
@ -1092,6 +1108,7 @@ static __inline__ __attribute__((always_inline)) void __writecr4(const unsigned
{
__asm__("mov %[Data], %%cr4" : : [Data] "q" ((const unsigned long)(Data & 0xFFFFFFFF)) : "memory");
}
#endif
static __inline__ __attribute__((always_inline)) void __invlpg(void * const Address)
{