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https://github.com/reactos/reactos.git
synced 2024-07-06 04:35:07 +00:00
Added cache sweeping code into the HAL, for ARM926EJ-S and ARM1026EJ-S CPUs.
Finished implementation of KiSystemStartup. Copied KiInitializeKernel from x86 to ARM, removing irrelevant parts. This is our current checkpoint. svn path=/trunk/; revision=32333
This commit is contained in:
ReactOS Portable Systems Group
parent
0237c83496
commit
93970a965e
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@ -17,6 +17,8 @@
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#include <ndk/halfuncs.h>
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#include <ndk/iofuncs.h>
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#include <ndk/kdfuncs.h>
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#include <internal/arm/ke.h>
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#include <internal/arm/intrin_i.h>
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#define NDEBUG
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#include <debug.h>
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@ -1090,16 +1092,66 @@ KeSwapIrql(IN KIRQL Irql)
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return 0;
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}
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BOOLEAN HalpProcessorIdentified;
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BOOLEAN HalpTestCleanSupported;
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VOID
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HalpIdentifyProcessor(VOID)
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{
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ARM_ID_CODE_REGISTER IdRegister;
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//
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// Don't do it again
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//
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HalpProcessorIdentified = TRUE;
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//
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// Read the ID Code
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//
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IdRegister = KeArmIdCodeRegisterGet();
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//
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// Architecture "6" CPUs support test-and-clean (926EJ-S and 1026EJ-S)
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//
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HalpTestCleanSupported = (IdRegister.Architecture == 6);
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}
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VOID
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HalSweepDcache(VOID)
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{
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UNIMPLEMENTED;
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//
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// We get called very early on, before HalInitSystem or any of the Hal*
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// processor routines, so we need to figure out what CPU we're on.
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//
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if (!HalpProcessorIdentified) HalpIdentifyProcessor();
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//
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// Check if we can do it the ARMv5TE-J way
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//
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if (HalpTestCleanSupported)
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{
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//
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// Test, clean, flush D-Cache
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//
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__asm__ __volatile__ ("1: mrc p15, 0, pc, c7, c14, 3; bne 1b");
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}
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else
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{
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//
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// We need to do it it by set/way
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//
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UNIMPLEMENTED;
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}
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}
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VOID
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HalSweepIcache(VOID)
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{
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UNIMPLEMENTED;
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//
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// All ARM cores support the same Icache flush command, no need for HAL work
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//
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KeArmFlushIcache();
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}
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/* EOF */
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@ -5368,7 +5368,9 @@ typedef VOID
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/*
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** Architecture specific structures
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*/
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#define PCR_MINOR_VERSION 1
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#define PCR_MAJOR_VERSION 1
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#ifdef _X86_
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typedef ULONG PFN_NUMBER, *PPFN_NUMBER;
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@ -5397,9 +5399,6 @@ typedef struct _KPCR_TIB {
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struct _KPCR_TIB *Self; /* 18 */
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} KPCR_TIB, *PKPCR_TIB; /* 1C */
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#define PCR_MINOR_VERSION 1
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#define PCR_MAJOR_VERSION 1
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typedef struct _KPCR {
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KPCR_TIB Tib; /* 00 */
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struct _KPCR *Self; /* 1C */
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@ -99,5 +99,12 @@ KeArmInvalidateTlbEntry(IN PVOID Address)
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__asm__ __volatile__ ("mcr p15, 0, %0, c8, c7, 1" : : "r"(Address) : "cc");
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}
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FORCEINLINE
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VOID
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KeArmFlushIcache(VOID)
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{
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 0" : : "r"(0) : "cc");
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}
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#endif
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@ -141,6 +141,131 @@ KeFlushTb(VOID)
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KeArmFlushTlb();
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}
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VOID
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NTAPI
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KiInitializeKernel(IN PKPROCESS InitProcess,
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IN PKTHREAD InitThread,
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IN PVOID IdleStack,
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IN PKPRCB Prcb,
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IN CCHAR Number,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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LARGE_INTEGER PageDirectory;
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PVOID DpcStack;
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DPRINT1("%s Process: %p Thread: %p Stack: %p PRCB: %p Number: %d LoaderBlock: %p\n",
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__FUNCTION__, InitProcess, InitThread, IdleStack, Prcb, Number, LoaderBlock);
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/* Initialize the Power Management Support for this PRCB */
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PoInitializePrcb(Prcb);
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/* Save CPU state */
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KiSaveProcessorControlState(&Prcb->ProcessorState);
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/* Initialize spinlocks and DPC data */
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KiInitSpinLocks(Prcb, Number);
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/* Check if this is the Boot CPU */
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if (!Number)
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{
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/* Set Node Data */
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KeNodeBlock[0] = &KiNode0;
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Prcb->ParentNode = KeNodeBlock[0];
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KeNodeBlock[0]->ProcessorMask = Prcb->SetMember;
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/* Lower to APC_LEVEL */
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KeLowerIrql(APC_LEVEL);
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/* Initialize portable parts of the OS */
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KiInitSystem();
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/* Initialize the Idle Process and the Process Listhead */
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InitializeListHead(&KiProcessListHead);
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PageDirectory.QuadPart = 0;
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KeInitializeProcess(InitProcess,
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0,
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0xFFFFFFFF,
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&PageDirectory,
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FALSE);
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InitProcess->QuantumReset = MAXCHAR;
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}
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else
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{
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/* FIXME */
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DPRINT1("SMP Boot support not yet present\n");
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}
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/* Setup the Idle Thread */
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KeInitializeThread(InitProcess,
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InitThread,
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NULL,
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NULL,
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NULL,
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NULL,
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NULL,
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IdleStack);
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InitThread->NextProcessor = Number;
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InitThread->Priority = HIGH_PRIORITY;
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InitThread->State = Running;
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InitThread->Affinity = 1 << Number;
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InitThread->WaitIrql = DISPATCH_LEVEL;
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InitProcess->ActiveProcessors = 1 << Number;
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/* HACK for MmUpdatePageDir */
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((PETHREAD)InitThread)->ThreadsProcess = (PEPROCESS)InitProcess;
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/* Initialize Kernel Memory Address Space */
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MmInit1(MmFreeLdrFirstKrnlPhysAddr,
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MmFreeLdrLastKrnlPhysAddr,
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MmFreeLdrLastKernelAddress,
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NULL,
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0,
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4096);
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/* Set basic CPU Features that user mode can read */
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/* Set up the thread-related fields in the PRCB */
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Prcb->CurrentThread = InitThread;
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Prcb->NextThread = NULL;
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Prcb->IdleThread = InitThread;
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/* Initialize the Kernel Executive */
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ExpInitializeExecutive(Number, LoaderBlock);
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/* Only do this on the boot CPU */
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if (!Number)
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{
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/* Calculate the time reciprocal */
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KiTimeIncrementReciprocal =
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KiComputeReciprocal(KeMaximumIncrement,
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&KiTimeIncrementShiftCount);
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/* Update DPC Values in case they got updated by the executive */
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Prcb->MaximumDpcQueueDepth = KiMaximumDpcQueueDepth;
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Prcb->MinimumDpcRate = KiMinimumDpcRate;
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Prcb->AdjustDpcThreshold = KiAdjustDpcThreshold;
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/* Allocate the DPC Stack */
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DpcStack = MmCreateKernelStack(FALSE, 0);
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if (!DpcStack) KeBugCheckEx(NO_PAGES_AVAILABLE, 1, 0, 0, 0);
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Prcb->DpcStack = DpcStack;
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}
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/* Raise to Dispatch */
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KeSwapIrql(DISPATCH_LEVEL);
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/* Set the Idle Priority to 0. This will jump into Phase 1 */
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KeSetPriorityThread(InitThread, 0);
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/* If there's no thread scheduled, put this CPU in the Idle summary */
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KiAcquirePrcbLock(Prcb);
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if (!Prcb->NextThread) KiIdleSummary |= 1 << Number;
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KiReleasePrcbLock(Prcb);
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/* Raise back to HIGH_LEVEL and clear the PRCB for the loader block */
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KeSwapIrql(HIGH_LEVEL);
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LoaderBlock->Prcb = 0;
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}
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VOID
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KiInitializeSystem(IN ULONG Magic,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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@ -281,5 +406,54 @@ KiInitializeSystem(IN ULONG Magic,
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//
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HalSweepIcache();
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HalSweepDcache();
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//
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// Set PCR version
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//
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Pcr->MinorVersion = PCR_MINOR_VERSION;
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Pcr->MajorVersion = PCR_MAJOR_VERSION;
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//
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// Set boot PRCB
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//
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Pcr->Prcb = (PKPRCB)LoaderBlock->Prcb;
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//
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// Set the different stacks
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//
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Pcr->InitialStack = (PVOID)LoaderBlock->KernelStack;
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Pcr->PanicStack = (PVOID)LoaderBlock->u.Arm.PanicStack;
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Pcr->InterruptStack = (PVOID)LoaderBlock->u.Arm.InterruptStack;
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//
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// Set the current thread
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//
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Pcr->CurrentThread = (PKTHREAD)LoaderBlock->Thread;
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//
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// Set the current IRQL to high
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//
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Pcr->CurrentIrql = HIGH_LEVEL;
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//
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// Set processor information
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//
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Pcr->ProcessorId = KeArmIdCodeRegisterGet().AsUlong;
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Pcr->SystemReserved[0] = KeArmControlRegisterGet().AsUlong;
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//
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// Initialize the rest of the kernel now
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//
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KiInitializeKernel((PKPROCESS)LoaderBlock->Process,
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(PKTHREAD)LoaderBlock->Thread,
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(PVOID)LoaderBlock->KernelStack,
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(PKPRCB)LoaderBlock->Prcb,
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Pcr->Prcb->Number,
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LoaderBlock);
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//
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// Jump to idle loop
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//
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while (TRUE);
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}
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