- Change CPUID to match the old Ki386Cpuid and take 4 output arguments instead of an array. This way we save some stack when using a dummy cpuid for synchronization and can query only the registers we want in the case we don't want all 4.

- Simplify Ke386GetTr and Ke386GetLocalDescriptorTable to return by value instead of reference.
- Make RDMSR smaller by making it fastcall as rdmsr takes its argument in ecx.
- Fix KiGetCacheInformation -- it only handled the Intel and AMD case.
- Replace Ke386HaltProcessor with __halt.
- KiHaltProcessorDpcRoutine: Always halt the processor for the architectures we support for consistency.
- Clean up x86 and PPC headers from deprecated stuff.
- Fix broken LOCK undefine in v86m_sup.S -- LOCK is used both in a macro and the code, so only undefine it where required and redefine it after it is used (this worked because LOCK was interpreted as lock).

Get rid of KeArch*:
- Rename KeArchInitThreadWithContext to KiInitializeContextThread and use the same name for all architectures.
- Kill KeArchHaltProcessor. Use __halt and KeArmHaltProcessor directly instead.
- Use Ke386FnInit instead of KeArchFnInit -- it is only used for x86.

svn path=/trunk/; revision=43180
This commit is contained in:
Stefan Ginsberg 2009-09-27 10:09:38 +00:00
parent 733f6cb89b
commit 8fa95b6a9c
21 changed files with 176 additions and 284 deletions

View file

@ -70,7 +70,7 @@ HalProcessorIdle(VOID)
{
/* Enable interrupts and halt the processor */
_enable();
Ke386HaltProcessor();
__halt();
}
/*

View file

@ -67,7 +67,7 @@ HalpReboot(VOID)
HalpWriteResetCommand();
/* Halt the CPU */
Ke386HaltProcessor();
__halt();
}
/* PUBLIC FUNCTIONS **********************************************************/

View file

@ -1107,6 +1107,10 @@ __INTRIN_INLINE void _enable(void)
__asm__("sti");
}
__INTRIN_INLINE void __halt(void)
{
__asm__("hlt\n\t");
}
/*** Protected memory management ***/

View file

@ -145,6 +145,7 @@ void __debugbreak(void);
void __int2c(void);
void _disable(void);
void _enable(void);
void __halt(void);
/*** Protected memory management ***/
void __writecr0(const unsigned __int64 Data);

View file

@ -238,7 +238,7 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
HANDLE KeyHandle, BiosHandle, SystemHandle, FpuHandle, SectionHandle;
CONFIGURATION_COMPONENT_DATA ConfigData;
CHAR Buffer[128];
ULONG ExtendedId, CpuInfo[4];
ULONG ExtendedId, Dummy;
PKPRCB Prcb;
USHORT IndexTable[MaximumType + 1] = {0};
ANSI_STRING TempString;
@ -428,8 +428,7 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
else
{
/* Check if we have extended CPUID that supports name ID */
CPUID(CpuInfo, 0x80000000);
ExtendedId = CpuInfo[0];
CPUID(0x80000000, &ExtendedId, &Dummy, &Dummy, &Dummy);
if (ExtendedId >= 0x80000004)
{
/* Do all the CPUIDs required to get the full name */
@ -437,8 +436,11 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
for (ExtendedId = 2; ExtendedId <= 4; ExtendedId++)
{
/* Do the CPUID and save the name string */
CPUID((PULONG)PartialString,
0x80000000 | ExtendedId);
CPUID(0x80000000 | ExtendedId,
(PULONG)PartialString,
(PULONG)PartialString + 1,
(PULONG)PartialString + 2,
(PULONG)PartialString + 3);
/* Go to the next name string */
PartialString += 16;

View file

@ -14,26 +14,30 @@
/* FUNCTIONS *****************************************************************/
VOID NTAPI
VOID
NTAPI
KiHaltProcessorDpcRoutine(IN PKDPC Dpc,
IN PVOID DeferredContext,
IN PVOID SystemArgument1,
IN PVOID SystemArgument2)
IN PVOID DeferredContext,
IN PVOID SystemArgument1,
IN PVOID SystemArgument2)
{
KIRQL OldIrql;
if (DeferredContext)
{
ExFreePool(DeferredContext);
}
while (TRUE)
{
KeRaiseIrql(SYNCH_LEVEL, &OldIrql);
#if defined(_M_IX86)
Ke386HaltProcessor();
KIRQL OldIrql;
if (DeferredContext)
{
ExFreePool(DeferredContext);
}
while (TRUE)
{
KeRaiseIrql(SYNCH_LEVEL, &OldIrql);
#if defined(_M_IX86) || defined(_M_AMD64)
__halt();
#elif defined(_M_ARM)
KeArmHaltProcessor();
#else
HalProcessorIdle();
HalProcessorIdle();
#endif
}
}
}
VOID NTAPI

View file

@ -7,18 +7,6 @@
#define PCR_ENTRY 0
#define PDR_ENTRY 2
#define KeArchHaltProcessor() KeArmHaltProcessor()
VOID
NTAPI
KeArmInitThreadWithContext(
IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT Context
);
VOID
KiPassiveRelease(
VOID
@ -44,7 +32,6 @@ KeFlushTb(
VOID
);
#define KeArchInitThreadWithContext KeArmInitThreadWithContext
#define KiSystemStartupReal KiSystemStartup
#define KiGetPreviousMode(tf) \

View file

@ -1,12 +1,6 @@
#ifndef _INTRIN_INTERNAL_
#define _INTRIN_INTERNAL_
#ifdef CONFIG_SMP
#define LOCK "lock ; "
#else
#define LOCK ""
#endif
#if defined(__GNUC__)
#define Ke386SetGlobalDescriptorTable(X) \
@ -20,11 +14,17 @@
: /* no input */ \
: "memory");
#define Ke386GetLocalDescriptorTable(X) \
__asm__("sldt %0\n\t" \
: "=m" (*X) \
: /* no input */ \
FORCEINLINE
USHORT
Ke386GetLocalDescriptorTable()
{
USHORT Ldt;
__asm__("sldt %0\n\t"
: "=m" (Ldt)
: /* no input */
: "memory");
return Ldt;
}
#define Ke386SetLocalDescriptorTable(X) \
__asm__("lldt %w0\n\t" \
@ -33,20 +33,24 @@
#define Ke386SetTr(X) __asm__ __volatile__("ltr %%ax" : :"a" (X));
#define Ke386GetTr(X) \
__asm__("str %0\n\t" \
: "=m" (*X));
FORCEINLINE
USHORT
Ke386GetTr(VOID)
{
USHORT Tr;
__asm__("str %0\n\t"
: "=m" (Tr));
return Tr;
}
#define _Ke386GetSeg(N) ({ \
unsigned int __d; \
__asm__("movl %%" #N ",%0\n\t" :"=r" (__d)); \
__d; \
})
})
#define _Ke386SetSeg(N,X) __asm__ __volatile__("movl %0,%%" #N : :"r" (X));
#define Ke386HaltProcessor() __asm__("hlt\n\t");
#define Ke386FnInit() __asm__("fninit\n\t");
@ -75,13 +79,6 @@ Ke386FnInit(VOID)
__asm fninit;
}
FORCEINLINE
VOID
Ke386HaltProcessor(VOID)
{
__asm hlt;
}
FORCEINLINE
VOID
Ke386GetGlobalDescriptorTable(OUT PVOID Descriptor)
@ -97,12 +94,10 @@ Ke386SetGlobalDescriptorTable(IN PVOID Descriptor)
}
FORCEINLINE
VOID
Ke386GetLocalDescriptorTable(OUT PUSHORT Descriptor)
USHORT
Ke386GetLocalDescriptorTable(VOID)
{
USHORT _Descriptor;
__asm sldt _Descriptor;
*Descriptor = _Descriptor;
__asm sldt ax;
}
FORCEINLINE
@ -121,11 +116,9 @@ Ke386SetTr(IN USHORT Tr)
FORCEINLINE
USHORT
Ke386GetTr(OUT PUSHORT Tr)
Ke386GetTr(VOID)
{
USHORT _Tr;
__asm str _Tr;
*Tr = _Tr;
__asm str ax;
}
//

View file

@ -1,24 +1,13 @@
#ifndef __NTOSKRNL_INCLUDE_INTERNAL_I386_KE_H
#define __NTOSKRNL_INCLUDE_INTERNAL_I386_KE_H
#define FRAME_EDITED 0xFFF8
#ifndef __ASM__
#include "intrin_i.h"
#include "v86m.h"
#define KeArchFnInit() Ke386FnInit()
#define KeArchHaltProcessor() Ke386HaltProcessor()
extern ULONG Ke386CacheAlignment;
struct _KPCR;
VOID
KiInitializeGdt(struct _KPCR* Pcr);
VOID
Ki386ApplicationProcessorInitializeTSS(VOID);
VOID
FASTCALL
Ki386InitializeTss(
@ -27,13 +16,6 @@ Ki386InitializeTss(
IN PKGDTENTRY Gdt
);
VOID
KiGdtPrepareForApplicationProcessorInit(ULONG Id);
VOID
Ki386InitializeLdt(VOID);
VOID
Ki386SetProcessorFeatures(VOID);
VOID
NTAPI
KiSetCR0Bits(VOID);
@ -62,23 +44,6 @@ ULONG
NTAPI
KiGetFeatureBits(VOID);
ULONG KeAllocateGdtSelector(ULONG Desc[2]);
VOID KeFreeGdtSelector(ULONG Entry);
VOID
KeApplicationProcessorInitDispatcher(VOID);
VOID
KeCreateApplicationProcessorIdleThread(ULONG Id);
VOID
NTAPI
Ke386InitThreadWithContext(PKTHREAD Thread,
PKSYSTEM_ROUTINE SystemRoutine,
PKSTART_ROUTINE StartRoutine,
PVOID StartContext,
PCONTEXT Context);
#define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
Ke386InitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
#ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
VOID
NTAPI

View file

@ -276,8 +276,11 @@ KiSelectNextThread(
VOID
NTAPI
CPUID(
OUT ULONG CpuInfo[4],
IN ULONG InfoType
IN ULONG InfoType,
OUT PULONG CpuInfoEax,
OUT PULONG CpuInfoEbx,
OUT PULONG CpuInfoEcx,
OUT PULONG CpuInfoEdx
);
BOOLEAN
@ -480,6 +483,16 @@ KeInitThread(
IN PKPROCESS Process
);
VOID
NTAPI
KiInitializeContextThread(
PKTHREAD Thread,
PKSYSTEM_ROUTINE SystemRoutine,
PKSTART_ROUTINE StartRoutine,
PVOID StartContext,
PCONTEXT Context
);
VOID
NTAPI
KeStartThread(

View file

@ -392,7 +392,7 @@ KiRundownThread(IN PKTHREAD Thread)
{
/* Clear it */
KeGetCurrentPrcb()->NpxThread = NULL;
KeArchFnInit();
Ke386FnInit();
}
#endif
}

View file

@ -35,97 +35,10 @@ typedef struct _KIRQ_TRAPFRAME
extern ULONG KePPCCacheAlignment;
struct _KPCR;
VOID
KiInitializeGdt(struct _KPCR* Pcr);
VOID
KiPPCApplicationProcessorInitializeTSS(VOID);
VOID
KiPPCBootInitializeTSS(VOID);
VOID
KiGdtPrepareForApplicationProcessorInit(ULONG Id);
VOID
KiPPCInitializeLdt(VOID);
VOID
KiPPCSetProcessorFeatures(VOID);
ULONG KeAllocateGdtSelector(ULONG Desc[2]);
VOID KeFreeGdtSelector(ULONG Entry);
#ifdef CONFIG_SMP
#define LOCK "isync ; "
#else
#define LOCK ""
#endif
static inline LONG KePPCTestAndClearBit(ULONG BitPos, volatile PULONG Addr)
{
ULONG OldValue, NewValue;
__asm__ __volatile__ ("lwarx %0,0,%1"
: "=r" (OldValue), "=r" (*Addr)
:
: "memory");
NewValue = OldValue & ~(1<<BitPos);
__asm__ __volatile__ ("stwcx. %0,0,%3\n\t"
"beq success\n\t"
"add %2,0,%1\n"
"success:\n\t"
"isync\n\t"
: "=r" (NewValue), "=r" (OldValue)
: "w" (NewValue), "w" (*Addr)
: "memory");
return NewValue & (1 << BitPos);
}
static inline LONG KePPCTestAndSetBit(ULONG BitPos, volatile PULONG Addr)
{
ULONG OldValue, NewValue;
__asm__ __volatile__ ("lwarx %0,0,%1"
: "=r" (OldValue), "=r" (*Addr)
:
: "memory");
NewValue = OldValue | (1<<BitPos);
__asm__ __volatile__ ("stwcx. %0,0,%3\n\t"
"beq success\n\t"
"add %2,0,%1\n"
"success:\n\t"
"isync\n\t"
: "=r" (NewValue), "=r" (OldValue)
: "w" (NewValue), "w" (*Addr)
: "memory");
return NewValue & (1 << BitPos);
}
#define KePPCRdmsr(msr,val1,val2) __asm__ __volatile__("mfmsr 3")
#define KePPCWrmsr(msr,val1,val2) __asm__ __volatile__("mtmsr 3")
#define KePPCDisableInterrupts() \
__asm__ __volatile__("mfmsr 0\n\t" \
"li 8,0x7fff\n\t" \
"and 0,8,0\n\t" \
"mtmsr 0\n\t")
#define KePPCEnableInterrupts() \
__asm__ __volatile__("mfmsr 0\n\t" \
"lis 8,0x8000@ha\n\t" \
"or 0,8,0\n\t" \
"mtmsr 0\n\t")
#define KePPCHaltProcessor()
#define KeArchEraseFlags()
#define KeArchDisableInterrupts() KePPCDisableInterrupts()
#define PPC_MIN_CACHE_LINE_SIZE 32
FORCEINLINE struct _KPCR * NTHALAPI KeGetCurrentKPCR(
@ -134,30 +47,6 @@ FORCEINLINE struct _KPCR * NTHALAPI KeGetCurrentKPCR(
return (struct _KPCR *)__readfsdword(0x1c);
}
VOID
NTAPI
KePPCInitThreadWithContext(
PKTHREAD Thread,
PKSYSTEM_ROUTINE SystemRoutine,
PKSTART_ROUTINE StartRoutine,
PVOID StartContext,
PCONTEXT Context);
VOID
NTAPI
KeApplicationProcessorInitDispatcher(
VOID);
VOID
NTAPI
KeCreateApplicationProcessorIdleThread(
ULONG Id);
static VOID KePPCFnInit()
{
__asm__("mfmsr 0\n\tori 0,0,0x2000\n\tmtmsr 0");
}
#ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
VOID
NTAPI
@ -167,17 +56,9 @@ KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine,
BOOLEAN UserThread,
KTRAP_FRAME TrapFrame);
#endif
VOID
NTAPI
KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState);
#endif /* __ASM__ */
#define KeArchFnInit() KePPCFnInit()
#define KeArchHaltProcessor() KePPCHaltProcessor()
#define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
KePPCInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
#endif /* __NTOSKRNL_INCLUDE_INTERNAL_POWERPC_KE_H */
/* EOF */

View file

@ -648,8 +648,8 @@ KdbpCmdRegs(
else if (Argv[0][0] == 'c') /* cregs */
{
ULONG Cr0, Cr2, Cr3, Cr4;
KDESCRIPTOR Gdtr, Ldtr, Idtr;
ULONG Tr;
KDESCRIPTOR Gdtr, Idtr;
USHORT Ldtr;
static const PCHAR Cr0Bits[32] = { " PE", " MP", " EM", " TS", " ET", " NE", NULL, NULL,
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
" WP", NULL, " AM", NULL, NULL, NULL, NULL, NULL,
@ -666,12 +666,9 @@ KdbpCmdRegs(
/* Get descriptor table regs */
Ke386GetGlobalDescriptorTable(&Gdtr.Limit);
Ke386GetLocalDescriptorTable(&Ldtr.Limit);
Ldtr = Ke386GetLocalDescriptorTable();
__sidt(&Idtr.Limit);
/* Get the task register */
Ke386GetTr((PUSHORT)&Tr);
/* Display the control registers */
KdbpPrint("CR0 0x%08x ", Cr0);
@ -700,7 +697,7 @@ KdbpCmdRegs(
/* Display the descriptor table regs */
KdbpPrint("\nGDTR Base 0x%08x Size 0x%04x\n", Gdtr.Base, Gdtr.Limit);
KdbpPrint("LDTR Base 0x%08x Size 0x%04x\n", Ldtr.Base, Ldtr.Limit);
KdbpPrint("LDTR 0x%04x\n", Ldtr);
KdbpPrint("IDTR Base 0x%08x Size 0x%04x\n", Idtr.Base, Idtr.Limit);
}
else if (Argv[0][0] == 's') /* sregs */
@ -1619,7 +1616,8 @@ KdbpCmdGdtLdtIdt(
ASSERT(Argv[0][0] == 'l');
/* Read LDTR */
Ke386GetLocalDescriptorTable(&Reg.Limit);
Reg.Limit = Ke386GetLocalDescriptorTable();
Reg.Base = 0;
i = 0;
ul = 1 << 2;
}

View file

@ -34,11 +34,11 @@ KiThreadStartup(VOID);
VOID
NTAPI
KeArmInitThreadWithContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
KiInitializeContextThread(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
{
PKTRAP_FRAME TrapFrame;
PKEXCEPTION_FRAME ExceptionFrame = NULL, CtxSwitchFrame;

View file

@ -552,7 +552,13 @@ NTAPI
KiBugCheckDebugBreak(IN ULONG StatusCode)
{
/* If KDBG isn't connected, freeze the CPU, otherwise, break */
if (KdDebuggerNotPresent) for (;;) KeArchHaltProcessor();
#if defined(_M_IX86) || defined(_M_AMD64)
if (KdDebuggerNotPresent) for (;;) __halt();
#elif defined(_M_ARM)
if (KdDebuggerNotPresent) for (;;) KeArmHaltProcessor();
#else
#error
#endif
DbgBreakPointWithStatus(StatusCode);
while (TRUE);
}
@ -1176,7 +1182,13 @@ KeBugCheckWithTf(IN ULONG BugCheckCode,
else if (KeBugCheckOwnerRecursionCount > 2)
{
/* Halt the CPU */
for (;;) KeArchHaltProcessor();
#if defined(_M_IX86) || defined(_M_AMD64)
for (;;) __halt();
#elif defined(_M_ARM)
for (;;) KeArmHaltProcessor();
#else
#error
#endif
}
}

View file

@ -87,11 +87,22 @@ static const CHAR CmpRiseID[] = "RiseRiseRise";
VOID
NTAPI
CPUID(OUT ULONG CpuInfo[4],
IN ULONG InfoType)
CPUID(IN ULONG InfoType,
OUT PULONG CpuInfoEax,
OUT PULONG CpuInfoEbx,
OUT PULONG CpuInfoEcx,
OUT PULONG CpuInfoEdx)
{
ULONG CpuInfo[4];
/* Perform the CPUID Operation */
__cpuid((int*)CpuInfo, InfoType);
/* Return the results */
*CpuInfoEax = CpuInfo[0];
*CpuInfoEbx = CpuInfo[1];
*CpuInfoEcx = CpuInfo[2];
*CpuInfoEdx = CpuInfo[3];
}
VOID
@ -104,7 +115,7 @@ WRMSR(IN ULONG Register,
}
LONGLONG
NTAPI
FASTCALL
RDMSR(IN ULONG Register)
{
/* Read from the MSR */
@ -118,7 +129,7 @@ NTAPI
KiSetProcessorType(VOID)
{
ULONG EFlags, NewEFlags;
ULONG Reg[4];
ULONG Reg, Dummy;
ULONG Stepping, Type;
/* Start by assuming no CPUID data */
@ -140,11 +151,11 @@ KiSetProcessorType(VOID)
__writeeflags(EFlags);
/* Peform CPUID 0 to see if CPUID 1 is supported */
CPUID(Reg, 0);
if (Reg[0] > 0)
CPUID(0, &Reg, &Dummy, &Dummy, &Dummy);
if (Reg > 0)
{
/* Do CPUID 1 now */
CPUID(Reg, 1);
CPUID(1, &Reg, &Dummy, &Dummy, &Dummy);
/*
* Get the Stepping and Type. The stepping contains both the
@ -153,11 +164,11 @@ KiSetProcessorType(VOID)
*
* For the stepping, we convert this: zzzzzzxy into this: x0y
*/
Stepping = Reg[0] & 0xF0;
Stepping = Reg & 0xF0;
Stepping <<= 4;
Stepping += (Reg[0] & 0xFF);
Stepping += (Reg & 0xFF);
Stepping &= 0xF0F;
Type = Reg[0] & 0xF00;
Type = Reg & 0xF00;
Type >>= 8;
/* Save them in the PRCB */
@ -192,7 +203,7 @@ KiGetCpuVendor(VOID)
if (!Prcb->CpuID) return 0;
/* Get the Vendor ID and null-terminate it */
CPUID(Vendor, 0);
CPUID(0, &Vendor[0], &Vendor[1], &Vendor[2], &Vendor[3]);
Vendor[4] = 0;
/* Re-arrange vendor string */
@ -247,7 +258,7 @@ KiGetFeatureBits(VOID)
PKPRCB Prcb = KeGetCurrentPrcb();
ULONG Vendor;
ULONG FeatureBits = KF_WORKING_PTE;
ULONG Reg[4];
ULONG Reg[4], Dummy;
BOOLEAN ExtendedCPUID = TRUE;
ULONG CpuFeatures = 0;
@ -258,7 +269,7 @@ KiGetFeatureBits(VOID)
if (!Vendor) return FeatureBits;
/* Get the CPUID Info. Features are in Reg[3]. */
CPUID(Reg, 1);
CPUID(1, &Reg[0], &Reg[1], &Dummy, &Reg[3]);
/* Set the initial APIC ID */
Prcb->InitialApicId = (UCHAR)(Reg[1] >> 24);
@ -267,12 +278,13 @@ KiGetFeatureBits(VOID)
{
/* Intel CPUs */
case CPU_INTEL:
/* Check if it's a P6 */
/* Check if it's a P6 or higher */
if (Prcb->CpuType == 6)
{
/* Perform the special sequence to get the MicroCode Signature */
WRMSR(0x8B, 0);
CPUID(Reg, 1);
CPUID(1, &Dummy, &Dummy, &Dummy, &Dummy);
Prcb->UpdateSignature.QuadPart = RDMSR(0x8B);
}
else if (Prcb->CpuType == 5)
@ -356,10 +368,14 @@ KiGetFeatureBits(VOID)
/* Cyrix CPUs */
case CPU_CYRIX:
/* FIXME: CMPXCGH8B */
break;
/* Transmeta CPUs */
case CPU_TRANSMETA:
/* Enable CMPXCHG8B if the family (>= 5), model and stepping (>= 4.2) support it */
if ((Reg[0] & 0x0FFF) >= 0x0542)
{
@ -372,6 +388,7 @@ KiGetFeatureBits(VOID)
/* Centaur, IDT, Rise and VIA CPUs */
case CPU_CENTAUR:
case CPU_RISE:
/* These CPUs don't report the presence of CMPXCHG8B through CPUID.
However, this feature exists and operates properly without any additional steps. */
FeatureBits |= KF_CMPXCHG8B;
@ -416,14 +433,14 @@ KiGetFeatureBits(VOID)
if (ExtendedCPUID)
{
/* Do the call */
CPUID(Reg, 0x80000000);
CPUID(0x80000000, &Reg[0], &Dummy, &Dummy, &Dummy);
if ((Reg[0] & 0xffffff00) == 0x80000000)
{
/* Check if CPUID 0x80000001 is supported */
if (Reg[0] >= 0x80000001)
{
/* Check which extended features are available. */
CPUID(Reg, 0x80000001);
CPUID(0x80000001, &Dummy, &Dummy, &Dummy, &Reg[3]);
/* Check if NX-bit is supported */
if (Reg[3] & 0x00100000) FeatureBits |= KF_NX_BIT;
@ -450,7 +467,7 @@ KiGetCacheInformation(VOID)
{
PKIPCR Pcr = (PKIPCR)KeGetPcr();
ULONG Vendor;
ULONG Data[4];
ULONG Data[4], Dummy;
ULONG CacheRequests = 0, i;
ULONG CurrentRegister;
UCHAR RegisterByte;
@ -470,14 +487,14 @@ KiGetCacheInformation(VOID)
case CPU_INTEL:
/*Check if we support CPUID 2 */
CPUID(Data, 0);
CPUID(0, &Data[0], &Dummy, &Dummy, &Dummy);
if (Data[0] >= 2)
{
/* We need to loop for the number of times CPUID will tell us to */
do
{
/* Do the CPUID call */
CPUID(Data, 2);
CPUID(2, &Data[0], &Data[1], &Data[2], &Data[3]);
/* Check if it was the first call */
if (FirstPass)
@ -539,16 +556,24 @@ KiGetCacheInformation(VOID)
case CPU_AMD:
/* Check if we support CPUID 0x80000006 */
CPUID(Data, 0x80000000);
CPUID(0x80000000, &Data[0], &Dummy, &Dummy, &Dummy);
if (Data[0] >= 6)
{
/* Get 2nd level cache and tlb size */
CPUID(Data, 0x80000006);
CPUID(0x80000006, &Dummy, &Dummy, &Data[2], &Dummy);
/* Set the L2 Cache Size */
Pcr->SecondLevelCacheSize = (Data[2] & 0xFFFF0000) >> 6;
}
break;
case CPU_CYRIX:
case CPU_TRANSMETA:
case CPU_CENTAUR:
case CPU_RISE:
/* FIXME */
break;
}
}
@ -760,8 +785,8 @@ KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
/* Save GDT, IDT, LDT and TSS */
Ke386GetGlobalDescriptorTable(&ProcessorState->SpecialRegisters.Gdtr.Limit);
__sidt(&ProcessorState->SpecialRegisters.Idtr.Limit);
Ke386GetTr(&ProcessorState->SpecialRegisters.Tr);
Ke386GetLocalDescriptorTable(&ProcessorState->SpecialRegisters.Ldtr);
ProcessorState->SpecialRegisters.Tr = Ke386GetTr();
ProcessorState->SpecialRegisters.Ldtr = Ke386GetLocalDescriptorTable();
}
VOID

View file

@ -32,7 +32,7 @@ KiInitMachineDependent(VOID)
ULONG i, Affinity, Sample = 0;
PFX_SAVE_AREA FxSaveArea;
ULONG MXCsrMask = 0xFFBF;
ULONG Dummy[4];
ULONG Dummy;
KI_SAMPLE_MAP Samples[4];
PKI_SAMPLE_MAP CurrentSample = Samples;
@ -179,7 +179,7 @@ KiInitMachineDependent(VOID)
for (;;)
{
/* Do a dummy CPUID to start the sample */
CPUID(Dummy, 0);
CPUID(0, &Dummy, &Dummy, &Dummy, &Dummy);
/* Fill out the starting data */
CurrentSample->PerfStart = KeQueryPerformanceCounter(NULL);
@ -192,7 +192,7 @@ KiInitMachineDependent(VOID)
&CurrentSample->PerfFreq);
/* Do another dummy CPUID */
CPUID(Dummy, 0);
CPUID(0, &Dummy, &Dummy, &Dummy, &Dummy);
/* Fill out the ending data */
CurrentSample->PerfEnd =
@ -620,7 +620,7 @@ KiGetMachineBootPointers(IN PKGDTENTRY *Gdt,
*Idt = (PKIDTENTRY)IdtDescriptor.Base;
/* Get TSS and FS Selectors */
Ke386GetTr(&Tr);
Tr = Ke386GetTr();
if (Tr != KGDT_TSS) Tr = KGDT_TSS; // FIXME: HACKHACK
Fs = Ke386GetFs();

View file

@ -46,11 +46,11 @@ typedef struct _KKINIT_FRAME
VOID
NTAPI
Ke386InitThreadWithContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
KiInitializeContextThread(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
{
PFX_SAVE_AREA FxSaveArea;
PFXSAVE_FORMAT FxSaveFormat;

View file

@ -10,7 +10,6 @@
#include <asm.h>
#include <internal/i386/asmmacro.S>
#undef LOCK
.intel_syntax noprefix
/* FIXME: Can we make a nice macro to generate V86 Opcode handlers? */
@ -140,6 +139,8 @@ _Opcode0FV86:
UNHANDLED_V86_OPCODE
.endfunc
#undef LOCK
GENERATE_PREFIX_HANDLER ES
GENERATE_PREFIX_HANDLER CS
GENERATE_PREFIX_HANDLER DS
@ -152,6 +153,12 @@ GENERATE_PREFIX_HANDLER LOCK
GENERATE_PREFIX_HANDLER REP
GENERATE_PREFIX_HANDLER REPNE
#ifdef CONFIG_SMP
#define LOCK lock
#else
#define LOCK
#endif
.func OpcodeINSBV86
_OpcodeINSBV86:
UNHANDLED_V86_OPCODE

View file

@ -50,11 +50,11 @@ typedef struct _KKINIT_FRAME
VOID
NTAPI
KePPCInitThreadWithContext(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
KiInitializeContextThread(IN PKTHREAD Thread,
IN PKSYSTEM_ROUTINE SystemRoutine,
IN PKSTART_ROUTINE StartRoutine,
IN PVOID StartContext,
IN PCONTEXT ContextPointer)
{
PFX_SAVE_AREA FxSaveArea;
PKSTART_FRAME StartFrame;

View file

@ -818,11 +818,11 @@ KeInitThread(IN OUT PKTHREAD Thread,
_SEH2_TRY
{
/* Initalize the Thread Context */
KeArchInitThreadWithContext(Thread,
SystemRoutine,
StartRoutine,
StartContext,
Context);
KiInitializeContextThread(Thread,
SystemRoutine,
StartRoutine,
StartContext,
Context);
}
_SEH2_EXCEPT(EXCEPTION_EXECUTE_HANDLER)
{