mirror of
https://github.com/reactos/reactos.git
synced 2025-08-03 17:16:04 +00:00
- Change CPUID to match the old Ki386Cpuid and take 4 output arguments instead of an array. This way we save some stack when using a dummy cpuid for synchronization and can query only the registers we want in the case we don't want all 4.
- Simplify Ke386GetTr and Ke386GetLocalDescriptorTable to return by value instead of reference. - Make RDMSR smaller by making it fastcall as rdmsr takes its argument in ecx. - Fix KiGetCacheInformation -- it only handled the Intel and AMD case. - Replace Ke386HaltProcessor with __halt. - KiHaltProcessorDpcRoutine: Always halt the processor for the architectures we support for consistency. - Clean up x86 and PPC headers from deprecated stuff. - Fix broken LOCK undefine in v86m_sup.S -- LOCK is used both in a macro and the code, so only undefine it where required and redefine it after it is used (this worked because LOCK was interpreted as lock). Get rid of KeArch*: - Rename KeArchInitThreadWithContext to KiInitializeContextThread and use the same name for all architectures. - Kill KeArchHaltProcessor. Use __halt and KeArmHaltProcessor directly instead. - Use Ke386FnInit instead of KeArchFnInit -- it is only used for x86. svn path=/trunk/; revision=43180
This commit is contained in:
parent
733f6cb89b
commit
8fa95b6a9c
21 changed files with 176 additions and 284 deletions
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@ -70,7 +70,7 @@ HalProcessorIdle(VOID)
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{
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/* Enable interrupts and halt the processor */
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_enable();
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Ke386HaltProcessor();
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__halt();
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}
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/*
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@ -67,7 +67,7 @@ HalpReboot(VOID)
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HalpWriteResetCommand();
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/* Halt the CPU */
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Ke386HaltProcessor();
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__halt();
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}
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/* PUBLIC FUNCTIONS **********************************************************/
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@ -1107,6 +1107,10 @@ __INTRIN_INLINE void _enable(void)
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__asm__("sti");
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}
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__INTRIN_INLINE void __halt(void)
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{
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__asm__("hlt\n\t");
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}
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/*** Protected memory management ***/
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@ -145,6 +145,7 @@ void __debugbreak(void);
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void __int2c(void);
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void _disable(void);
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void _enable(void);
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void __halt(void);
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/*** Protected memory management ***/
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void __writecr0(const unsigned __int64 Data);
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@ -238,7 +238,7 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
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HANDLE KeyHandle, BiosHandle, SystemHandle, FpuHandle, SectionHandle;
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CONFIGURATION_COMPONENT_DATA ConfigData;
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CHAR Buffer[128];
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ULONG ExtendedId, CpuInfo[4];
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ULONG ExtendedId, Dummy;
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PKPRCB Prcb;
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USHORT IndexTable[MaximumType + 1] = {0};
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ANSI_STRING TempString;
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@ -428,8 +428,7 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
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else
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{
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/* Check if we have extended CPUID that supports name ID */
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CPUID(CpuInfo, 0x80000000);
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ExtendedId = CpuInfo[0];
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CPUID(0x80000000, &ExtendedId, &Dummy, &Dummy, &Dummy);
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if (ExtendedId >= 0x80000004)
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{
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/* Do all the CPUIDs required to get the full name */
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@ -437,8 +436,11 @@ CmpInitializeMachineDependentConfiguration(IN PLOADER_PARAMETER_BLOCK LoaderBloc
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for (ExtendedId = 2; ExtendedId <= 4; ExtendedId++)
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{
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/* Do the CPUID and save the name string */
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CPUID((PULONG)PartialString,
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0x80000000 | ExtendedId);
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CPUID(0x80000000 | ExtendedId,
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(PULONG)PartialString,
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(PULONG)PartialString + 1,
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(PULONG)PartialString + 2,
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(PULONG)PartialString + 3);
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/* Go to the next name string */
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PartialString += 16;
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@ -14,26 +14,30 @@
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/* FUNCTIONS *****************************************************************/
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VOID NTAPI
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VOID
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NTAPI
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KiHaltProcessorDpcRoutine(IN PKDPC Dpc,
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IN PVOID DeferredContext,
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IN PVOID SystemArgument1,
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IN PVOID SystemArgument2)
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IN PVOID DeferredContext,
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IN PVOID SystemArgument1,
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IN PVOID SystemArgument2)
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{
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KIRQL OldIrql;
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if (DeferredContext)
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{
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ExFreePool(DeferredContext);
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}
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while (TRUE)
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{
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KeRaiseIrql(SYNCH_LEVEL, &OldIrql);
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#if defined(_M_IX86)
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Ke386HaltProcessor();
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KIRQL OldIrql;
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if (DeferredContext)
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{
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ExFreePool(DeferredContext);
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}
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while (TRUE)
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{
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KeRaiseIrql(SYNCH_LEVEL, &OldIrql);
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#if defined(_M_IX86) || defined(_M_AMD64)
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__halt();
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#elif defined(_M_ARM)
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KeArmHaltProcessor();
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#else
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HalProcessorIdle();
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HalProcessorIdle();
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#endif
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}
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}
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}
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VOID NTAPI
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@ -7,18 +7,6 @@
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#define PCR_ENTRY 0
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#define PDR_ENTRY 2
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#define KeArchHaltProcessor() KeArmHaltProcessor()
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VOID
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NTAPI
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KeArmInitThreadWithContext(
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IN PKTHREAD Thread,
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IN PKSYSTEM_ROUTINE SystemRoutine,
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IN PKSTART_ROUTINE StartRoutine,
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IN PVOID StartContext,
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IN PCONTEXT Context
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);
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VOID
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KiPassiveRelease(
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VOID
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@ -44,7 +32,6 @@ KeFlushTb(
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VOID
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);
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#define KeArchInitThreadWithContext KeArmInitThreadWithContext
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#define KiSystemStartupReal KiSystemStartup
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#define KiGetPreviousMode(tf) \
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@ -1,12 +1,6 @@
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#ifndef _INTRIN_INTERNAL_
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#define _INTRIN_INTERNAL_
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#ifdef CONFIG_SMP
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#define LOCK "lock ; "
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#else
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#define LOCK ""
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#endif
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#if defined(__GNUC__)
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#define Ke386SetGlobalDescriptorTable(X) \
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: /* no input */ \
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: "memory");
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#define Ke386GetLocalDescriptorTable(X) \
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__asm__("sldt %0\n\t" \
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: "=m" (*X) \
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: /* no input */ \
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FORCEINLINE
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USHORT
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Ke386GetLocalDescriptorTable()
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{
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USHORT Ldt;
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__asm__("sldt %0\n\t"
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: "=m" (Ldt)
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: /* no input */
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: "memory");
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return Ldt;
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}
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#define Ke386SetLocalDescriptorTable(X) \
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__asm__("lldt %w0\n\t" \
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#define Ke386SetTr(X) __asm__ __volatile__("ltr %%ax" : :"a" (X));
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#define Ke386GetTr(X) \
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__asm__("str %0\n\t" \
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: "=m" (*X));
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FORCEINLINE
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USHORT
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Ke386GetTr(VOID)
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{
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USHORT Tr;
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__asm__("str %0\n\t"
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: "=m" (Tr));
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return Tr;
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}
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#define _Ke386GetSeg(N) ({ \
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unsigned int __d; \
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__asm__("movl %%" #N ",%0\n\t" :"=r" (__d)); \
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__d; \
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})
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})
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#define _Ke386SetSeg(N,X) __asm__ __volatile__("movl %0,%%" #N : :"r" (X));
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#define Ke386HaltProcessor() __asm__("hlt\n\t");
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#define Ke386FnInit() __asm__("fninit\n\t");
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__asm fninit;
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}
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FORCEINLINE
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VOID
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Ke386HaltProcessor(VOID)
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{
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__asm hlt;
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}
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FORCEINLINE
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VOID
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Ke386GetGlobalDescriptorTable(OUT PVOID Descriptor)
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@ -97,12 +94,10 @@ Ke386SetGlobalDescriptorTable(IN PVOID Descriptor)
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}
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FORCEINLINE
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VOID
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Ke386GetLocalDescriptorTable(OUT PUSHORT Descriptor)
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USHORT
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Ke386GetLocalDescriptorTable(VOID)
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{
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USHORT _Descriptor;
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__asm sldt _Descriptor;
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*Descriptor = _Descriptor;
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__asm sldt ax;
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}
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FORCEINLINE
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@ -121,11 +116,9 @@ Ke386SetTr(IN USHORT Tr)
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FORCEINLINE
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USHORT
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Ke386GetTr(OUT PUSHORT Tr)
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Ke386GetTr(VOID)
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{
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USHORT _Tr;
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__asm str _Tr;
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*Tr = _Tr;
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__asm str ax;
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}
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//
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@ -1,24 +1,13 @@
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#ifndef __NTOSKRNL_INCLUDE_INTERNAL_I386_KE_H
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#define __NTOSKRNL_INCLUDE_INTERNAL_I386_KE_H
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#define FRAME_EDITED 0xFFF8
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#ifndef __ASM__
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#include "intrin_i.h"
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#include "v86m.h"
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#define KeArchFnInit() Ke386FnInit()
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#define KeArchHaltProcessor() Ke386HaltProcessor()
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extern ULONG Ke386CacheAlignment;
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struct _KPCR;
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VOID
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KiInitializeGdt(struct _KPCR* Pcr);
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VOID
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Ki386ApplicationProcessorInitializeTSS(VOID);
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VOID
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FASTCALL
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Ki386InitializeTss(
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IN PKGDTENTRY Gdt
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);
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VOID
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KiGdtPrepareForApplicationProcessorInit(ULONG Id);
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VOID
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Ki386InitializeLdt(VOID);
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VOID
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Ki386SetProcessorFeatures(VOID);
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VOID
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NTAPI
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KiSetCR0Bits(VOID);
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@ -62,23 +44,6 @@ ULONG
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NTAPI
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KiGetFeatureBits(VOID);
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ULONG KeAllocateGdtSelector(ULONG Desc[2]);
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VOID KeFreeGdtSelector(ULONG Entry);
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VOID
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KeApplicationProcessorInitDispatcher(VOID);
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VOID
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KeCreateApplicationProcessorIdleThread(ULONG Id);
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VOID
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NTAPI
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Ke386InitThreadWithContext(PKTHREAD Thread,
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PKSYSTEM_ROUTINE SystemRoutine,
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PKSTART_ROUTINE StartRoutine,
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PVOID StartContext,
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PCONTEXT Context);
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#define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
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Ke386InitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
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#ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
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VOID
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NTAPI
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@ -276,8 +276,11 @@ KiSelectNextThread(
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VOID
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NTAPI
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CPUID(
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OUT ULONG CpuInfo[4],
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IN ULONG InfoType
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IN ULONG InfoType,
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OUT PULONG CpuInfoEax,
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OUT PULONG CpuInfoEbx,
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OUT PULONG CpuInfoEcx,
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OUT PULONG CpuInfoEdx
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);
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BOOLEAN
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@ -480,6 +483,16 @@ KeInitThread(
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IN PKPROCESS Process
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);
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VOID
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NTAPI
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KiInitializeContextThread(
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PKTHREAD Thread,
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PKSYSTEM_ROUTINE SystemRoutine,
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PKSTART_ROUTINE StartRoutine,
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PVOID StartContext,
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PCONTEXT Context
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);
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VOID
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NTAPI
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KeStartThread(
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|
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@ -392,7 +392,7 @@ KiRundownThread(IN PKTHREAD Thread)
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{
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/* Clear it */
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KeGetCurrentPrcb()->NpxThread = NULL;
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KeArchFnInit();
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Ke386FnInit();
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}
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#endif
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}
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|
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@ -35,97 +35,10 @@ typedef struct _KIRQ_TRAPFRAME
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extern ULONG KePPCCacheAlignment;
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struct _KPCR;
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VOID
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KiInitializeGdt(struct _KPCR* Pcr);
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VOID
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KiPPCApplicationProcessorInitializeTSS(VOID);
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VOID
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KiPPCBootInitializeTSS(VOID);
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VOID
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KiGdtPrepareForApplicationProcessorInit(ULONG Id);
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VOID
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KiPPCInitializeLdt(VOID);
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VOID
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KiPPCSetProcessorFeatures(VOID);
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ULONG KeAllocateGdtSelector(ULONG Desc[2]);
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VOID KeFreeGdtSelector(ULONG Entry);
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#ifdef CONFIG_SMP
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#define LOCK "isync ; "
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#else
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#define LOCK ""
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#endif
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static inline LONG KePPCTestAndClearBit(ULONG BitPos, volatile PULONG Addr)
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{
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ULONG OldValue, NewValue;
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__asm__ __volatile__ ("lwarx %0,0,%1"
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: "=r" (OldValue), "=r" (*Addr)
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:
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: "memory");
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NewValue = OldValue & ~(1<<BitPos);
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__asm__ __volatile__ ("stwcx. %0,0,%3\n\t"
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"beq success\n\t"
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"add %2,0,%1\n"
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"success:\n\t"
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"isync\n\t"
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: "=r" (NewValue), "=r" (OldValue)
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: "w" (NewValue), "w" (*Addr)
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: "memory");
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return NewValue & (1 << BitPos);
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}
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static inline LONG KePPCTestAndSetBit(ULONG BitPos, volatile PULONG Addr)
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{
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ULONG OldValue, NewValue;
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__asm__ __volatile__ ("lwarx %0,0,%1"
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: "=r" (OldValue), "=r" (*Addr)
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:
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: "memory");
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NewValue = OldValue | (1<<BitPos);
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__asm__ __volatile__ ("stwcx. %0,0,%3\n\t"
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"beq success\n\t"
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"add %2,0,%1\n"
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"success:\n\t"
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"isync\n\t"
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: "=r" (NewValue), "=r" (OldValue)
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: "w" (NewValue), "w" (*Addr)
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: "memory");
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|
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return NewValue & (1 << BitPos);
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}
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#define KePPCRdmsr(msr,val1,val2) __asm__ __volatile__("mfmsr 3")
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#define KePPCWrmsr(msr,val1,val2) __asm__ __volatile__("mtmsr 3")
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#define KePPCDisableInterrupts() \
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__asm__ __volatile__("mfmsr 0\n\t" \
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"li 8,0x7fff\n\t" \
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"and 0,8,0\n\t" \
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"mtmsr 0\n\t")
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#define KePPCEnableInterrupts() \
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__asm__ __volatile__("mfmsr 0\n\t" \
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"lis 8,0x8000@ha\n\t" \
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"or 0,8,0\n\t" \
|
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"mtmsr 0\n\t")
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|
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#define KePPCHaltProcessor()
|
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|
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#define KeArchEraseFlags()
|
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#define KeArchDisableInterrupts() KePPCDisableInterrupts()
|
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|
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#define PPC_MIN_CACHE_LINE_SIZE 32
|
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|
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FORCEINLINE struct _KPCR * NTHALAPI KeGetCurrentKPCR(
|
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|
@ -134,30 +47,6 @@ FORCEINLINE struct _KPCR * NTHALAPI KeGetCurrentKPCR(
|
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return (struct _KPCR *)__readfsdword(0x1c);
|
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}
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
KePPCInitThreadWithContext(
|
||||
PKTHREAD Thread,
|
||||
PKSYSTEM_ROUTINE SystemRoutine,
|
||||
PKSTART_ROUTINE StartRoutine,
|
||||
PVOID StartContext,
|
||||
PCONTEXT Context);
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
KeApplicationProcessorInitDispatcher(
|
||||
VOID);
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
KeCreateApplicationProcessorIdleThread(
|
||||
ULONG Id);
|
||||
|
||||
static VOID KePPCFnInit()
|
||||
{
|
||||
__asm__("mfmsr 0\n\tori 0,0,0x2000\n\tmtmsr 0");
|
||||
}
|
||||
|
||||
#ifdef _NTOSKRNL_ /* FIXME: Move flags above to NDK instead of here */
|
||||
VOID
|
||||
NTAPI
|
||||
|
@ -167,17 +56,9 @@ KiThreadStartup(PKSYSTEM_ROUTINE SystemRoutine,
|
|||
BOOLEAN UserThread,
|
||||
KTRAP_FRAME TrapFrame);
|
||||
#endif
|
||||
VOID
|
||||
NTAPI
|
||||
KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState);
|
||||
|
||||
#endif /* __ASM__ */
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||||
|
||||
#define KeArchFnInit() KePPCFnInit()
|
||||
#define KeArchHaltProcessor() KePPCHaltProcessor()
|
||||
#define KeArchInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context) \
|
||||
KePPCInitThreadWithContext(Thread,SystemRoutine,StartRoutine,StartContext,Context)
|
||||
|
||||
#endif /* __NTOSKRNL_INCLUDE_INTERNAL_POWERPC_KE_H */
|
||||
|
||||
/* EOF */
|
||||
|
|
|
@ -648,8 +648,8 @@ KdbpCmdRegs(
|
|||
else if (Argv[0][0] == 'c') /* cregs */
|
||||
{
|
||||
ULONG Cr0, Cr2, Cr3, Cr4;
|
||||
KDESCRIPTOR Gdtr, Ldtr, Idtr;
|
||||
ULONG Tr;
|
||||
KDESCRIPTOR Gdtr, Idtr;
|
||||
USHORT Ldtr;
|
||||
static const PCHAR Cr0Bits[32] = { " PE", " MP", " EM", " TS", " ET", " NE", NULL, NULL,
|
||||
NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
|
||||
" WP", NULL, " AM", NULL, NULL, NULL, NULL, NULL,
|
||||
|
@ -666,12 +666,9 @@ KdbpCmdRegs(
|
|||
|
||||
/* Get descriptor table regs */
|
||||
Ke386GetGlobalDescriptorTable(&Gdtr.Limit);
|
||||
Ke386GetLocalDescriptorTable(&Ldtr.Limit);
|
||||
Ldtr = Ke386GetLocalDescriptorTable();
|
||||
__sidt(&Idtr.Limit);
|
||||
|
||||
/* Get the task register */
|
||||
Ke386GetTr((PUSHORT)&Tr);
|
||||
|
||||
/* Display the control registers */
|
||||
KdbpPrint("CR0 0x%08x ", Cr0);
|
||||
|
||||
|
@ -700,7 +697,7 @@ KdbpCmdRegs(
|
|||
|
||||
/* Display the descriptor table regs */
|
||||
KdbpPrint("\nGDTR Base 0x%08x Size 0x%04x\n", Gdtr.Base, Gdtr.Limit);
|
||||
KdbpPrint("LDTR Base 0x%08x Size 0x%04x\n", Ldtr.Base, Ldtr.Limit);
|
||||
KdbpPrint("LDTR 0x%04x\n", Ldtr);
|
||||
KdbpPrint("IDTR Base 0x%08x Size 0x%04x\n", Idtr.Base, Idtr.Limit);
|
||||
}
|
||||
else if (Argv[0][0] == 's') /* sregs */
|
||||
|
@ -1619,7 +1616,8 @@ KdbpCmdGdtLdtIdt(
|
|||
ASSERT(Argv[0][0] == 'l');
|
||||
|
||||
/* Read LDTR */
|
||||
Ke386GetLocalDescriptorTable(&Reg.Limit);
|
||||
Reg.Limit = Ke386GetLocalDescriptorTable();
|
||||
Reg.Base = 0;
|
||||
i = 0;
|
||||
ul = 1 << 2;
|
||||
}
|
||||
|
|
|
@ -34,11 +34,11 @@ KiThreadStartup(VOID);
|
|||
|
||||
VOID
|
||||
NTAPI
|
||||
KeArmInitThreadWithContext(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
KiInitializeContextThread(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
{
|
||||
PKTRAP_FRAME TrapFrame;
|
||||
PKEXCEPTION_FRAME ExceptionFrame = NULL, CtxSwitchFrame;
|
||||
|
|
|
@ -552,7 +552,13 @@ NTAPI
|
|||
KiBugCheckDebugBreak(IN ULONG StatusCode)
|
||||
{
|
||||
/* If KDBG isn't connected, freeze the CPU, otherwise, break */
|
||||
if (KdDebuggerNotPresent) for (;;) KeArchHaltProcessor();
|
||||
#if defined(_M_IX86) || defined(_M_AMD64)
|
||||
if (KdDebuggerNotPresent) for (;;) __halt();
|
||||
#elif defined(_M_ARM)
|
||||
if (KdDebuggerNotPresent) for (;;) KeArmHaltProcessor();
|
||||
#else
|
||||
#error
|
||||
#endif
|
||||
DbgBreakPointWithStatus(StatusCode);
|
||||
while (TRUE);
|
||||
}
|
||||
|
@ -1176,7 +1182,13 @@ KeBugCheckWithTf(IN ULONG BugCheckCode,
|
|||
else if (KeBugCheckOwnerRecursionCount > 2)
|
||||
{
|
||||
/* Halt the CPU */
|
||||
for (;;) KeArchHaltProcessor();
|
||||
#if defined(_M_IX86) || defined(_M_AMD64)
|
||||
for (;;) __halt();
|
||||
#elif defined(_M_ARM)
|
||||
for (;;) KeArmHaltProcessor();
|
||||
#else
|
||||
#error
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -87,11 +87,22 @@ static const CHAR CmpRiseID[] = "RiseRiseRise";
|
|||
|
||||
VOID
|
||||
NTAPI
|
||||
CPUID(OUT ULONG CpuInfo[4],
|
||||
IN ULONG InfoType)
|
||||
CPUID(IN ULONG InfoType,
|
||||
OUT PULONG CpuInfoEax,
|
||||
OUT PULONG CpuInfoEbx,
|
||||
OUT PULONG CpuInfoEcx,
|
||||
OUT PULONG CpuInfoEdx)
|
||||
{
|
||||
ULONG CpuInfo[4];
|
||||
|
||||
/* Perform the CPUID Operation */
|
||||
__cpuid((int*)CpuInfo, InfoType);
|
||||
|
||||
/* Return the results */
|
||||
*CpuInfoEax = CpuInfo[0];
|
||||
*CpuInfoEbx = CpuInfo[1];
|
||||
*CpuInfoEcx = CpuInfo[2];
|
||||
*CpuInfoEdx = CpuInfo[3];
|
||||
}
|
||||
|
||||
VOID
|
||||
|
@ -104,7 +115,7 @@ WRMSR(IN ULONG Register,
|
|||
}
|
||||
|
||||
LONGLONG
|
||||
NTAPI
|
||||
FASTCALL
|
||||
RDMSR(IN ULONG Register)
|
||||
{
|
||||
/* Read from the MSR */
|
||||
|
@ -118,7 +129,7 @@ NTAPI
|
|||
KiSetProcessorType(VOID)
|
||||
{
|
||||
ULONG EFlags, NewEFlags;
|
||||
ULONG Reg[4];
|
||||
ULONG Reg, Dummy;
|
||||
ULONG Stepping, Type;
|
||||
|
||||
/* Start by assuming no CPUID data */
|
||||
|
@ -140,11 +151,11 @@ KiSetProcessorType(VOID)
|
|||
__writeeflags(EFlags);
|
||||
|
||||
/* Peform CPUID 0 to see if CPUID 1 is supported */
|
||||
CPUID(Reg, 0);
|
||||
if (Reg[0] > 0)
|
||||
CPUID(0, &Reg, &Dummy, &Dummy, &Dummy);
|
||||
if (Reg > 0)
|
||||
{
|
||||
/* Do CPUID 1 now */
|
||||
CPUID(Reg, 1);
|
||||
CPUID(1, &Reg, &Dummy, &Dummy, &Dummy);
|
||||
|
||||
/*
|
||||
* Get the Stepping and Type. The stepping contains both the
|
||||
|
@ -153,11 +164,11 @@ KiSetProcessorType(VOID)
|
|||
*
|
||||
* For the stepping, we convert this: zzzzzzxy into this: x0y
|
||||
*/
|
||||
Stepping = Reg[0] & 0xF0;
|
||||
Stepping = Reg & 0xF0;
|
||||
Stepping <<= 4;
|
||||
Stepping += (Reg[0] & 0xFF);
|
||||
Stepping += (Reg & 0xFF);
|
||||
Stepping &= 0xF0F;
|
||||
Type = Reg[0] & 0xF00;
|
||||
Type = Reg & 0xF00;
|
||||
Type >>= 8;
|
||||
|
||||
/* Save them in the PRCB */
|
||||
|
@ -192,7 +203,7 @@ KiGetCpuVendor(VOID)
|
|||
if (!Prcb->CpuID) return 0;
|
||||
|
||||
/* Get the Vendor ID and null-terminate it */
|
||||
CPUID(Vendor, 0);
|
||||
CPUID(0, &Vendor[0], &Vendor[1], &Vendor[2], &Vendor[3]);
|
||||
Vendor[4] = 0;
|
||||
|
||||
/* Re-arrange vendor string */
|
||||
|
@ -247,7 +258,7 @@ KiGetFeatureBits(VOID)
|
|||
PKPRCB Prcb = KeGetCurrentPrcb();
|
||||
ULONG Vendor;
|
||||
ULONG FeatureBits = KF_WORKING_PTE;
|
||||
ULONG Reg[4];
|
||||
ULONG Reg[4], Dummy;
|
||||
BOOLEAN ExtendedCPUID = TRUE;
|
||||
ULONG CpuFeatures = 0;
|
||||
|
||||
|
@ -258,7 +269,7 @@ KiGetFeatureBits(VOID)
|
|||
if (!Vendor) return FeatureBits;
|
||||
|
||||
/* Get the CPUID Info. Features are in Reg[3]. */
|
||||
CPUID(Reg, 1);
|
||||
CPUID(1, &Reg[0], &Reg[1], &Dummy, &Reg[3]);
|
||||
|
||||
/* Set the initial APIC ID */
|
||||
Prcb->InitialApicId = (UCHAR)(Reg[1] >> 24);
|
||||
|
@ -267,12 +278,13 @@ KiGetFeatureBits(VOID)
|
|||
{
|
||||
/* Intel CPUs */
|
||||
case CPU_INTEL:
|
||||
/* Check if it's a P6 */
|
||||
|
||||
/* Check if it's a P6 or higher */
|
||||
if (Prcb->CpuType == 6)
|
||||
{
|
||||
/* Perform the special sequence to get the MicroCode Signature */
|
||||
WRMSR(0x8B, 0);
|
||||
CPUID(Reg, 1);
|
||||
CPUID(1, &Dummy, &Dummy, &Dummy, &Dummy);
|
||||
Prcb->UpdateSignature.QuadPart = RDMSR(0x8B);
|
||||
}
|
||||
else if (Prcb->CpuType == 5)
|
||||
|
@ -356,10 +368,14 @@ KiGetFeatureBits(VOID)
|
|||
|
||||
/* Cyrix CPUs */
|
||||
case CPU_CYRIX:
|
||||
|
||||
/* FIXME: CMPXCGH8B */
|
||||
|
||||
break;
|
||||
|
||||
/* Transmeta CPUs */
|
||||
case CPU_TRANSMETA:
|
||||
|
||||
/* Enable CMPXCHG8B if the family (>= 5), model and stepping (>= 4.2) support it */
|
||||
if ((Reg[0] & 0x0FFF) >= 0x0542)
|
||||
{
|
||||
|
@ -372,6 +388,7 @@ KiGetFeatureBits(VOID)
|
|||
/* Centaur, IDT, Rise and VIA CPUs */
|
||||
case CPU_CENTAUR:
|
||||
case CPU_RISE:
|
||||
|
||||
/* These CPUs don't report the presence of CMPXCHG8B through CPUID.
|
||||
However, this feature exists and operates properly without any additional steps. */
|
||||
FeatureBits |= KF_CMPXCHG8B;
|
||||
|
@ -416,14 +433,14 @@ KiGetFeatureBits(VOID)
|
|||
if (ExtendedCPUID)
|
||||
{
|
||||
/* Do the call */
|
||||
CPUID(Reg, 0x80000000);
|
||||
CPUID(0x80000000, &Reg[0], &Dummy, &Dummy, &Dummy);
|
||||
if ((Reg[0] & 0xffffff00) == 0x80000000)
|
||||
{
|
||||
/* Check if CPUID 0x80000001 is supported */
|
||||
if (Reg[0] >= 0x80000001)
|
||||
{
|
||||
/* Check which extended features are available. */
|
||||
CPUID(Reg, 0x80000001);
|
||||
CPUID(0x80000001, &Dummy, &Dummy, &Dummy, &Reg[3]);
|
||||
|
||||
/* Check if NX-bit is supported */
|
||||
if (Reg[3] & 0x00100000) FeatureBits |= KF_NX_BIT;
|
||||
|
@ -450,7 +467,7 @@ KiGetCacheInformation(VOID)
|
|||
{
|
||||
PKIPCR Pcr = (PKIPCR)KeGetPcr();
|
||||
ULONG Vendor;
|
||||
ULONG Data[4];
|
||||
ULONG Data[4], Dummy;
|
||||
ULONG CacheRequests = 0, i;
|
||||
ULONG CurrentRegister;
|
||||
UCHAR RegisterByte;
|
||||
|
@ -470,14 +487,14 @@ KiGetCacheInformation(VOID)
|
|||
case CPU_INTEL:
|
||||
|
||||
/*Check if we support CPUID 2 */
|
||||
CPUID(Data, 0);
|
||||
CPUID(0, &Data[0], &Dummy, &Dummy, &Dummy);
|
||||
if (Data[0] >= 2)
|
||||
{
|
||||
/* We need to loop for the number of times CPUID will tell us to */
|
||||
do
|
||||
{
|
||||
/* Do the CPUID call */
|
||||
CPUID(Data, 2);
|
||||
CPUID(2, &Data[0], &Data[1], &Data[2], &Data[3]);
|
||||
|
||||
/* Check if it was the first call */
|
||||
if (FirstPass)
|
||||
|
@ -539,16 +556,24 @@ KiGetCacheInformation(VOID)
|
|||
case CPU_AMD:
|
||||
|
||||
/* Check if we support CPUID 0x80000006 */
|
||||
CPUID(Data, 0x80000000);
|
||||
CPUID(0x80000000, &Data[0], &Dummy, &Dummy, &Dummy);
|
||||
if (Data[0] >= 6)
|
||||
{
|
||||
/* Get 2nd level cache and tlb size */
|
||||
CPUID(Data, 0x80000006);
|
||||
CPUID(0x80000006, &Dummy, &Dummy, &Data[2], &Dummy);
|
||||
|
||||
/* Set the L2 Cache Size */
|
||||
Pcr->SecondLevelCacheSize = (Data[2] & 0xFFFF0000) >> 6;
|
||||
}
|
||||
break;
|
||||
|
||||
case CPU_CYRIX:
|
||||
case CPU_TRANSMETA:
|
||||
case CPU_CENTAUR:
|
||||
case CPU_RISE:
|
||||
|
||||
/* FIXME */
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -760,8 +785,8 @@ KiSaveProcessorControlState(OUT PKPROCESSOR_STATE ProcessorState)
|
|||
/* Save GDT, IDT, LDT and TSS */
|
||||
Ke386GetGlobalDescriptorTable(&ProcessorState->SpecialRegisters.Gdtr.Limit);
|
||||
__sidt(&ProcessorState->SpecialRegisters.Idtr.Limit);
|
||||
Ke386GetTr(&ProcessorState->SpecialRegisters.Tr);
|
||||
Ke386GetLocalDescriptorTable(&ProcessorState->SpecialRegisters.Ldtr);
|
||||
ProcessorState->SpecialRegisters.Tr = Ke386GetTr();
|
||||
ProcessorState->SpecialRegisters.Ldtr = Ke386GetLocalDescriptorTable();
|
||||
}
|
||||
|
||||
VOID
|
||||
|
|
|
@ -32,7 +32,7 @@ KiInitMachineDependent(VOID)
|
|||
ULONG i, Affinity, Sample = 0;
|
||||
PFX_SAVE_AREA FxSaveArea;
|
||||
ULONG MXCsrMask = 0xFFBF;
|
||||
ULONG Dummy[4];
|
||||
ULONG Dummy;
|
||||
KI_SAMPLE_MAP Samples[4];
|
||||
PKI_SAMPLE_MAP CurrentSample = Samples;
|
||||
|
||||
|
@ -179,7 +179,7 @@ KiInitMachineDependent(VOID)
|
|||
for (;;)
|
||||
{
|
||||
/* Do a dummy CPUID to start the sample */
|
||||
CPUID(Dummy, 0);
|
||||
CPUID(0, &Dummy, &Dummy, &Dummy, &Dummy);
|
||||
|
||||
/* Fill out the starting data */
|
||||
CurrentSample->PerfStart = KeQueryPerformanceCounter(NULL);
|
||||
|
@ -192,7 +192,7 @@ KiInitMachineDependent(VOID)
|
|||
&CurrentSample->PerfFreq);
|
||||
|
||||
/* Do another dummy CPUID */
|
||||
CPUID(Dummy, 0);
|
||||
CPUID(0, &Dummy, &Dummy, &Dummy, &Dummy);
|
||||
|
||||
/* Fill out the ending data */
|
||||
CurrentSample->PerfEnd =
|
||||
|
@ -620,7 +620,7 @@ KiGetMachineBootPointers(IN PKGDTENTRY *Gdt,
|
|||
*Idt = (PKIDTENTRY)IdtDescriptor.Base;
|
||||
|
||||
/* Get TSS and FS Selectors */
|
||||
Ke386GetTr(&Tr);
|
||||
Tr = Ke386GetTr();
|
||||
if (Tr != KGDT_TSS) Tr = KGDT_TSS; // FIXME: HACKHACK
|
||||
Fs = Ke386GetFs();
|
||||
|
||||
|
|
|
@ -46,11 +46,11 @@ typedef struct _KKINIT_FRAME
|
|||
|
||||
VOID
|
||||
NTAPI
|
||||
Ke386InitThreadWithContext(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
KiInitializeContextThread(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
{
|
||||
PFX_SAVE_AREA FxSaveArea;
|
||||
PFXSAVE_FORMAT FxSaveFormat;
|
||||
|
|
|
@ -10,7 +10,6 @@
|
|||
|
||||
#include <asm.h>
|
||||
#include <internal/i386/asmmacro.S>
|
||||
#undef LOCK
|
||||
.intel_syntax noprefix
|
||||
|
||||
/* FIXME: Can we make a nice macro to generate V86 Opcode handlers? */
|
||||
|
@ -140,6 +139,8 @@ _Opcode0FV86:
|
|||
UNHANDLED_V86_OPCODE
|
||||
.endfunc
|
||||
|
||||
#undef LOCK
|
||||
|
||||
GENERATE_PREFIX_HANDLER ES
|
||||
GENERATE_PREFIX_HANDLER CS
|
||||
GENERATE_PREFIX_HANDLER DS
|
||||
|
@ -152,6 +153,12 @@ GENERATE_PREFIX_HANDLER LOCK
|
|||
GENERATE_PREFIX_HANDLER REP
|
||||
GENERATE_PREFIX_HANDLER REPNE
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#define LOCK lock
|
||||
#else
|
||||
#define LOCK
|
||||
#endif
|
||||
|
||||
.func OpcodeINSBV86
|
||||
_OpcodeINSBV86:
|
||||
UNHANDLED_V86_OPCODE
|
||||
|
|
|
@ -50,11 +50,11 @@ typedef struct _KKINIT_FRAME
|
|||
|
||||
VOID
|
||||
NTAPI
|
||||
KePPCInitThreadWithContext(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
KiInitializeContextThread(IN PKTHREAD Thread,
|
||||
IN PKSYSTEM_ROUTINE SystemRoutine,
|
||||
IN PKSTART_ROUTINE StartRoutine,
|
||||
IN PVOID StartContext,
|
||||
IN PCONTEXT ContextPointer)
|
||||
{
|
||||
PFX_SAVE_AREA FxSaveArea;
|
||||
PKSTART_FRAME StartFrame;
|
||||
|
|
|
@ -818,11 +818,11 @@ KeInitThread(IN OUT PKTHREAD Thread,
|
|||
_SEH2_TRY
|
||||
{
|
||||
/* Initalize the Thread Context */
|
||||
KeArchInitThreadWithContext(Thread,
|
||||
SystemRoutine,
|
||||
StartRoutine,
|
||||
StartContext,
|
||||
Context);
|
||||
KiInitializeContextThread(Thread,
|
||||
SystemRoutine,
|
||||
StartRoutine,
|
||||
StartContext,
|
||||
Context);
|
||||
}
|
||||
_SEH2_EXCEPT(EXCEPTION_EXECUTE_HANDLER)
|
||||
{
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue