Implement HalStopProfileInterrupt and add required RTC register and flag definitions.

svn path=/trunk/; revision=48866
This commit is contained in:
Eric Kohl 2010-09-25 07:22:40 +00:00
parent d59da19b08
commit 8d574b3e5a
3 changed files with 38 additions and 7 deletions

View file

@ -19,8 +19,8 @@ UCHAR HalpCmosCenturyOffset;
/* PRIVATE FUNCTIONS *********************************************************/ /* PRIVATE FUNCTIONS *********************************************************/
FORCEINLINE
UCHAR UCHAR
NTAPI
HalpReadCmos(IN UCHAR Reg) HalpReadCmos(IN UCHAR Reg)
{ {
/* Select the register */ /* Select the register */
@ -30,8 +30,8 @@ HalpReadCmos(IN UCHAR Reg)
return READ_PORT_UCHAR(CMOS_DATA_PORT); return READ_PORT_UCHAR(CMOS_DATA_PORT);
} }
FORCEINLINE
VOID VOID
NTAPI
HalpWriteCmos(IN UCHAR Reg, HalpWriteCmos(IN UCHAR Reg,
IN UCHAR Value) IN UCHAR Value)
{ {

View file

@ -4,6 +4,7 @@
* FILE: hal/halx86/generic/profil.c * FILE: hal/halx86/generic/profil.c
* PURPOSE: System Profiling * PURPOSE: System Profiling
* PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org) * PROGRAMMERS: Alex Ionescu (alex.ionescu@reactos.org)
* Eric Kohl
*/ */
/* INCLUDES ******************************************************************/ /* INCLUDES ******************************************************************/
@ -15,14 +16,28 @@
/* FUNCTIONS *****************************************************************/ /* FUNCTIONS *****************************************************************/
/* /*
* @unimplemented * @implemented
*/ */
VOID VOID
NTAPI NTAPI
HalStopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource) HalStopProfileInterrupt(IN KPROFILE_SOURCE ProfileSource)
{ {
UNIMPLEMENTED; UCHAR StatusB;
return;
/* Acquire the CMOS lock */
HalpAcquireSystemHardwareSpinLock();
/* Read Status Register B */
StatusB = HalpReadCmos(RTC_REGISTER_B);
/* Disable periodic interrupts */
StatusB = StatusB & ~RTC_REG_B_PI;
/* Write new value into Status Register B */
HalpWriteCmos(RTC_REGISTER_B, StatusB);
/* Release the CMOS lock */
HalpReleaseCmosSpinLock();
} }
/* /*

View file

@ -48,8 +48,11 @@ ATTRIB_NORETURN
#define CMOS_CONTROL_PORT (PUCHAR)0x70 #define CMOS_CONTROL_PORT (PUCHAR)0x70
#define CMOS_DATA_PORT (PUCHAR)0x71 #define CMOS_DATA_PORT (PUCHAR)0x71
#define RTC_REGISTER_A 0x0A #define RTC_REGISTER_A 0x0A
#define RTC_REG_A_UIP 0x80
#define RTC_REGISTER_B 0x0B #define RTC_REGISTER_B 0x0B
#define RTC_REG_A_UIP 0x80 #define RTC_REG_B_PI 0x40
#define RTC_REGISTER_C 0x0C
#define RTC_REGISTER_D 0x0D
#define RTC_REGISTER_CENTURY 0x32 #define RTC_REGISTER_CENTURY 0x32
/* Usage flags */ /* Usage flags */
@ -683,7 +686,7 @@ HaliHaltSystem(
); );
// //
// CMOS initialization // CMOS Routines
// //
VOID VOID
NTAPI NTAPI
@ -691,6 +694,19 @@ HalpInitializeCmos(
VOID VOID
); );
UCHAR
NTAPI
HalpReadCmos(
IN UCHAR Reg
);
VOID
NTAPI
HalpWriteCmos(
IN UCHAR Reg,
IN UCHAR Value
);
// //
// Spinlock for protecting CMOS access // Spinlock for protecting CMOS access
// //