From 88e24bc4636262e6e0d9ab0c15412293d7d1f7b2 Mon Sep 17 00:00:00 2001
From: Timo Kreuzer <timo.kreuzer@reactos.org>
Date: Sun, 24 Mar 2024 18:58:44 +0200
Subject: [PATCH] [NTOS:KE/x64][SDK] Add some trap handling support asm macros

---
 ntoskrnl/ke/amd64/trap.S      |  7 +---
 sdk/include/asm/trapamd64.inc | 75 ++++++++++++++++++++---------------
 2 files changed, 43 insertions(+), 39 deletions(-)

diff --git a/ntoskrnl/ke/amd64/trap.S b/ntoskrnl/ke/amd64/trap.S
index 388afe9c2e2..88679949b17 100644
--- a/ntoskrnl/ke/amd64/trap.S
+++ b/ntoskrnl/ke/amd64/trap.S
@@ -848,12 +848,7 @@ GLOBAL_LABEL KiSystemCall64Again
 
 GLOBAL_LABEL KiSystemServiceExit
 
-#if DBG
-    test dword ptr [rsp + MAX_SYSCALL_PARAM_SIZE + KTRAP_FRAME_EFlags], HEX(200)
-    jnz IntsEnabled
-    int 3
-IntsEnabled:
-#endif
+    ASSERT_TRAP_FRAME_INTS_ENABLED rsp + MAX_SYSCALL_PARAM_SIZE
 
     /* Check for pending user APC */
     mov rcx, gs:qword ptr [PcCurrentThread]
diff --git a/sdk/include/asm/trapamd64.inc b/sdk/include/asm/trapamd64.inc
index 49fce4bb376..5303adf2dbb 100644
--- a/sdk/include/asm/trapamd64.inc
+++ b/sdk/include/asm/trapamd64.inc
@@ -1,3 +1,41 @@
+/*
+ * PROJECT:     ReactOS SDK
+ * LICENSE:     MIT (https://spdx.org/licenses/MIT)
+ * PURPOSE:     ASM macros for x64 trap handling
+ * COPYRIGHT:   Copyright 2011-2024 Timo Kreuzer (timo.kreuzer@reactos.org)
+ */
+
+MACRO(ASSERT_TRAP_FRAME_INTS_ENABLED, Register)
+#if DBG
+    LOCAL IntsAreEnabled
+    test dword ptr [Register + KTRAP_FRAME_EFlags], HEX(200)
+    jnz IntsAreEnabled
+    int HEX(2C)
+IntsAreEnabled:
+#endif
+ENDM
+
+MACRO(ASSERT_TRAP_FRAME_IRQL_VALID, Register)
+#if DBG
+    LOCAL IrqlIsValid
+    mov rax, cr8
+    cmp byte ptr [Register + KTRAP_FRAME_PreviousIrql], al
+    je IrqlIsValid
+    int HEX(2C)
+IrqlIsValid:
+#endif
+ENDM
+
+MACRO(ASSERT_IRQL_PASSIVE)
+#if DBG
+    LOCAL IrqlIsPassive
+    mov rax, cr8
+    test rax, rax
+    jz IrqlIsPassive
+    int HEX(2C)
+IrqlIsPassive:
+#endif
+ENDM
 
 APIC_EOI = HEX(0FFFFFFFFFFFE00B0)
 
@@ -122,13 +160,7 @@ MACRO(EnterTrap, Flags)
     /* Load kernel MXCSR */
     ldmxcsr gs:[PcMxCsr]
 
-#if DBG
-    /* Check IRQL */
-    mov rax, cr8
-    test rax, rax
-    jz kernel_mode_entry
-    int HEX(2c)
-#endif
+    ASSERT_IRQL_PASSIVE
 
 kernel_mode_entry:
 
@@ -163,19 +195,9 @@ ENDM
  */
 MACRO(ExitTrap, Flags)
     LOCAL kernel_mode_return
-    LOCAL IntsEnabled
     LOCAL NoUserApc
-    LOCAL IrqlPassive
-    LOCAL irql_ok
 
-#if DBG
-        /* Check previous irql */
-        mov rax, cr8
-        cmp [rbp + KTRAP_FRAME_PreviousIrql], al
-        je irql_ok
-        int HEX(2c)
-    irql_ok:
-#endif
+    ASSERT_TRAP_FRAME_IRQL_VALID rbp
 
     if (Flags AND TF_SEGMENTS)
         /* Restore segment selectors */
@@ -203,21 +225,8 @@ MACRO(ExitTrap, Flags)
     NoUserApc:
     endif
 
-#if DBG
-    /*Make sure interrupts are enabled */
-    test dword ptr [rbp + KTRAP_FRAME_EFlags], HEX(200)
-    jnz IntsEnabled
-    int HEX(2c)
-IntsEnabled:
-
-    /* Make sure we are at passive level */
-    mov rax, cr8
-    test rax, rax
-    jz IrqlPassive
-    int HEX(2C)
-
-IrqlPassive:
-#endif
+    ASSERT_TRAP_FRAME_INTS_ENABLED rbp
+    ASSERT_IRQL_PASSIVE
 
     cli