[UNIATA] Properly mark ReactOS diff from upstream

Addendum to 4b9cf2e (r71252), d14a872 (r73324), 7d65f2a (r71262), and 6c0ff7b.

CORE-11157 CORE-16078
This commit is contained in:
Stanislav Motylkov 2020-12-31 22:14:39 +03:00
parent c9f1501373
commit 88d36c93a2
No known key found for this signature in database
GPG key ID: AFE513258CBA9E92
2 changed files with 11 additions and 2 deletions

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@ -352,7 +352,11 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
PCI_DEV_HW_SPEC_BM( 9d05, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER), PCI_DEV_HW_SPEC_BM( 9d05, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
PCI_DEV_HW_SPEC_BM( 9d07, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER), PCI_DEV_HW_SPEC_BM( 9d07, 8086, 0x00, ATA_SA300, "Intel Sunrise Point-LP" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
/* PCI_DEV_HW_SPEC_BM( a102, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI ),*/ /* workaround regression CORE-16078 */ #ifndef __REACTOS__
PCI_DEV_HW_SPEC_BM( a102, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI ),
#else
/* workaround regression CORE-16078 */
#endif
PCI_DEV_HW_SPEC_BM( a103, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI ), PCI_DEV_HW_SPEC_BM( a103, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI ),
PCI_DEV_HW_SPEC_BM( a105, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER), PCI_DEV_HW_SPEC_BM( a105, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
PCI_DEV_HW_SPEC_BM( a106, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER), PCI_DEV_HW_SPEC_BM( a106, 8086, 0x00, ATA_SA300, "Intel Sunrise Point" , UNIATA_SATA | UNIATA_AHCI | UNIATA_RAID_CONTROLLER),
@ -714,4 +718,8 @@ BUSMASTER_CONTROLLER_INFORMATION_BASE const BusMasterAdapters[] = {
PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, BMLIST_TERMINATOR, NULL , BMLIST_TERMINATOR ) PCI_DEV_HW_SPEC_BM( ffff, ffff, 0xff, BMLIST_TERMINATOR, NULL , BMLIST_TERMINATOR )
}; };
/* static */ const ULONG _NUM_BUSMASTER_ADAPTERS = (sizeof(BusMasterAdapters) / sizeof(BUSMASTER_CONTROLLER_INFORMATION_BASE)); #ifndef __REACTOS__
static const ULONG _NUM_BUSMASTER_ADAPTERS = (sizeof(BusMasterAdapters) / sizeof(BUSMASTER_CONTROLLER_INFORMATION_BASE));
#else
const ULONG _NUM_BUSMASTER_ADAPTERS = (sizeof(BusMasterAdapters) / sizeof(BUSMASTER_CONTROLLER_INFORMATION_BASE));
#endif

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@ -6184,6 +6184,7 @@ CompleteRequest:
#ifdef __REACTOS__ #ifdef __REACTOS__
(void)senseData; (void)senseData;
#endif #endif
KdPrint3((PRINT_PREFIX "AtapiInterrupt: ATAPI command status %#x\n", status)); KdPrint3((PRINT_PREFIX "AtapiInterrupt: ATAPI command status %#x\n", status));
if (status == SRB_STATUS_DATA_OVERRUN) { if (status == SRB_STATUS_DATA_OVERRUN) {
// Check to see if we at least get mininum number of bytes // Check to see if we at least get mininum number of bytes