From 889287242f08c856a3df46302b6a9d77dd8d985b Mon Sep 17 00:00:00 2001 From: Sir Richard Date: Wed, 24 Nov 2010 18:19:42 +0000 Subject: [PATCH] [NTOS]: Fix 16-bit interlocked operations on ARM (GCC doesn't provide built-ins). ARM should build now. svn path=/trunk/; revision=49782 --- reactos/include/crt/mingw32/intrin_arm.h | 34 +++++++++++++++++++++--- 1 file changed, 31 insertions(+), 3 deletions(-) diff --git a/reactos/include/crt/mingw32/intrin_arm.h b/reactos/include/crt/mingw32/intrin_arm.h index 12ced3ebb4b..f5a07b381fb 100644 --- a/reactos/include/crt/mingw32/intrin_arm.h +++ b/reactos/include/crt/mingw32/intrin_arm.h @@ -67,12 +67,40 @@ __INTRIN_INLINE char _InterlockedCompareExchange8(volatile char * const Destinat __INTRIN_INLINE short _InterlockedCompareExchange16(volatile short * const Destination, const short Exchange, const short Comperand) { - return __sync_val_compare_and_swap(Destination, Comperand, Exchange); + short a, b; + + __asm__ __volatile__ ( "0:\n\t" + "ldr %1, [%2]\n\t" + "cmp %1, %4\n\t" + "bne 1f\n\t" + "swp %0, %3, [%2]\n\t" + "cmp %0, %1\n\t" + "swpne %3, %0, [%2]\n\t" + "bne 0b\n\t" + "1:" + : "=&r" (a), "=&r" (b) + : "r" (Destination), "r" (Exchange), "r" (Comperand) + : "cc", "memory"); + + return a; } -__INTRIN_INLINE long _InterlockedExchangeAdd16(volatile short * const Addend, const short Value) +__INTRIN_INLINE short _InterlockedExchangeAdd16(volatile short * const Addend, const short Value) { - return __sync_fetch_and_add(Addend, Value); + short a, b, c; + + __asm__ __volatile__ ( "0:\n\t" + "ldr %0, [%3]\n\t" + "add %1, %0, %4\n\t" + "swp %2, %1, [%3]\n\t" + "cmp %0, %2\n\t" + "swpne %1, %2, [%3]\n\t" + "bne 0b" + : "=&r" (a), "=&r" (b), "=&r" (c) + : "r" (Value), "r" (Addend) + : "cc", "memory"); + + return a; } __INTRIN_INLINE long _InterlockedCompareExchange(volatile long * const dest, const long exch, const long comp)