[NTOSKRNL]

- Add amd64 versions of MI_MAKE_PROTOTYPE_PTE and MiProtoPteToPte
- Remove outdated external declarations
- disable deprecated amd64 code
- use MiFillSystemPageDirectory only for 2 paging levels
- Fixes amd64 build

svn path=/trunk/; revision=49012

reactos/ntoskrnl/include/internal/amd64/mm.h

@@ -152,6 +152,27 @@ MiIsPdeForAddressValid(PVOID Address)
 #define VAtoPDI(va) ((((ULONG64)va) >> PDI_SHIFT) & 0x1FF)
 #define VAtoPTI(va) ((((ULONG64)va) >> PTI_SHIFT) & 0x1FF)
 
+FORCEINLINE
+VOID
+MI_MAKE_PROTOTYPE_PTE(IN PMMPTE NewPte,
+                      IN PMMPTE PointerPte)
+{
+    ULONG_PTR Offset;
+
+    /* Store the Address */
+    NewPte->u.Long = (ULONG64)PointerPte;
+
+    /* Mark this as a prototype PTE */
+    NewPte->u.Proto.Prototype = 1;
+    NewPte->u.Proto.Valid  = 1;
+    NewPte->u.Proto.ReadOnly = 0;
+    NewPte->u.Proto.Protection = 0;
+}
+
+/* Sign extend 48 bits */
+#define MiProtoPteToPte(x)                  \
+    (PMMPTE)((LONG64)(x)->u.Proto.ProtoAddress)
+
 /* We don't use these hacks */
 VOID
 FORCEINLINE

reactos/ntoskrnl/include/internal/mm.h

@@ -8,7 +8,6 @@ struct _EPROCESS;
 
 extern PFN_NUMBER MiFreeSwapPages;
 extern PFN_NUMBER MiUsedSwapPages;
-extern SIZE_T MmPagedPoolSize;
 extern SIZE_T MmTotalPagedPoolQuota;
 extern SIZE_T MmTotalNonPagedPoolQuota;
 extern PHYSICAL_ADDRESS MmSharedDataPagePhysicalAddress;
@@ -19,9 +18,6 @@ extern PFN_NUMBER MmHighestPhysicalPage;
 extern PFN_NUMBER MmAvailablePages;
 extern PFN_NUMBER MmResidentAvailablePages;
 
-extern PVOID MmPagedPoolBase;
-extern SIZE_T MmPagedPoolSize;
-
 extern PMEMORY_ALLOCATION_DESCRIPTOR MiFreeDescriptor;
 extern MEMORY_ALLOCATION_DESCRIPTOR MiFreeDescriptorOrg;
 

reactos/ntoskrnl/mm/ARM3/miarm.h

@@ -236,12 +236,14 @@ extern const ULONG MmProtectToPteMask[32];
 #define MI_GET_NEXT_COLOR(x)                (MI_GET_PAGE_COLOR(++MmSystemPageColor))
 #define MI_GET_NEXT_PROCESS_COLOR(x)        (MI_GET_PAGE_COLOR(++(x)->NextPageColor))
 
+#ifdef _M_IX86
 //
 // Decodes a Prototype PTE into the underlying PTE
 //
 #define MiProtoPteToPte(x)                  \
     (PMMPTE)((ULONG_PTR)MmPagedPoolStart +  \
              ((x)->u.Proto.ProtoAddressHigh | (x)->u.Proto.ProtoAddressLow))
+#endif
 
 //
 // Prototype PTEs that don't yet have a pagefile association
@@ -603,6 +605,7 @@ MI_MAKE_HARDWARE_PTE_USER(IN PMMPTE NewPte,
     NewPte->u.Long |= MmProtectToPteMask[ProtectionMask];
 }
 
+#ifdef _M_IX86
 //
 // Builds a Prototype PTE for the address of the PTE
 //
@@ -627,6 +630,7 @@ MI_MAKE_PROTOTYPE_PTE(IN PMMPTE NewPte,
     NewPte->u.Proto.ProtoAddressLow = Offset & 0x7F;
     NewPte->u.Proto.ProtoAddressHigh = Offset & 0xFFFFF80;
 }
+#endif
 
 //
 // Returns if the page is physically resident (ie: a large page)

reactos/ntoskrnl/mm/ARM3/section.c

@@ -309,6 +309,7 @@ MiAddMappedPtes(IN PMMPTE FirstPte,
     return STATUS_SUCCESS;
 }
 
+#if (_MI_PAGING_LEVELS == 2)
 VOID
 NTAPI
 MiFillSystemPageDirectory(IN PVOID Base,
@@ -364,6 +365,7 @@ MiFillSystemPageDirectory(IN PVOID Base,
         PointerPde++;
     }
 }
+#endif
 
 NTSTATUS
 NTAPI
@@ -449,8 +451,10 @@ MiMapViewInSystemSpace(IN PVOID Section,
     Base = MiInsertInSystemSpace(Session, Buckets, ControlArea);
     ASSERT(Base);
 
+#if (_MI_PAGING_LEVELS == 2)
     /* Create the PDEs needed for this mapping, and double-map them if needed */
     MiFillSystemPageDirectory(Base, Buckets * MI_SYSTEM_VIEW_BUCKET_SIZE);
+#endif
 
     /* Create the actual prototype PTEs for this mapping */
     Status = MiAddMappedPtes(MiAddressToPte(Base),

reactos/ntoskrnl/mm/amd64/init.c

@@ -857,9 +857,9 @@ MmArmInitSystem_x(IN ULONG Phase,
         //MiBuildPagedPool();
 
         // This is the old stuff:
-        MmPagedPoolBase = (PVOID)((PCHAR)MmPagedPoolEnd + 1);
-        MmPagedPoolSize = MM_PAGED_POOL_SIZE;
-        ASSERT((PCHAR)MmPagedPoolBase + MmPagedPoolSize < (PCHAR)MmNonPagedSystemStart);
+        //MmPagedPoolBase = (PVOID)((PCHAR)MmPagedPoolEnd + 1);
+        //MmPagedPoolSize = MM_PAGED_POOL_SIZE;
+        //ASSERT((PCHAR)MmPagedPoolBase + MmPagedPoolSize < (PCHAR)MmNonPagedSystemStart);
 
         
         HalInitializeBios(0, LoaderBlock);