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https://github.com/reactos/reactos.git
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improved IoMapTransfer (hopefylly)
svn path=/trunk/; revision=6476
This commit is contained in:
Gunnar Dalsnes
parent
b872ea2cad
commit
888ca1574d
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@ -1,4 +1,4 @@
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/* $Id: adapter.c,v 1.7 2003/10/23 09:03:51 vizzini Exp $
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/* $Id: adapter.c,v 1.8 2003/10/31 01:08:00 gdalsnes Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -24,10 +24,11 @@
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NTSTATUS STDCALL
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HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
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PWAIT_CONTEXT_BLOCK WaitContextBlock,
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ULONG NumberOfMapRegisters,
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PDRIVER_CONTROL ExecutionRoutine)
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HalAllocateAdapterChannel(
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PADAPTER_OBJECT AdapterObject,
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PWAIT_CONTEXT_BLOCK WaitContextBlock,
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ULONG NumberOfMapRegisters,
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PDRIVER_CONTROL ExecutionRoutine)
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/*
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* FUNCTION: Sets up an ADAPTER_OBJECT with map registers
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* ARGUMENTS:
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@ -50,6 +51,13 @@ HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
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{
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LARGE_INTEGER MaxAddress;
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IO_ALLOCATION_ACTION Retval;
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assert(KeGetCurrentIrql() == DISPATCH_LEVEL);
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/*
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FIXME: return STATUS_INSUFFICIENT_RESOURCES if the NumberOfMapRegisters
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requested is larger than the value returned by IoGetDmaAdapter.
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*/
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/* set up the wait context block in case we can't run right away */
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WaitContextBlock->DeviceRoutine = ExecutionRoutine;
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@ -112,12 +120,13 @@ HalAllocateAdapterChannel(PADAPTER_OBJECT AdapterObject,
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BOOLEAN STDCALL
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IoFlushAdapterBuffers (PADAPTER_OBJECT AdapterObject,
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PMDL Mdl,
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PVOID MapRegisterBase,
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PVOID CurrentVa,
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ULONG Length,
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BOOLEAN WriteToDevice)
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IoFlushAdapterBuffers (
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PADAPTER_OBJECT AdapterObject,
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PMDL Mdl,
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PVOID MapRegisterBase,
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PVOID CurrentVa,
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ULONG Length,
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BOOLEAN WriteToDevice)
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/*
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* FUNCTION: flush any data remaining in the dma controller's memory into the host memory
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* ARGUMENTS:
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@ -135,8 +144,7 @@ IoFlushAdapterBuffers (PADAPTER_OBJECT AdapterObject,
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* - This is only meaningful on a read operation. Return immediately for a write.
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*/
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{
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/* FIXME we don't have ASSERT */
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//ASSERT(KeGetCurrentIrql() <= DISPATCH_LEVEL);
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assert(KeGetCurrentIrql() <= DISPATCH_LEVEL);
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/* this can happen if the card supports scatter/gather */
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if(!MapRegisterBase)
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@ -144,11 +152,24 @@ IoFlushAdapterBuffers (PADAPTER_OBJECT AdapterObject,
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if(WriteToDevice)
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return TRUE;
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memcpy(
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(PVOID)((DWORD)MmGetSystemAddressForMdl( Mdl ) + (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl )),
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MapRegisterBase, Length );
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/*
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FIXME: mask off (disable) channel if doing System DMA?
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From linux:
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if (dmanr<=3)
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dma_outb(dmanr | 4, DMA1_MASK_REG 0x0A) ;
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else
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dma_outb((dmanr & 3) | 4, DMA2_MASK_REG 0x0A);
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*/
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return TRUE;
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}
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@ -212,9 +233,10 @@ IoFreeAdapterChannel (PADAPTER_OBJECT AdapterObject)
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VOID STDCALL
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IoFreeMapRegisters (PADAPTER_OBJECT AdapterObject,
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PVOID MapRegisterBase,
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ULONG NumberOfMapRegisters)
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IoFreeMapRegisters (
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IN PADAPTER_OBJECT AdapterObject,
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IN PVOID MapRegisterBase,
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IN ULONG NumberOfMapRegisters)
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/*
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* FUNCTION: free map registers reserved by the system for a DMA
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* ARGUMENTS:
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@ -237,20 +259,22 @@ IoFreeMapRegisters (PADAPTER_OBJECT AdapterObject,
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PHYSICAL_ADDRESS STDCALL
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IoMapTransfer (PADAPTER_OBJECT AdapterObject,
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PMDL Mdl,
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PVOID MapRegisterBase,
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PVOID CurrentVa,
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PULONG Length,
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BOOLEAN WriteToDevice)
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IoMapTransfer (
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IN PADAPTER_OBJECT AdapterObject,
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IN PMDL Mdl,
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IN PVOID MapRegisterBase,
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IN PVOID CurrentVa,
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IN OUT PULONG Length,
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IN BOOLEAN WriteToDevice)
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/*
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* FUNCTION: map a dma for transfer and do the dma if it's a slave
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* ARGUMENTS:
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* AdapterObject: adapter object to do the dma on
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* AdapterObject: adapter object to do the dma on. busmaster may pass NULL.
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* Mdl: locked-down user buffer to DMA in to or out of
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* MapRegisterBase: handle to map registers to use for this dma
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* MapRegisterBase: handle to map registers to use for this dma. allways NULL
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* when doing s/g.
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* CurrentVa: index into Mdl to transfer into/out of
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* Length: length of transfer in/out
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* Length: length of transfer in/out. Only modified on out when doing s/g.
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* WriteToDevice: TRUE if it's an output dma, FALSE otherwise
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* RETURNS:
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* If a busmaster: A logical address that can be used to program a dma controller
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@ -263,30 +287,136 @@ IoMapTransfer (PADAPTER_OBJECT AdapterObject,
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*/
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{
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PHYSICAL_ADDRESS Address;
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// program up the dma controller, and return
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// if it is a write to the device, copy the caller buffer to the low buffer
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if( WriteToDevice )
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memcpy( MapRegisterBase,
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MmGetSystemAddressForMdl( Mdl ) + ( (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl ) ),
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*Length );
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Address = MmGetPhysicalAddress( MapRegisterBase );
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// port 0xA is the dma mask register, or a 0x10 on to the channel number to mask it
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WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel | 0x10 );
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// write zero to the reset register
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WRITE_PORT_UCHAR( (PVOID)0x0C, 0 );
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// mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for non auto initialize
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WRITE_PORT_UCHAR( (PVOID)0x0B, AdapterObject->Channel | ( WriteToDevice ? 0x8 : 0x4 ) );
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// set the 64k page register for the channel
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WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(((ULONG)Address.QuadPart)>>16) );
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// low, then high address byte, which is always 0 for us, because we have a 64k alligned address
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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// count is 1 less than length, low then high
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(*Length - 1) );
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length - 1)>>8) );
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// unmask the channel to let it rip
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WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel );
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Address.QuadPart = (DWORD)MapRegisterBase;
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/* Isa System (slave) DMA? */
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if (AdapterObject && AdapterObject->InterfaceType == Isa && !AdapterObject->Master)
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{
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#if 0
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/* channel 0 is reserved for DRAM refresh */
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assert(AdapterObject->Channel != 0);
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/* channel 4 is reserved for cascade */
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assert(AdapterObject->Channel != 4);
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#endif
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/*
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FIXME: Handle case when doing common-buffer System DMA. In this case, the buffer described
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by MDL is allready phys. contiguous and below 16 mega. Driver makes a one-shot call to
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IoMapTransfer during init. to program controller with the common-buffer.
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*/
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/* if it is a write to the device, copy the caller buffer to the low buffer */
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if( WriteToDevice )
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{
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memcpy(MapRegisterBase,
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MmGetSystemAddressForMdl(Mdl) + ((ULONG)CurrentVa - (ULONG)MmGetMdlVirtualAddress(Mdl)),
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*Length );
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}
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// program up the dma controller, and return
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Address = MmGetPhysicalAddress( MapRegisterBase );
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// port 0xA is the dma mask register, or a 0x10 on to the channel number to mask it
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WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel | 0x10 );
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// write zero to the reset register
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WRITE_PORT_UCHAR( (PVOID)0x0C, 0 );
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// mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for non auto initialize
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WRITE_PORT_UCHAR( (PVOID)0x0B, AdapterObject->Channel | ( WriteToDevice ? 0x8 : 0x4 ) );
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// set the 64k page register for the channel
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WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(((ULONG)Address.QuadPart)>>16) );
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// low, then high address byte, which is always 0 for us, because we have a 64k alligned address
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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// count is 1 less than length, low then high
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(*Length - 1) );
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length - 1)>>8) );
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// unmask the channel to let it rip
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WRITE_PORT_UCHAR( (PVOID)0x0A, AdapterObject->Channel );
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/*
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NOTE: Return value should be ignored when doing System DMA.
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Maybe return some more obvious invalid address here (thou returning
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MapRegisterBase is also wrong;-)to catch invalid use?
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*/
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Address.QuadPart = (ULONG)MapRegisterBase;
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return Address;
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}
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/*
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Busmaster with s/g support?
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NOTE: old docs allowed busmasters to pass a NULL Adapter. In this case, MapRegisterBase
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being NULL is used to detect a s/g busmaster.
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*/
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if ((!AdapterObject && !MapRegisterBase) ||
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(AdapterObject && AdapterObject->Master && AdapterObject->ScatterGather))
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{
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/*
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Just return the passed VA's corresponding phys. address.
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Update length to the number of phys. contiguous bytes found.
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*/
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PULONG MdlPages;
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ULONG MdlPageIndex, PhysContiguousLen;
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ULONG PhysAddress;
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MdlPages = (PULONG)(Mdl + 1);
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/* Get VA's corresponding mdl phys. page index */
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MdlPageIndex = ((ULONG)CurrentVa - (ULONG)Mdl->StartVa) / PAGE_SIZE;
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/* Get phys. page containing the VA */
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PhysAddress = MdlPages[MdlPageIndex];
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PhysContiguousLen = PAGE_SIZE - BYTE_OFFSET(CurrentVa);
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/* VA to map may span several contiguous phys. pages (unlikely) */
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while (PhysContiguousLen < *Length &&
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MdlPages[MdlPageIndex++] + PAGE_SIZE == MdlPages[MdlPageIndex])
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{
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/*
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Note that allways adding PAGE_SIZE may make PhysContiguousLen greater
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than Length if buffer doesn't end on page boundary. Take this
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into consideration below.
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*/
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PhysContiguousLen += PAGE_SIZE;
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}
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if (PhysContiguousLen < *Length)
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{
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*Length = PhysContiguousLen;
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}
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//add offset to phys. page address
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Address.QuadPart = PhysAddress + BYTE_OFFSET(CurrentVa);
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return Address;
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}
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/*
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Busmaster without s/g support?
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NOTE: old docs allowed busmasters to pass a NULL Adapter. In this case, MapRegisterBase
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not being NULL is used to detect a non s/g busmaster.
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*/
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if ((!AdapterObject && MapRegisterBase) ||
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(AdapterObject && AdapterObject->Master && !AdapterObject->ScatterGather))
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{
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/*
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NOTE: Busmasters doing common-buffer DMA shouldn't call IoMapTransfer, but I don't
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know if it's illegal... Maybe figure out what to do in this case...
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*/
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if( WriteToDevice )
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{
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memcpy(MapRegisterBase,
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MmGetSystemAddressForMdl(Mdl) + ((ULONG)CurrentVa - (ULONG)MmGetMdlVirtualAddress(Mdl)),
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*Length );
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}
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return MmGetPhysicalAddress(MapRegisterBase);
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}
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DPRINT1("IoMapTransfer: Unsupported operation\n");
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KEBUGCHECK(0);
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return Address;
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}
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