From 8314c8eeba7ab45471109b3f680bd76d43c6239f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Tue, 14 Jan 2020 23:18:48 +0100 Subject: [PATCH] [NTOS] Move FORCEINLINE specifier where appropriate --- ntoskrnl/include/internal/amd64/intrin_i.h | 12 +++++----- ntoskrnl/include/internal/amd64/ke.h | 6 ++--- ntoskrnl/include/internal/amd64/mm.h | 26 +++++++++++----------- 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/ntoskrnl/include/internal/amd64/intrin_i.h b/ntoskrnl/include/internal/amd64/intrin_i.h index bbfaff7e251..97072c3fd94 100644 --- a/ntoskrnl/include/internal/amd64/intrin_i.h +++ b/ntoskrnl/include/internal/amd64/intrin_i.h @@ -1,22 +1,22 @@ #ifndef _INTRIN_INTERNAL_ #define _INTRIN_INTERNAL_ -VOID FORCEINLINE +VOID KeSetCurrentIrql(KIRQL Irql) { __writecr8(Irql); } -PKGDTENTRY64 FORCEINLINE +PKGDTENTRY64 KiGetGdtEntry(PVOID pGdt, USHORT Selector) { return (PKGDTENTRY64)((ULONG64)pGdt + (Selector & ~RPL_MASK)); } -PVOID FORCEINLINE +PVOID KiGetGdtDescriptorBase(PKGDTENTRY Entry) { return (PVOID)((ULONG64)Entry->BaseLow | @@ -25,8 +25,8 @@ KiGetGdtDescriptorBase(PKGDTENTRY Entry) (ULONG64)Entry->BaseUpper << 32); } -VOID FORCEINLINE +VOID KiSetGdtDescriptorBase(PKGDTENTRY Entry, ULONG64 Base) { Entry->BaseLow = Base & 0xffff; @@ -35,16 +35,16 @@ KiSetGdtDescriptorBase(PKGDTENTRY Entry, ULONG64 Base) Entry->BaseUpper = Base >> 32; } -VOID FORCEINLINE +VOID KiSetGdtDescriptorLimit(PKGDTENTRY Entry, ULONG Limit) { Entry->LimitLow = Limit & 0xffff; Entry->Bits.LimitHigh = Limit >> 16; } -VOID FORCEINLINE +VOID KiInitGdtEntry(PKGDTENTRY64 Entry, ULONG64 Base, ULONG Size, UCHAR Type, UCHAR Dpl) { KiSetGdtDescriptorBase(Entry, Base); diff --git a/ntoskrnl/include/internal/amd64/ke.h b/ntoskrnl/include/internal/amd64/ke.h index 977a8f85984..85001d22745 100644 --- a/ntoskrnl/include/internal/amd64/ke.h +++ b/ntoskrnl/include/internal/amd64/ke.h @@ -282,16 +282,16 @@ KeQueryInterruptHandler(IN ULONG Vector) (ULONG64)Idt->OffsetLow); } -VOID FORCEINLINE +VOID KiSendEOI(VOID) { /* Write 0 to the apic EOI register */ *((volatile ULONG*)APIC_EOI_REGISTER) = 0; } -VOID FORCEINLINE +VOID KiEndInterrupt(IN KIRQL Irql, IN PKTRAP_FRAME TrapFrame) { @@ -300,8 +300,8 @@ KiEndInterrupt(IN KIRQL Irql, //KeLowerIrql(Irql); } -BOOLEAN FORCEINLINE +BOOLEAN KiUserTrap(IN PKTRAP_FRAME TrapFrame) { /* Anything else but Ring 0 is Ring 3 */ diff --git a/ntoskrnl/include/internal/amd64/mm.h b/ntoskrnl/include/internal/amd64/mm.h index fbdd92eb3d8..d4f0287acc3 100644 --- a/ntoskrnl/include/internal/amd64/mm.h +++ b/ntoskrnl/include/internal/amd64/mm.h @@ -124,8 +124,8 @@ #define ValidKernelPpe ValidKernelPde /* Convert an address to a corresponding PTE */ -PMMPTE FORCEINLINE +PMMPTE _MiAddressToPte(PVOID Address) { ULONG64 Offset = (ULONG64)Address >> (PTI_SHIFT - 3); @@ -135,8 +135,8 @@ _MiAddressToPte(PVOID Address) #define MiAddressToPte(x) _MiAddressToPte((PVOID)(x)) /* Convert an address to a corresponding PDE */ -PMMPTE FORCEINLINE +PMMPTE _MiAddressToPde(PVOID Address) { ULONG64 Offset = (ULONG64)Address >> (PDI_SHIFT - 3); @@ -146,8 +146,8 @@ _MiAddressToPde(PVOID Address) #define MiAddressToPde(x) _MiAddressToPde((PVOID)(x)) /* Convert an address to a corresponding PPE */ -PMMPTE FORCEINLINE +PMMPTE MiAddressToPpe(PVOID Address) { ULONG64 Offset = (ULONG64)Address >> (PPI_SHIFT - 3); @@ -156,8 +156,8 @@ MiAddressToPpe(PVOID Address) } /* Convert an address to a corresponding PXE */ -PMMPTE FORCEINLINE +PMMPTE MiAddressToPxe(PVOID Address) { ULONG64 Offset = (ULONG64)Address >> (PXI_SHIFT - 3); @@ -166,8 +166,8 @@ MiAddressToPxe(PVOID Address) } /* Convert an address to a corresponding PTE offset/index */ -ULONG FORCEINLINE +ULONG MiAddressToPti(PVOID Address) { return ((((ULONG64)Address) >> PTI_SHIFT) & 0x1FF); @@ -175,8 +175,8 @@ MiAddressToPti(PVOID Address) #define MiAddressToPteOffset(x) MiAddressToPti(x) // FIXME: bad name /* Convert an address to a corresponding PDE offset/index */ -ULONG FORCEINLINE +ULONG MiAddressToPdi(PVOID Address) { return ((((ULONG64)Address) >> PDI_SHIFT) & 0x1FF); @@ -185,16 +185,16 @@ MiAddressToPdi(PVOID Address) #define MiGetPdeOffset(x) MiAddressToPdi(x) /* Convert an address to a corresponding PXE offset/index */ -ULONG FORCEINLINE +ULONG MiAddressToPxi(PVOID Address) { return ((((ULONG64)Address) >> PXI_SHIFT) & 0x1FF); } /* Convert a PTE into a corresponding address */ -PVOID FORCEINLINE +PVOID MiPteToAddress(PMMPTE PointerPte) { /* Use signed math */ @@ -202,8 +202,8 @@ MiPteToAddress(PMMPTE PointerPte) } /* Convert a PDE into a corresponding address */ -PVOID FORCEINLINE +PVOID MiPdeToAddress(PMMPTE PointerPde) { /* Use signed math */ @@ -211,8 +211,8 @@ MiPdeToAddress(PMMPTE PointerPde) } /* Convert a PPE into a corresponding address */ -PVOID FORCEINLINE +PVOID MiPpeToAddress(PMMPTE PointerPpe) { /* Use signed math */ @@ -220,8 +220,8 @@ MiPpeToAddress(PMMPTE PointerPpe) } /* Convert a PXE into a corresponding address */ -PVOID FORCEINLINE +PVOID MiPxeToAddress(PMMPTE PointerPxe) { /* Use signed math */ @@ -291,15 +291,15 @@ MI_IS_MAPPED_PTE(PMMPTE PointerPte) } INIT_FUNCTION -VOID FORCEINLINE +VOID MmInitGlobalKernelPageDirectory(VOID) { /* Nothing to do */ } -BOOLEAN FORCEINLINE +BOOLEAN MiIsPdeForAddressValid(PVOID Address) { return ((MiAddressToPxe(Address)->u.Hard.Valid) &&