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[NTOS]: Add support for handling a very specific type of user-fault on ARM3 memory: memory belonging to a VAD allocation made for a PEB/TEB (read-write) that hasn't yet been allocated.
[NTOS]: Define the demand-zero PDE template. svn path=/trunk/; revision=48190
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3 changed files with 127 additions and 3 deletions
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@ -22,6 +22,9 @@
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MMPTE ValidKernelPde = {.u.Hard.Valid = 1, .u.Hard.Write = 1, .u.Hard.Dirty = 1, .u.Hard.Accessed = 1};
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MMPTE ValidKernelPte = {.u.Hard.Valid = 1, .u.Hard.Write = 1, .u.Hard.Dirty = 1, .u.Hard.Accessed = 1};
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/* Template PDE for a demand-zero page */
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MMPDE DemandZeroPde = {.u.Long = (MM_READWRITE << MM_PTE_SOFTWARE_PROTECTION_BITS)};
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/* PRIVATE FUNCTIONS **********************************************************/
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VOID
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@ -377,6 +377,7 @@ typedef struct _MI_LARGE_PAGE_RANGES
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extern MMPTE HyperTemplatePte;
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extern MMPDE ValidKernelPde;
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extern MMPTE ValidKernelPte;
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extern MMPDE DemandZeroPde;
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extern BOOLEAN MmLargeSystemCache;
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extern BOOLEAN MmZeroPageFile;
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extern BOOLEAN MmProtectFreedNonPagedPool;
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@ -20,6 +20,34 @@
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/* PRIVATE FUNCTIONS **********************************************************/
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PMMPTE
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NTAPI
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MiCheckVirtualAddress(IN PVOID VirtualAddress,
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OUT PULONG ProtectCode,
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OUT PMMVAD *ProtoVad)
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{
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PMMVAD Vad;
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/* No prototype/section support for now */
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*ProtoVad = NULL;
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/* Only valid for user VADs for now */
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ASSERT(VirtualAddress <= MM_HIGHEST_USER_ADDRESS);
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/* Find the VAD, it must exist, since we only handle PEB/TEB */
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Vad = MiLocateAddress(VirtualAddress);
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ASSERT(Vad);
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/* This must be a TEB/PEB VAD */
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ASSERT(Vad->u.VadFlags.PrivateMemory == TRUE);
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ASSERT(Vad->u.VadFlags.MemCommit == TRUE);
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ASSERT(Vad->u.VadFlags.VadType == VadNone);
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/* Return the protection on it */
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*ProtectCode = Vad->u.VadFlags.Protection;
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return NULL;
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}
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NTSTATUS
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FASTCALL
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MiCheckPdeForPagedPool(IN PVOID Address)
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@ -300,6 +328,9 @@ MmArmAccessFault(IN BOOLEAN StoreInstruction,
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PEPROCESS CurrentProcess;
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NTSTATUS Status;
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PMMSUPPORT WorkingSet;
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ULONG ProtectionCode;
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PMMVAD Vad;
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PFN_NUMBER PageFrameIndex;
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DPRINT("ARM3 FAULT AT: %p\n", Address);
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//
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@ -494,12 +525,101 @@ MmArmAccessFault(IN BOOLEAN StoreInstruction,
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/* Lock the working set */
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MiLockProcessWorkingSet(CurrentProcess, CurrentThread);
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/* Do something */
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/* First things first, is the PDE valid? */
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ASSERT(PointerPde != MiAddressToPde(PTE_BASE));
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ASSERT(PointerPde->u.Hard.LargePage == 0);
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if (PointerPde->u.Hard.Valid == 0)
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{
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/* Right now, we only handle scenarios where the PDE is totally empty */
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ASSERT(PointerPde->u.Long == 0);
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/* Check if this address range belongs to a valid allocation (VAD) */
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MiCheckVirtualAddress(Address, &ProtectionCode, &Vad);
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/* Right now, we expect a valid protection mask on the VAD */
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ASSERT(ProtectionCode != MM_NOACCESS);
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/* Make the PDE demand-zero */
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MI_WRITE_INVALID_PTE(PointerPde, DemandZeroPde);
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/* And go dispatch the fault on the PDE. This should handle the demand-zero */
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Status = MiDispatchFault(TRUE,
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PointerPte,
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PointerPde,
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NULL,
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FALSE,
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PsGetCurrentProcess(),
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TrapInformation,
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NULL);
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/* We should come back with APCs enabled, and with a valid PDE */
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ASSERT(KeAreAllApcsDisabled() == TRUE);
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ASSERT(PointerPde->u.Hard.Valid == 1);
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}
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/* Now capture the PTE. We only handle cases where it's totally empty */
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TempPte = *PointerPte;
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ASSERT(TempPte.u.Long == 0);
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/* Check if this address range belongs to a valid allocation (VAD) */
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MiCheckVirtualAddress(Address, &ProtectionCode, &Vad);
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/* Right now, we expect a valid protection mask on the VAD */
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ASSERT(ProtectionCode != MM_NOACCESS);
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PointerPte->u.Soft.Protection = ProtectionCode;
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/* Lock the PFN database since we're going to grab a page */
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OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
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/* Grab a page out of there. Later we should grab a colored zero page */
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PageFrameIndex = MiRemoveAnyPage(0);
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ASSERT(PageFrameIndex);
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/* Release the lock since we need to do some zeroing */
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KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
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/* Zero out the page, since it's for user-mode */
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MiZeroPfn(PageFrameIndex);
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/* Grab the lock again so we can initialize the PFN entry */
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OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
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/* Initialize the PFN entry now */
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MiInitializePfn(PageFrameIndex, PointerPte, 1);
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/* And we're done with the lock */
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KeReleaseQueuedSpinLock(LockQueuePfnLock, OldIrql);
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/* One more demand-zero fault */
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InterlockedIncrement(&KeGetCurrentPrcb()->MmDemandZeroCount);
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/* Was the fault on an actual user page, or a kernel page for the user? */
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if (PointerPte <= MiHighestUserPte)
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{
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/* User fault, build a user PTE */
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MI_MAKE_HARDWARE_PTE_USER(&TempPte,
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PointerPte,
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PointerPte->u.Soft.Protection,
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PageFrameIndex);
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}
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else
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{
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/* Session, kernel, or user PTE, figure it out and build it */
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MI_MAKE_HARDWARE_PTE(&TempPte,
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PointerPte,
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PointerPte->u.Soft.Protection,
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PageFrameIndex);
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}
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/* Write the dirty bit for writeable pages */
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if (TempPte.u.Hard.Write) TempPte.u.Hard.Dirty = TRUE;
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/* And now write down the PTE, making the address valid */
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MI_WRITE_VALID_PTE(PointerPte, TempPte);
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/* Release the working set */
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MiUnlockProcessWorkingSet(CurrentProcess, CurrentThread);
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DPRINT1("WARNING: USER MODE FAULT IN ARM3???\n");
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return STATUS_ACCESS_VIOLATION;
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return STATUS_PAGE_FAULT_DEMAND_ZERO;
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}
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/* EOF */
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