mirror of
https://github.com/reactos/reactos.git
synced 2025-02-24 01:15:09 +00:00
[NTVDM:SVGA]
Halfplement (or perhaps hackplement) SVGA packed pixel addressing. svn path=/trunk/; revision=72518
This commit is contained in:
Aleksandar Andrejevic
parent
17a315285a
commit
724065020c
2 changed files with 163 additions and 108 deletions
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@ -317,7 +317,12 @@ static inline DWORD VgaGetVideoBaseAddress(VOID)
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static inline DWORD VgaGetAddressSize(VOID)
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{
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if (VgaCrtcRegisters[VGA_CRTC_UNDERLINE_REG] & VGA_CRTC_UNDERLINE_DWORD)
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if (VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES)
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{
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/* Packed pixel addressing */
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return 1;
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}
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else if (VgaCrtcRegisters[VGA_CRTC_UNDERLINE_REG] & VGA_CRTC_UNDERLINE_DWORD)
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{
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/* Double-word addressing */
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return 4; // sizeof(DWORD)
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@ -735,7 +740,8 @@ static VOID VgaUpdateFramebuffer(VOID)
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DWORD Address = StartAddressLatch;
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BYTE BytePanning = (VgaCrtcRegisters[VGA_CRTC_PRESET_ROW_SCAN_REG] >> 5) & 3;
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WORD LineCompare = VgaCrtcRegisters[VGA_CRTC_LINE_COMPARE_REG]
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| ((VgaCrtcRegisters[VGA_CRTC_OVERFLOW_REG] & VGA_CRTC_OVERFLOW_LC8) << 4);
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| ((VgaCrtcRegisters[VGA_CRTC_OVERFLOW_REG] & VGA_CRTC_OVERFLOW_LC8) << 4)
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| ((VgaCrtcRegisters[VGA_CRTC_MAX_SCAN_LINE_REG] & VGA_CRTC_MAXSCANLINE_LC9) << 3);
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BYTE PixelShift = VgaAcRegisters[VGA_AC_HORZ_PANNING_REG] & 0x0F;
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/*
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@ -815,99 +821,109 @@ static VOID VgaUpdateFramebuffer(VOID)
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X = j + ((PixelShift < 8) ? PixelShift : -1);
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}
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/* Check the shifting mode */
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if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_SHIFT256)
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if (VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES)
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{
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/* 4 bits shifted from each plane */
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// TODO: Check for high color modes
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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{
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/* One byte per pixel */
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PixelData = VgaMemory[WRAP_OFFSET((Address + (X / VGA_NUM_BANKS)) * AddressSize)
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* VGA_NUM_BANKS + (X % VGA_NUM_BANKS)];
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}
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else
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{
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/* 4-bits per pixel */
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PixelData = VgaMemory[WRAP_OFFSET((Address + (X / (VGA_NUM_BANKS * 2))) * AddressSize)
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* VGA_NUM_BANKS + (X % VGA_NUM_BANKS)];
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/* Check if we should use the highest 4 bits or lowest 4 */
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if (((X / VGA_NUM_BANKS) % 2) == 0)
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{
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/* Highest 4 */
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PixelData >>= 4;
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}
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else
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{
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/* Lowest 4 */
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PixelData &= 0x0F;
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}
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}
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}
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else if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_SHIFTREG)
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{
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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{
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// TODO: NOT IMPLEMENTED
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DPRINT1("8-bit interleaved mode is not implemented!\n");
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}
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else
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{
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/*
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* 2 bits shifted from plane 0 and 2 for the first 4 pixels,
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* then 2 bits shifted from plane 1 and 3 for the next 4
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*/
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DWORD BankNumber = (X / 4) % 2;
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DWORD Offset = Address + (X / 8);
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BYTE LowPlaneData = VgaMemory[WRAP_OFFSET(Offset * AddressSize) * VGA_NUM_BANKS + BankNumber];
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BYTE HighPlaneData = VgaMemory[WRAP_OFFSET(Offset * AddressSize) * VGA_NUM_BANKS + (BankNumber + 2)];
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/* Extract the two bits from each plane */
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LowPlaneData = (LowPlaneData >> (6 - ((X % 4) * 2))) & 0x03;
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HighPlaneData = (HighPlaneData >> (6 - ((X % 4) * 2))) & 0x03;
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/* Combine them into the pixel */
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PixelData = LowPlaneData | (HighPlaneData << 2);
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}
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/* 256 color mode */
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PixelData = VgaMemory[Address + X];
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}
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else
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{
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/* 1 bit shifted from each plane */
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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/* Check the shifting mode */
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if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_SHIFT256)
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{
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/* 8 bits per pixel, 2 on each plane */
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/* 4 bits shifted from each plane */
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for (k = 0; k < VGA_NUM_BANKS; k++)
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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{
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/* The data is on plane k, 4 pixels per byte */
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BYTE PlaneData = VgaMemory[WRAP_OFFSET((Address + (X >> 2)) * AddressSize) * VGA_NUM_BANKS + k];
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/* One byte per pixel */
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PixelData = VgaMemory[WRAP_OFFSET((Address + (X / VGA_NUM_BANKS)) * AddressSize)
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* VGA_NUM_BANKS + (X % VGA_NUM_BANKS)];
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}
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else
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{
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/* 4-bits per pixel */
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/* The mask of the first bit in the pair */
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BYTE BitMask = 1 << (((3 - (X % VGA_NUM_BANKS)) * 2) + 1);
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PixelData = VgaMemory[WRAP_OFFSET((Address + (X / (VGA_NUM_BANKS * 2))) * AddressSize)
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* VGA_NUM_BANKS + (X % VGA_NUM_BANKS)];
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/* Bits 0, 1, 2 and 3 come from the first bit of the pair */
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if (PlaneData & BitMask) PixelData |= 1 << k;
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/* Check if we should use the highest 4 bits or lowest 4 */
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if (((X / VGA_NUM_BANKS) % 2) == 0)
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{
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/* Highest 4 */
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PixelData >>= 4;
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}
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else
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{
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/* Lowest 4 */
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PixelData &= 0x0F;
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}
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}
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}
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else if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_SHIFTREG)
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{
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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{
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// TODO: NOT IMPLEMENTED
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DPRINT1("8-bit interleaved mode is not implemented!\n");
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}
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else
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{
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/*
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* 2 bits shifted from plane 0 and 2 for the first 4 pixels,
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* then 2 bits shifted from plane 1 and 3 for the next 4
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*/
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DWORD BankNumber = (X / 4) % 2;
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DWORD Offset = Address + (X / 8);
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BYTE LowPlaneData = VgaMemory[WRAP_OFFSET(Offset * AddressSize) * VGA_NUM_BANKS + BankNumber];
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BYTE HighPlaneData = VgaMemory[WRAP_OFFSET(Offset * AddressSize) * VGA_NUM_BANKS + (BankNumber + 2)];
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/* Bits 4, 5, 6 and 7 come from the second bit of the pair */
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if (PlaneData & (BitMask >> 1)) PixelData |= 1 << (k + 4);
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/* Extract the two bits from each plane */
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LowPlaneData = (LowPlaneData >> (6 - ((X % 4) * 2))) & 0x03;
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HighPlaneData = (HighPlaneData >> (6 - ((X % 4) * 2))) & 0x03;
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/* Combine them into the pixel */
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PixelData = LowPlaneData | (HighPlaneData << 2);
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}
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}
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else
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{
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/* 4 bits per pixel, 1 on each plane */
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/* 1 bit shifted from each plane */
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for (k = 0; k < VGA_NUM_BANKS; k++)
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/* Check if this is 16 or 256 color mode */
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if (VgaAcRegisters[VGA_AC_CONTROL_REG] & VGA_AC_CONTROL_8BIT)
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{
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BYTE PlaneData = VgaMemory[WRAP_OFFSET((Address + (X >> 3)) * AddressSize) * VGA_NUM_BANKS + k];
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/* 8 bits per pixel, 2 on each plane */
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/* If the bit on that plane is set, set it */
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if (PlaneData & (1 << (7 - (X % 8)))) PixelData |= 1 << k;
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for (k = 0; k < VGA_NUM_BANKS; k++)
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{
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/* The data is on plane k, 4 pixels per byte */
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BYTE PlaneData = VgaMemory[WRAP_OFFSET((Address + (X >> 2)) * AddressSize) * VGA_NUM_BANKS + k];
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/* The mask of the first bit in the pair */
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BYTE BitMask = 1 << (((3 - (X % VGA_NUM_BANKS)) * 2) + 1);
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/* Bits 0, 1, 2 and 3 come from the first bit of the pair */
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if (PlaneData & BitMask) PixelData |= 1 << k;
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/* Bits 4, 5, 6 and 7 come from the second bit of the pair */
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if (PlaneData & (BitMask >> 1)) PixelData |= 1 << (k + 4);
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}
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}
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else
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{
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/* 4 bits per pixel, 1 on each plane */
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for (k = 0; k < VGA_NUM_BANKS; k++)
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{
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BYTE PlaneData = VgaMemory[WRAP_OFFSET((Address + (X >> 3)) * AddressSize) * VGA_NUM_BANKS + k];
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/* If the bit on that plane is set, set it */
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if (PlaneData & (1 << (7 - (X % 8)))) PixelData |= 1 << k;
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}
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}
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}
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}
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@ -1687,6 +1703,7 @@ static VOID FASTCALL VgaHorizontalRetrace(ULONGLONG ElapsedTime)
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/* Save the scanline size */
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ScanlineSizeLatch = ((DWORD)VgaCrtcRegisters[VGA_CRTC_OFFSET_REG]
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+ (((DWORD)VgaCrtcRegisters[SVGA_CRTC_EXT_DISPLAY_REG] & SVGA_CRTC_EXT_OFFSET_BIT8) << 4)) * 2;
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if (VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES) ScanlineSizeLatch <<= 2;
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/* Save the starting address */
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StartAddressLatch = MAKEWORD(VgaCrtcRegisters[VGA_CRTC_START_ADDR_LOW_REG],
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@ -1768,6 +1785,7 @@ VOID VgaRefreshDisplay(VOID)
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/* Save the scanline size */
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ScanlineSizeLatch = ((DWORD)VgaCrtcRegisters[VGA_CRTC_OFFSET_REG]
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+ (((DWORD)VgaCrtcRegisters[SVGA_CRTC_EXT_DISPLAY_REG] & SVGA_CRTC_EXT_OFFSET_BIT8) << 4)) * 2;
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if (VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES) ScanlineSizeLatch <<= 2;
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/* Save the starting address */
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StartAddressLatch = MAKEWORD(VgaCrtcRegisters[VGA_CRTC_START_ADDR_LOW_REG],
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@ -1797,12 +1815,11 @@ VOID FASTCALL VgaReadMemory(ULONG Address, PVOID Buffer, ULONG Size)
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{
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VideoAddress = VgaTranslateAddress(Address);
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#if 0
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/* Packed pixel mode - not used yet */
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/* Check for packed pixel, chain-4, and odd-even mode */
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if (VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES)
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{
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/* Just copy from the video memory */
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PVOID VideoMemory = &VgaMemory[VideoAddress * VGA_NUM_BANKS + (Address & 3)];
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PVOID VideoMemory = &VgaMemory[VideoAddress + (Address & 3)];
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switch (Size)
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{
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@ -1830,10 +1847,7 @@ VOID FASTCALL VgaReadMemory(ULONG Address, PVOID Buffer, ULONG Size)
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#endif
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}
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}
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#endif
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/* Check for chain-4 and odd-even mode */
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if (VgaSeqRegisters[VGA_SEQ_MEM_REG] & VGA_SEQ_MEM_C4)
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else if (VgaSeqRegisters[VGA_SEQ_MEM_REG] & VGA_SEQ_MEM_C4)
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{
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i = 0;
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@ -1979,38 +1993,78 @@ BOOLEAN FASTCALL VgaWriteMemory(ULONG Address, PVOID Buffer, ULONG Size)
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/* Also ignore if write access to all planes is disabled */
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if ((VgaSeqRegisters[VGA_SEQ_MASK_REG] & 0x0F) == 0x00) return TRUE;
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/* Loop through each byte */
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for (i = 0; i < Size; i++)
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if (!(VgaSeqRegisters[SVGA_SEQ_EXT_MODE_REG] & SVGA_SEQ_EXT_MODE_HIGH_RES))
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{
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VideoAddress = VgaTranslateAddress(Address + i);
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for (j = 0; j < VGA_NUM_BANKS; j++)
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/* Loop through each byte */
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for (i = 0; i < Size; i++)
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{
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/* Make sure the page is writeable */
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if (!(VgaSeqRegisters[VGA_SEQ_MASK_REG] & (1 << j))) continue;
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VideoAddress = VgaTranslateAddress(Address + i);
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/* Check if this is chain-4 mode */
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if (VgaSeqRegisters[VGA_SEQ_MEM_REG] & VGA_SEQ_MEM_C4)
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for (j = 0; j < VGA_NUM_BANKS; j++)
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{
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if (((Address + i) & 0x03) != j)
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{
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/* This plane will not be accessed */
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continue;
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}
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}
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/* Make sure the page is writeable */
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if (!(VgaSeqRegisters[VGA_SEQ_MASK_REG] & (1 << j))) continue;
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/* Check if this is odd-even mode */
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if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_OE)
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{
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if (((Address + i) & 0x01) != (j & 1))
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/* Check if this is chain-4 mode */
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if (VgaSeqRegisters[VGA_SEQ_MEM_REG] & VGA_SEQ_MEM_C4)
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{
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/* This plane will not be accessed */
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continue;
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if (((Address + i) & 0x03) != j)
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{
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/* This plane will not be accessed */
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continue;
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}
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}
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}
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/* Copy the value to the VGA memory */
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VgaMemory[VideoAddress * VGA_NUM_BANKS + j] = VgaTranslateByteForWriting(BufPtr[i], j);
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/* Check if this is odd-even mode */
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if (VgaGcRegisters[VGA_GC_MODE_REG] & VGA_GC_MODE_OE)
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{
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if (((Address + i) & 0x01) != (j & 1))
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{
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/* This plane will not be accessed */
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continue;
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}
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}
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/* Copy the value to the VGA memory */
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VgaMemory[VideoAddress * VGA_NUM_BANKS + j] = VgaTranslateByteForWriting(BufPtr[i], j);
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}
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}
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}
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else
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{
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PVOID VideoMemory;
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// TODO: Apply the page write mask!
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// TODO: Check whether the write mode stuff applies to packed-pixel modes
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/* Just copy to the video memory */
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VideoAddress = VgaTranslateAddress(Address);
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VideoMemory = &VgaMemory[VideoAddress + (Address & 3)];
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switch (Size)
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{
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case sizeof(UCHAR):
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*(PUCHAR)VideoMemory = *(PUCHAR)Buffer;
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return TRUE;
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case sizeof(USHORT):
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*(PUSHORT)VideoMemory = *(PUSHORT)Buffer;
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return TRUE;
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case sizeof(ULONG):
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*(PULONG)VideoMemory = *(PULONG)Buffer;
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return TRUE;
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case sizeof(ULONGLONG):
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*(PULONGLONG)VideoMemory = *(PULONGLONG)Buffer;
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return TRUE;
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default:
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#if defined(__GNUC__)
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__builtin_memcpy(VideoMemory, Buffer, Size);
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#else
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RtlCopyMemory(VideoMemory, Buffer, Size);
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#endif
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}
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}
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@ -182,6 +182,7 @@ enum
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/* CRTC max scanline register bits */
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#define VGA_CRTC_MAXSCANLINE_DOUBLE (1 << 7)
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#define VGA_CRTC_MAXSCANLINE_LC9 (1 << 6)
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/* CRTC mode control register bits */
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#define VGA_CRTC_MODE_CONTROL_WRAP (1 << 5)
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