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https://github.com/reactos/reactos.git
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- Implementation of HalReadDmaCounter.
- Cleaned up implementation of HalGetAdapter. Moved the initialization stuff from there to HalpInitDma that is called by HalInitSystem. - Let HalAllocateCommonBuffer allocated 64K aligned memory. - Change IoMapTransfer to support auto initialize and single transfer mode, 16-bit DMA and common buffers. - Stop DMA transfer in IoFlushAdapterBuffers. svn path=/trunk/; revision=10254
This commit is contained in:
Filip Navara
parent
ec5f846d4c
commit
6e64d6266e
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@ -1,4 +1,4 @@
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/* $Id: adapter.c,v 1.10 2003/12/31 05:33:03 jfilby Exp $
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/* $Id: adapter.c,v 1.11 2004/07/22 18:49:18 navaraf Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -66,7 +66,7 @@ HalAllocateAdapterChannel(
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WaitContextBlock->NumberOfMapRegisters = NumberOfMapRegisters;
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/* returns true if queued, else returns false and sets the queue to busy */
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if(KeInsertDeviceQueue(&AdapterObject->DeviceQueue, (PKDEVICE_QUEUE_ENTRY)WaitContextBlock))
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if(KeInsertDeviceQueue(&AdapterObject->DeviceQueue, &WaitContextBlock->WaitQueueEntry))
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return STATUS_SUCCESS;
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/* 24-bit max address due to 16-bit dma controllers */
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@ -79,6 +79,10 @@ HalAllocateAdapterChannel(
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* X86 lacks map registers, so for now, we allocate a contiguous
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* block of physical memory <16MB and copy all DMA buffers into
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* that. This can be optimized.
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*
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* FIXME: We propably shouldn't allocate the memory here for common
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* buffer transfers. See a comment in IoMapTransfer about common buffer
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* support.
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*/
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AdapterObject->MapRegisterBase = MmAllocateContiguousAlignedMemory(
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NumberOfMapRegisters * PAGE_SIZE,
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@ -159,6 +163,12 @@ IoFlushAdapterBuffers (
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if(!MapRegisterBase)
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return TRUE;
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/* mask out (disable) the dma channel */
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if (AdapterObject->Channel < 4)
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WRITE_PORT_UCHAR( (PVOID)0x0A, (UCHAR)(AdapterObject->Channel | 0x4) );
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else
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WRITE_PORT_UCHAR( (PVOID)0xD4, (UCHAR)((AdapterObject->Channel - 4) | 0x4) );
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if(WriteToDevice)
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return TRUE;
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@ -166,19 +176,6 @@ IoFlushAdapterBuffers (
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(PVOID)((DWORD)MmGetSystemAddressForMdl( Mdl ) + (DWORD)CurrentVa - (DWORD)MmGetMdlVirtualAddress( Mdl )),
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MapRegisterBase, Length );
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/*
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FIXME: mask off (disable) channel if doing System DMA?
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From linux:
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if (dmanr<=3)
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dma_outb(dmanr | 4, DMA1_MASK_REG 0x0A) ;
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else
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dma_outb((dmanr & 3) | 4, DMA2_MASK_REG 0x0A);
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*/
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return TRUE;
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}
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@ -304,14 +301,18 @@ IoMapTransfer (
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* - If the controller supports scatter/gather, the copyover should not happen
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*/
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{
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PHYSICAL_ADDRESS Address;
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PHYSICAL_ADDRESS Address;
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PVOID MaskReg, ClearReg, ModeReg;
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UCHAR ModeMask, LengthShift;
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KIRQL OldIrql;
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#if defined(__GNUC__)
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Address.QuadPart = 0ULL;
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Address.QuadPart = 0ULL;
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#else
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Address.QuadPart = 0;
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Address.QuadPart = 0;
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#endif
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/* Isa System (slave) DMA? */
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/* Isa System (slave) DMA? */
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if (AdapterObject && AdapterObject->InterfaceType == Isa && !AdapterObject->Master)
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{
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#if 0
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@ -321,38 +322,76 @@ IoMapTransfer (
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assert(AdapterObject->Channel != 4);
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#endif
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KeAcquireSpinLock(&AdapterObject->SpinLock, &OldIrql);
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/*
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FIXME: Handle case when doing common-buffer System DMA. In this case, the buffer described
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by MDL is allready phys. contiguous and below 16 mega. Driver makes a one-shot call to
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IoMapTransfer during init. to program controller with the common-buffer.
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*/
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* FIXME: Handle case when doing common-buffer System DMA. In this case,
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* the buffer described by MDL is already phys. contiguous and below
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* 16 mega. Driver makes a one-shot call to IoMapTransfer during init.
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* to program controller with the common-buffer.
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*
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* UPDATE: Common buffer support is in place, but it's not done in a
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* clean way. We use the buffer passed by the MDL in case that the
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* adapter object is marked as auto initialize. I'm not sure if this
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* is correct and if not, how to do it properly. Note that it's also
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* possible to allocate the common buffer with different adapter object
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* and IoMapTransfer must still work in this case. Eventually this should
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* be cleaned up somehow or at least this comment modified to reflect
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* the reality.
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* -- Filip Navara, 19/07/2004
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*/
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/* if it is a write to the device, copy the caller buffer to the low buffer */
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if( WriteToDevice )
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if( WriteToDevice && !AdapterObject->AutoInitialize )
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{
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memcpy(MapRegisterBase,
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(char*)MmGetSystemAddressForMdl(Mdl) + ((ULONG)CurrentVa - (ULONG)MmGetMdlVirtualAddress(Mdl)),
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*Length );
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}
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// 16-bit DMA
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if( AdapterObject->Channel >= 4 )
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{
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MaskReg = (PVOID)0xD4; ClearReg = (PVOID)0xD8; ModeReg = (PVOID)0xD6;
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LengthShift = 1;
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}
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else
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{
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MaskReg = (PVOID)0x0A; ClearReg = (PVOID)0x0C; ModeReg = (PVOID)0x0B;
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LengthShift = 0;
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}
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// calculate the mask we will later set to the mode register
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ModeMask = (AdapterObject->Channel & 3) | ( WriteToDevice ? 0x8 : 0x4 );
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// FIXME: if not demand mode, which mode to use? 0x40 for single mode
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if (!AdapterObject->DemandMode)
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ModeMask |= 0x40;
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if (AdapterObject->AutoInitialize)
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ModeMask |= 0x10;
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// program up the dma controller, and return
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Address = MmGetPhysicalAddress( MapRegisterBase );
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// port 0xA is the dma mask register, or a 0x10 on to the channel number to mask it
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WRITE_PORT_UCHAR( (PVOID)0x0A, (UCHAR)(AdapterObject->Channel | 0x10));
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if (!AdapterObject->AutoInitialize)
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Address = MmGetPhysicalAddress( MapRegisterBase );
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else
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Address = MmGetPhysicalAddress( CurrentVa );
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// disable and select the channel number
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WRITE_PORT_UCHAR( MaskReg, (UCHAR)((AdapterObject->Channel & 3) | 0x4) );
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// write zero to the reset register
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WRITE_PORT_UCHAR( (PVOID)0x0C, 0 );
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// mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for non auto initialize
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WRITE_PORT_UCHAR( (PVOID)0x0B, (UCHAR)(AdapterObject->Channel | ( WriteToDevice ? 0x8 : 0x4 )) );
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WRITE_PORT_UCHAR( ClearReg, 0 );
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// mode register, or channel with 0x4 for write memory, 0x8 for read memory, 0x10 for auto initialize
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WRITE_PORT_UCHAR( ModeReg, ModeMask);
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// set the 64k page register for the channel
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WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(((ULONG)Address.QuadPart)>>16) );
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WRITE_PORT_UCHAR( AdapterObject->PagePort, (UCHAR)(Address.u.LowPart >> 16) );
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// low, then high address byte, which is always 0 for us, because we have a 64k alligned address
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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WRITE_PORT_UCHAR( AdapterObject->OffsetPort, 0 );
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// count is 1 less than length, low then high
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(*Length - 1) );
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length - 1)>>8) );
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)((*Length >> LengthShift) - 1) );
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WRITE_PORT_UCHAR( AdapterObject->CountPort, (UCHAR)(((*Length >> LengthShift) - 1)>>8) );
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// unmask the channel to let it rip
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WRITE_PORT_UCHAR( (PVOID)0x0A, (UCHAR)AdapterObject->Channel );
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WRITE_PORT_UCHAR( MaskReg, AdapterObject->Channel & 3 );
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KeReleaseSpinLock(&AdapterObject->SpinLock, OldIrql);
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/*
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NOTE: Return value should be ignored when doing System DMA.
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@ -436,7 +475,7 @@ IoMapTransfer (
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return MmGetPhysicalAddress(MapRegisterBase);
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}
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DPRINT1("IoMapTransfer: Unsupported operation\n");
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KEBUGCHECK(0);
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return Address;
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@ -1,4 +1,4 @@
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/* $Id: dma.c,v 1.8 2003/10/23 09:03:51 vizzini Exp $
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/* $Id: dma.c,v 1.9 2004/07/22 18:49:18 navaraf Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -18,21 +18,38 @@
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/* XXX This initialization is out of date - ADAPTER_OBJECT has changed */
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/* NOTE: The following initializations have to be kept in synch with ADAPTER_OBJECT in hal.h */
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/* FIXME: we need the 16-bit dma channels */
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ADAPTER_OBJECT IsaSlaveAdapterObjects[] = {
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{ Isa, FALSE, 0, (PVOID)0x87, (PVOID)0x1, (PVOID)0x0, 0, NULL },
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{ Isa, FALSE, 1, (PVOID)0x83, (PVOID)0x3, (PVOID)0x2, 0, NULL },
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{ Isa, FALSE, 2, (PVOID)0x81, (PVOID)0x5, (PVOID)0x4, 0, NULL },
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{ Isa, FALSE, 3, (PVOID)0x82, (PVOID)0x7, (PVOID)0x6, 0, NULL } };
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{ Isa, FALSE, 3, (PVOID)0x82, (PVOID)0x7, (PVOID)0x6, 0, NULL },
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/* 16-bit DMA */
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{ Isa, FALSE, 4, (PVOID)0x8F, (PVOID)0xC2, (PVOID)0xC0, 0, NULL },
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{ Isa, FALSE, 5, (PVOID)0x8B, (PVOID)0xC6, (PVOID)0xC4, 0, NULL },
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{ Isa, FALSE, 6, (PVOID)0x89, (PVOID)0xCA, (PVOID)0xC8, 0, NULL },
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{ Isa, FALSE, 7, (PVOID)0x8A, (PVOID)0xCE, (PVOID)0xCC, 0, NULL } };
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ADAPTER_OBJECT PciBusMasterAdapterObjects[] = {
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{ PCIBus, TRUE, 0, (PVOID)0, (PVOID)0, (PVOID)0x0, 0, NULL } };
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/* Global flag to tell whether or not the adapter's device queue should be initialized (first call only) */
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BOOLEAN AdaptersInitialized = FALSE;
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/* FUNCTIONS *****************************************************************/
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VOID
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HalpInitDma (VOID)
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{
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ULONG Index;
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KeInitializeDeviceQueue(&PciBusMasterAdapterObjects[0].DeviceQueue);
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KeInitializeSpinLock(&PciBusMasterAdapterObjects[0].SpinLock);
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PciBusMasterAdapterObjects[0].Inuse = FALSE;
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for (Index = 0; Index < 8; Index++)
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{
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KeInitializeDeviceQueue(&IsaSlaveAdapterObjects[Index].DeviceQueue);
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KeInitializeSpinLock(&IsaSlaveAdapterObjects[Index].SpinLock);
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IsaSlaveAdapterObjects[Index].Inuse = FALSE;
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}
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}
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PVOID STDCALL
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HalAllocateCommonBuffer (PADAPTER_OBJECT AdapterObject,
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ULONG Length,
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@ -52,11 +69,15 @@ HalAllocateCommonBuffer (PADAPTER_OBJECT AdapterObject,
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* NULL on failure
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* NOTES:
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* CacheEnabled is ignored - it's all cache-disabled (like in NT)
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* UPDATE: It's not ignored now. If that's wrong just modify the
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* CacheEnabled comparsion below.
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*/
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{
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PHYSICAL_ADDRESS HighestAddress;
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PHYSICAL_ADDRESS LowestAddress, HighestAddress, BoundryAddressMultiple;
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PVOID BaseAddress;
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LowestAddress.QuadPart = 0;
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BoundryAddressMultiple.QuadPart = 0;
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HighestAddress.u.HighPart = 0;
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if (AdapterObject->InterfaceType == Isa ||
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(AdapterObject->InterfaceType == MicroChannel && AdapterObject->Master == FALSE))
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@ -68,7 +89,13 @@ HalAllocateCommonBuffer (PADAPTER_OBJECT AdapterObject,
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HighestAddress.u.LowPart = 0xFFFFFFFF; /* 32Bit: 4GB address range */
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}
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BaseAddress = MmAllocateContiguousMemory(Length, HighestAddress);
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BaseAddress = MmAllocateContiguousAlignedMemory(
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Length,
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LowestAddress,
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HighestAddress,
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BoundryAddressMultiple,
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CacheEnabled ? MmCached : MmNonCached,
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0x10000 );
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if (!BaseAddress)
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return 0;
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@ -114,56 +141,80 @@ HalGetAdapter (PDEVICE_DESCRIPTION DeviceDescription,
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* RETURNS: The allocated adapter object on success
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* NULL on failure
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* TODO:
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* Figure out what to do with the commented-out cases
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* Honour all the fields in DeviceDescription structure.
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*/
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{
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/* TODO: find a better home for this */
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if(!AdaptersInitialized)
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{
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KeInitializeDeviceQueue(&PciBusMasterAdapterObjects[0].DeviceQueue);
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KeInitializeDeviceQueue(&IsaSlaveAdapterObjects[0].DeviceQueue);
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KeInitializeDeviceQueue(&IsaSlaveAdapterObjects[1].DeviceQueue);
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KeInitializeDeviceQueue(&IsaSlaveAdapterObjects[2].DeviceQueue);
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KeInitializeDeviceQueue(&IsaSlaveAdapterObjects[3].DeviceQueue);
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AdaptersInitialized = TRUE;
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}
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PADAPTER_OBJECT AdapterObject;
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/* Validate parameters in device description, and return a pointer to
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the adapter object for the requested dma channel */
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if( DeviceDescription->Version != DEVICE_DESCRIPTION_VERSION )
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return NULL;
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if (DeviceDescription->InterfaceType == PCIBus)
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switch (DeviceDescription->InterfaceType)
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{
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if (DeviceDescription->Master == FALSE)
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return NULL;
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case PCIBus:
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if (DeviceDescription->Master == FALSE)
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return NULL;
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return &PciBusMasterAdapterObjects[0];
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return &PciBusMasterAdapterObjects[0];
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case Isa:
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/* There are only 8 DMA channels on ISA. */
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if (DeviceDescription->DmaChannel >= 8)
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return NULL;
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/* Channels 1-4 are for 8-bit transfers... */
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if (DeviceDescription->DmaWidth != Width8Bits &&
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DeviceDescription->DmaChannel < 4)
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return NULL;
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/* ...and the rest is for 16-bit transfers. */
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if (DeviceDescription->DmaWidth != Width16Bits &&
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DeviceDescription->DmaChannel >= 4)
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return NULL;
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AdapterObject = &IsaSlaveAdapterObjects[DeviceDescription->DmaChannel];
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AdapterObject->Master = DeviceDescription->Master;
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AdapterObject->ScatterGather = DeviceDescription->ScatterGather;
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AdapterObject->AutoInitialize = DeviceDescription->AutoInitialize;
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AdapterObject->DemandMode = DeviceDescription->DemandMode;
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AdapterObject->Buffer = 0;
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/* FIXME: Is this correct? */
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*NumberOfMapRegisters = 16;
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return AdapterObject;
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default:
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/* Unsupported bus. */
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return NULL;
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}
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/*
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if( DeviceDescription->Master )
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return NULL;
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if( DeviceDescription->ScatterGather )
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return NULL;
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if( DeviceDescription->AutoInitialize )
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return NULL;
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if( DeviceDescription->Dma32BitAddresses )
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return NULL;
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if( DeviceDescription->InterfaceType != Isa )
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return NULL;
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*/
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/* if( DeviceDescription->DmaWidth != Width8Bits )
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return NULL;*/
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*NumberOfMapRegisters = 0x10;
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IsaSlaveAdapterObjects[DeviceDescription->DmaChannel].Buffer = 0;
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return &IsaSlaveAdapterObjects[DeviceDescription->DmaChannel];
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}
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ULONG STDCALL
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HalReadDmaCounter (PADAPTER_OBJECT AdapterObject)
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{
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UNIMPLEMENTED;
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KIRQL OldIrql;
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ULONG Count;
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if (AdapterObject && AdapterObject->InterfaceType == Isa && !AdapterObject->Master)
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{
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KeAcquireSpinLock(&AdapterObject->SpinLock, &OldIrql);
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/* Clear the flip/flop register */
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WRITE_PORT_UCHAR( AdapterObject->Channel < 4 ? (PVOID)0x0C : (PVOID)0xD8, 0 );
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/* Read the offset */
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Count = READ_PORT_UCHAR( AdapterObject->CountPort );
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Count |= READ_PORT_UCHAR( AdapterObject->CountPort ) << 8;
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KeReleaseSpinLock(&AdapterObject->SpinLock, OldIrql);
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/*
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* We must return twice the sound for channel >= 4 because it's the size
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* of words (16-bit) and not bytes.
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*/
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if (AdapterObject->Channel < 4)
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return Count;
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else
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return Count << 1;
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}
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return 0;
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}
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/* EOF */
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@ -1,4 +1,4 @@
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/* $Id: halinit.c,v 1.8 2004/05/15 22:45:51 hbirr Exp $
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/* $Id: halinit.c,v 1.9 2004/07/22 18:49:18 navaraf Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -63,6 +63,7 @@ HalInitSystem (ULONG BootPhase,
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else if (BootPhase == 1)
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{
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HalpInitBusHandlers();
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HalpInitDma();
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HalpCalibrateStallExecution();
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/* Enumerate the devices on the motherboard */
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@ -19,6 +19,7 @@ BOOLEAN Hal_bios32_is_service_present(ULONG service);
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VOID FASTCALL HalInitializeDisplay (PLOADER_PARAMETER_BLOCK LoaderBlock);
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VOID FASTCALL HalClearDisplay (UCHAR CharAttribute);
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/* bus.c */
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VOID HalpInitBusHandlers (VOID);
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/* irql.c */
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@ -33,6 +34,9 @@ VOID HalpInitPciBus (VOID);
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/* enum.c */
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VOID HalpStartEnumerator (VOID);
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/* dma.c */
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VOID HalpInitDma (VOID);
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/*
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* ADAPTER_OBJECT - Track a busmaster DMA adapter and its associated resources
|
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*
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@ -59,6 +63,15 @@ struct _ADAPTER_OBJECT {
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PWAIT_CONTEXT_BLOCK WaitContextBlock;
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KDEVICE_QUEUE DeviceQueue;
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BOOLEAN ScatterGather;
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||||
/*
|
||||
* 18/07/04: Added these members. It's propably not the exact place where
|
||||
* this should be stored, but I can't find better one. I haven't checked
|
||||
* how Windows handles this.
|
||||
* -- Filip Navara
|
||||
*/
|
||||
BOOLEAN DemandMode;
|
||||
BOOLEAN AutoInitialize;
|
||||
};
|
||||
|
||||
/* sysinfo.c */
|
||||
|
|
|
|||
Loading…
Reference in a new issue