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- Silence Uniata warnings, add a .diff and remove allowwarnings=true

Browse source 
svn path=/trunk/; revision=38452
This commit is contained in:
Stefan Ginsberg 2008-12-29 11:03:54 +00:00
parent 7b72ed4a02
commit 6d9a712475
10 changed files with 449 additions and 40 deletions
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4
reactos/drivers/storage/ide/uniata/atapi.h
View file

@ -138,6 +138,10 @@ ScsiDebugPrint(
#else // _DEBUG #else // _DEBUG
#ifdef KdPrint
#undef KdPrint
#endif
#define PRINT_PREFIX "UniATA: " #define PRINT_PREFIX "UniATA: "
//#define KdPrint3(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }} //#define KdPrint3(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}

2
reactos/drivers/storage/ide/uniata/id_ata.cpp
View file

@ -1864,7 +1864,9 @@ AtapiResetController__(
ULONG slotNumber = deviceExtension->slotNumber; ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber; ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff; ULONG VendorID = deviceExtension->DevID & 0xffff;
#ifdef _DEBUG
ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff; ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
#endif
//ULONG RevID = deviceExtension->RevID; //ULONG RevID = deviceExtension->RevID;
ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK; ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
UCHAR tmp8; UCHAR tmp8;

4
reactos/drivers/storage/ide/uniata/id_badblock.cpp
View file

@ -159,7 +159,11 @@ InitBadBlocks(
L"UniATA\\Parameters\\BadBlocks", L"UniATA\\Parameters\\BadBlocks",
QueryTable, 0, 0); QueryTable, 0, 0);
#ifdef _DEBUG
KdPrint(( "InitBadBlocks returned: %#x\n", status)); KdPrint(( "InitBadBlocks returned: %#x\n", status));
#else
UNREFERENCED_PARAMETER(status);
#endif
} else { } else {
KdPrint(( "InitBadBlocks local\n")); KdPrint(( "InitBadBlocks local\n"));

36
reactos/drivers/storage/ide/uniata/id_dma.cpp
View file

@ -219,7 +219,7 @@ AtapiDmaSetup(
PHW_CHANNEL chan = &(deviceExtension->chan[lChannel]); PHW_CHANNEL chan = &(deviceExtension->chan[lChannel]);
PATA_REQ AtaReq = (PATA_REQ)(Srb->SrbExtension); PATA_REQ AtaReq = (PATA_REQ)(Srb->SrbExtension);
BOOLEAN use_DB_IO = FALSE; BOOLEAN use_DB_IO = FALSE;
BOOLEAN use_AHCI = FALSE; //BOOLEAN use_AHCI = FALSE;
ULONG orig_count = count; ULONG orig_count = count;
ULONG max_entries = (deviceExtension->HwFlags & UNIATA_AHCI) ? ATA_AHCI_DMA_ENTRIES : ATA_DMA_ENTRIES; ULONG max_entries = (deviceExtension->HwFlags & UNIATA_AHCI) ? ATA_AHCI_DMA_ENTRIES : ATA_DMA_ENTRIES;
@ -281,7 +281,7 @@ retry_DB_IO:
if(!dma_count || ((LONG)(dma_base) == -1)) { if(!dma_count || ((LONG)(dma_base) == -1)) {
KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No 1st block\n" )); KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No 1st block\n" ));
//AtaReq->dma_base = NULL; //AtaReq->dma_base = NULL;
AtaReq->ahci_base64 = NULL; AtaReq->ahci_base64 = (ULONGLONG)NULL;
return FALSE; return FALSE;
} }
@ -303,7 +303,7 @@ retry_DB_IO:
if (i >= max_entries) { if (i >= max_entries) {
KdPrint2((PRINT_PREFIX "too many segments in DMA table\n" )); KdPrint2((PRINT_PREFIX "too many segments in DMA table\n" ));
//AtaReq->dma_base = NULL; //AtaReq->dma_base = NULL;
AtaReq->ahci_base64 = NULL; AtaReq->ahci_base64 = (ULONGLONG)NULL;
return FALSE; return FALSE;
} }
KdPrint2((PRINT_PREFIX " get Phys(data[n]=%x)\n", data )); KdPrint2((PRINT_PREFIX " get Phys(data[n]=%x)\n", data ));
@ -321,7 +321,7 @@ retry_DB_IO:
} else } else
if(!dma_count || !dma_base || ((LONG)(dma_base) == -1)) { if(!dma_count || !dma_base || ((LONG)(dma_base) == -1)) {
//AtaReq->dma_base = NULL; //AtaReq->dma_base = NULL;
AtaReq->ahci_base64 = NULL; AtaReq->ahci_base64 = (ULONGLONG)NULL;
KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No NEXT block\n" )); KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No NEXT block\n" ));
return FALSE; return FALSE;
} }
@ -612,7 +612,7 @@ AtapiDmaReinit(
} }
if((deviceExtension->HbaCtrlFlags & HBAFLAGS_DMA_DISABLED_LBA48) && if((deviceExtension->HbaCtrlFlags & HBAFLAGS_DMA_DISABLED_LBA48) &&
(AtaReq->lba >= ATA_MAX_LBA28) && (AtaReq->lba >= (LONGLONG)ATA_MAX_LBA28) &&
(LunExt->TransferMode > ATA_PIO5) ) { (LunExt->TransferMode > ATA_PIO5) ) {
KdPrint2((PRINT_PREFIX KdPrint2((PRINT_PREFIX
"AtapiDmaReinit: FORCE_DOWNRATE on Device %d for LBA48\n", ldev & 1)); "AtapiDmaReinit: FORCE_DOWNRATE on Device %d for LBA48\n", ldev & 1));
@ -623,7 +623,7 @@ AtapiDmaReinit(
if(AtaReq->Flags & REQ_FLAG_FORCE_DOWNRATE) { if(AtaReq->Flags & REQ_FLAG_FORCE_DOWNRATE) {
KdPrint2((PRINT_PREFIX KdPrint2((PRINT_PREFIX
"AtapiDmaReinit: FORCE_DOWNRATE on Device %d\n", ldev & 1)); "AtapiDmaReinit: FORCE_DOWNRATE on Device %d\n", ldev & 1));
if(AtaReq->lba >= ATA_MAX_LBA28) { if(AtaReq->lba >= (LONGLONG)ATA_MAX_LBA28) {
limit_lba48: limit_lba48:
LunExt->DeviceFlags |= REQ_FLAG_FORCE_DOWNRATE_LBA48; LunExt->DeviceFlags |= REQ_FLAG_FORCE_DOWNRATE_LBA48;
limit_pio: limit_pio:
@ -1046,7 +1046,7 @@ set_new_acard:
/* set PIO mode timings */ /* set PIO mode timings */
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode); AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
if((apiomode >= 0) && (ChipType != VIA133)) { if((apiomode >= 0) && (ChipType != VIA133)) {
SetPciConfig1(reg-0x08, via_pio[apiomode]); SetPciConfig1(reg-0x08, via_pio[(UCHAR)apiomode]);
} }
via82c_timing(deviceExtension, dev, ATA_PIO0 + apiomode); via82c_timing(deviceExtension, dev, ATA_PIO0 + apiomode);
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode); AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
@ -1067,18 +1067,18 @@ set_new_acard:
apiomode = 4; apiomode = 4;
for(i=udmamode; i>=0; i--) { for(i=udmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_UDMA0 + i)) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_UDMA0 + i)) {
AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[udmamode]); AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[(UCHAR)udmamode]);
return; return;
} }
} }
for(i=wdmamode; i>=0; i--) { for(i=wdmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_WDMA0 + i)) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_WDMA0 + i)) {
AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[wdmamode]); AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[(UCHAR)wdmamode]);
return; return;
} }
} }
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) {
AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[apiomode]); AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[(UCHAR)apiomode]);
return; return;
} }
return; return;
@ -1113,7 +1113,7 @@ set_new_acard:
} }
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) {
ChangePciConfig4(0x44 + (dev * 8), a | 0x80000000); ChangePciConfig4(0x44 + (dev * 8), a | 0x80000000);
SetPciConfig4(0x40 + (dev * 8), nat_piotiming[apiomode]); SetPciConfig4(0x40 + (dev * 8), nat_piotiming[(UCHAR)apiomode]);
return; return;
} }
/* Use GENERIC PIO */ /* Use GENERIC PIO */
@ -1413,7 +1413,7 @@ set_new_acard:
// 44 // 44
GetPciConfig4(0x44, reg44); GetPciConfig4(0x44, reg44);
reg44 = (reg44 & ~(0xff << bit_offset)) | reg44 = (reg44 & ~(0xff << bit_offset)) |
(sw_dma_modes[wdmamode] << bit_offset); (sw_dma_modes[(UCHAR)wdmamode] << bit_offset);
SetPciConfig4(0x44, reg44); SetPciConfig4(0x44, reg44);
// 40 // 40
GetPciConfig4(0x40, reg40); GetPciConfig4(0x40, reg40);
@ -1439,7 +1439,7 @@ set_new_acard:
// 40 // 40
GetPciConfig4(0x40, reg40); GetPciConfig4(0x40, reg40);
reg40 = (reg40 & ~(0xff << bit_offset)) | reg40 = (reg40 & ~(0xff << bit_offset)) |
(sw_pio_modes[apiomode] << bit_offset); (sw_pio_modes[(UCHAR)apiomode] << bit_offset);
SetPciConfig4(0x40, reg40); SetPciConfig4(0x40, reg40);
return; return;
break; } break; }
@ -1527,7 +1527,7 @@ l_ATA_SILICON_IMAGE_ID:
/* set PIO mode timings */ /* set PIO mode timings */
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode); AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
SetPciConfig1(treg, cmd_pio_modes[apiomode]); SetPciConfig1(treg, cmd_pio_modes[(UCHAR)apiomode]);
ChangePciConfig1(Channel ? 0x7b : 0x73, a & ~(!(DeviceNumber & 1) ? 0x35 : 0xca)); ChangePciConfig1(Channel ? 0x7b : 0x73, a & ~(!(DeviceNumber & 1) ? 0x35 : 0xca));
return; return;
@ -1538,7 +1538,7 @@ l_ATA_SILICON_IMAGE_ID:
/*******/ /*******/
/* SiS */ /* SiS */
/*******/ /*******/
PULONG sis_modes; PULONG sis_modes = NULL;
static const ULONG sis_modes_new133[] = static const ULONG sis_modes_new133[] =
{ 0x28269008, 0x0c266008, 0x04263008, 0x0c0a3008, 0x05093008, { 0x28269008, 0x0c266008, 0x04263008, 0x0c0a3008, 0x05093008,
0x22196008, 0x0c0a3008, 0x05093008, 0x050939fc, 0x050936ac, 0x22196008, 0x0c0a3008, 0x05093008, 0x050939fc, 0x050936ac,
@ -1553,9 +1553,9 @@ l_ATA_SILICON_IMAGE_ID:
{ 0x00cb, 0x0067, 0x0044, 0x0033, 0x0031, 0x0044, 0x0033, 0x0031, { 0x00cb, 0x0067, 0x0044, 0x0033, 0x0031, 0x0044, 0x0033, 0x0031,
0x8b31, 0x8731, 0x8531, 0x8431, 0x8231, 0x8131 }; 0x8b31, 0x8731, 0x8531, 0x8431, 0x8231, 0x8131 };
ULONG reg; ULONG reg = 0;
UCHAR reg57; UCHAR reg57;
ULONG reg_size; ULONG reg_size = 0;
ULONG offs; ULONG offs;
switch(ChipType) { switch(ChipType) {
@ -1901,7 +1901,7 @@ hpt_timing(
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK; ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
//ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK; //ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
ULONG timing; ULONG timing = 0;
if(mode == ATA_PIO5) if(mode == ATA_PIO5)
mode = ATA_PIO4; mode = ATA_PIO4;

20
reactos/drivers/storage/ide/uniata/id_init.cpp
View file

@ -52,11 +52,11 @@ UniataChipDetectChannels(
) )
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
ULONG slotNumber = deviceExtension->slotNumber; //ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber; //ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff; ULONG VendorID = deviceExtension->DevID & 0xffff;
ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff; //ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
ULONG RevID = deviceExtension->RevID; //ULONG RevID = deviceExtension->RevID;
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK; ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
ULONG ChipFlags= deviceExtension->HwFlags & CHIPFLAG_MASK; ULONG ChipFlags= deviceExtension->HwFlags & CHIPFLAG_MASK;
@ -216,7 +216,7 @@ UniataChipDetect(
PCI_DEV_HW_SPEC_BM( 0730, 1039, 0x00, ATA_UDMA5, "SiS 730" , SIS100OLD ), PCI_DEV_HW_SPEC_BM( 0730, 1039, 0x00, ATA_UDMA5, "SiS 730" , SIS100OLD ),
PCI_DEV_HW_SPEC_BM( 0646, 1039, 0x00, ATA_UDMA6, "SiS 645DX", SIS133NEW ), PCI_DEV_HW_SPEC_BM( 0646, 1039, 0x00, ATA_UDMA6, "SiS 645DX", SIS133NEW ),
/* PCI_DEV_HW_SPEC_BM( 0645, 1039, 0x00, ATA_UDMA6, "SiS 645" , SIS133NEW ), /* PCI_DEV_HW_SPEC_BM( 0645, 1039, 0x00, ATA_UDMA6, "SiS 645" , SIS133NEW ),*/
/* PCI_DEV_HW_SPEC_BM( 0640, 1039, 0x00, ATA_UDMA4, "SiS 640" , SIS_SOUTH ),*/ /* PCI_DEV_HW_SPEC_BM( 0640, 1039, 0x00, ATA_UDMA4, "SiS 640" , SIS_SOUTH ),*/
PCI_DEV_HW_SPEC_BM( 0635, 1039, 0x00, ATA_UDMA5, "SiS 635" , SIS100NEW ), PCI_DEV_HW_SPEC_BM( 0635, 1039, 0x00, ATA_UDMA5, "SiS 635" , SIS100NEW ),
PCI_DEV_HW_SPEC_BM( 0633, 1039, 0x00, ATA_UDMA5, "SiS 633" , SIS100NEW ), PCI_DEV_HW_SPEC_BM( 0633, 1039, 0x00, ATA_UDMA5, "SiS 633" , SIS100NEW ),
@ -419,7 +419,7 @@ for_ugly_chips:
BaseIoAddressBM = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber, BaseIoAddressBM = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
4, 0, deviceExtension->NumberChannels*sizeof(IDE_BUSMASTER_REGISTERS)); 4, 0, deviceExtension->NumberChannels*sizeof(IDE_BUSMASTER_REGISTERS));
for(c=0; c<deviceExtension->NumberChannels; c++) { for(c=0; c<deviceExtension->NumberChannels; c++) {
ULONG unit01 = (c & 1); //ULONG unit01 = (c & 1);
ULONG unit10 = (c & 2); ULONG unit10 = (c & 2);
chan = &deviceExtension->chan[c]; chan = &deviceExtension->chan[c];
@ -987,7 +987,7 @@ AtapiRosbSouthBridgeFixup(
IN ULONG slotNumber IN ULONG slotNumber
) )
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; //PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PCI_COMMON_CONFIG pciData; PCI_COMMON_CONFIG pciData;
ULONG funcNumber; ULONG funcNumber;
ULONG busDataRead; ULONG busDataRead;
@ -1039,7 +1039,7 @@ AtapiAliSouthBridgeFixup(
IN ULONG c IN ULONG c
) )
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; //PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PCI_COMMON_CONFIG pciData; PCI_COMMON_CONFIG pciData;
ULONG funcNumber; ULONG funcNumber;
ULONG busDataRead; ULONG busDataRead;
@ -1174,7 +1174,7 @@ generic_cable80(
ULONG slotNumber = deviceExtension->slotNumber; ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber; ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK; //ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
PHW_CHANNEL chan; PHW_CHANNEL chan;
ULONG c; // logical channel (for Compatible Mode controllers) ULONG c; // logical channel (for Compatible Mode controllers)
UCHAR tmp8; UCHAR tmp8;
@ -1332,7 +1332,9 @@ AtapiChipInit(
ULONG slotNumber = deviceExtension->slotNumber; ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber; ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff; ULONG VendorID = deviceExtension->DevID & 0xffff;
#ifdef _DEBUG
ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff; ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
#endif
ULONG RevID = deviceExtension->RevID; ULONG RevID = deviceExtension->RevID;
// ULONG i; // ULONG i;
// BUSMASTER_CONTROLLER_INFORMATION* DevTypeInfo; // BUSMASTER_CONTROLLER_INFORMATION* DevTypeInfo;

21
reactos/drivers/storage/ide/uniata/id_probe.cpp
View file

@ -76,7 +76,6 @@ UniataEnumBusMasterController__(
VOID VOID
AtapiDoNothing(VOID) AtapiDoNothing(VOID)
{ {
ULONG i = 0;
return; return;
} // end AtapiDoNothing() } // end AtapiDoNothing()
@ -504,8 +503,8 @@ UniataEnumBusMasterController__(
/* if(known) { /* if(known) {
RtlCopyMemory(newBMListPtr, (PVOID)&(BusMasterAdapters[i]), sizeof(BUSMASTER_CONTROLLER_INFORMATION)); RtlCopyMemory(newBMListPtr, (PVOID)&(BusMasterAdapters[i]), sizeof(BUSMASTER_CONTROLLER_INFORMATION));
} else {*/ } else {*/
sprintf((PCHAR)vendorStrPtr, "%4.4x", VendorID); sprintf((PCHAR)vendorStrPtr, "%4.4x", (UINT32)VendorID);
sprintf((PCHAR)deviceStrPtr, "%4.4x", DeviceID); sprintf((PCHAR)deviceStrPtr, "%4.4x", (UINT32)DeviceID);
RtlCopyMemory(&(newBMListPtr->VendorIdStr), (PCHAR)vendorStrPtr, 4); RtlCopyMemory(&(newBMListPtr->VendorIdStr), (PCHAR)vendorStrPtr, 4);
RtlCopyMemory(&(newBMListPtr->DeviceIdStr), (PCHAR)deviceStrPtr, 4); RtlCopyMemory(&(newBMListPtr->DeviceIdStr), (PCHAR)deviceStrPtr, 4);
@ -874,7 +873,11 @@ UniataFindBusMasterController(
BOOLEAN found = FALSE; BOOLEAN found = FALSE;
BOOLEAN MasterDev; BOOLEAN MasterDev;
BOOLEAN simplexOnly = FALSE; BOOLEAN simplexOnly = FALSE;
#ifndef UNIATA_CORE
#ifdef UNIATA_INIT_ON_PROBE
BOOLEAN skip_find_dev = FALSE; BOOLEAN skip_find_dev = FALSE;
#endif
#endif
BOOLEAN AltInit = FALSE; BOOLEAN AltInit = FALSE;
SCSI_PHYSICAL_ADDRESS IoBasePort1; SCSI_PHYSICAL_ADDRESS IoBasePort1;
@ -1712,7 +1715,7 @@ UniataFindFakeBusMasterController(
) )
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PHW_CHANNEL chan = NULL; //PHW_CHANNEL chan = NULL;
// this buffer must be global for UNIATA_CORE build // this buffer must be global for UNIATA_CORE build
PCI_COMMON_CONFIG pciData; PCI_COMMON_CONFIG pciData;
@ -1743,8 +1746,8 @@ UniataFindFakeBusMasterController(
BOOLEAN found = FALSE; BOOLEAN found = FALSE;
BOOLEAN MasterDev; BOOLEAN MasterDev;
BOOLEAN simplexOnly = FALSE; BOOLEAN simplexOnly = FALSE;
BOOLEAN skip_find_dev = FALSE; //BOOLEAN skip_find_dev = FALSE;
BOOLEAN AltInit = FALSE; //BOOLEAN AltInit = FALSE;
PIDE_BUSMASTER_REGISTERS BaseIoAddressBM_0 = NULL; PIDE_BUSMASTER_REGISTERS BaseIoAddressBM_0 = NULL;
@ -1797,7 +1800,7 @@ UniataFindFakeBusMasterController(
&pciData, &pciData,
PCI_COMMON_HDR_LENGTH); PCI_COMMON_HDR_LENGTH);
if (busDataRead < PCI_COMMON_HDR_LENGTH) { if (busDataRead < (ULONG)PCI_COMMON_HDR_LENGTH) {
KdPrint2((PRINT_PREFIX "busDataRead < PCI_COMMON_HDR_LENGTH => SP_RETURN_ERROR\n")); KdPrint2((PRINT_PREFIX "busDataRead < PCI_COMMON_HDR_LENGTH => SP_RETURN_ERROR\n"));
goto exit_error; goto exit_error;
} }
@ -2207,7 +2210,7 @@ AtapiFindController(
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PHW_CHANNEL chan; PHW_CHANNEL chan;
PULONG adapterCount = (PULONG)Context; PULONG adapterCount = (PULONG)Context;
PUCHAR ioSpace; PUCHAR ioSpace = NULL;
ULONG i; ULONG i;
ULONG irq=0; ULONG irq=0;
ULONG portBase; ULONG portBase;
@ -2217,7 +2220,7 @@ AtapiFindController(
BOOLEAN preConfig = FALSE; BOOLEAN preConfig = FALSE;
// //
PIDE_REGISTERS_1 BaseIoAddress1; PIDE_REGISTERS_1 BaseIoAddress1;
PIDE_REGISTERS_2 BaseIoAddress2; PIDE_REGISTERS_2 BaseIoAddress2 = NULL;
// The following table specifies the ports to be checked when searching for // The following table specifies the ports to be checked when searching for
// an IDE controller. A zero entry terminates the search. // an IDE controller. A zero entry terminates the search.

4
reactos/drivers/storage/ide/uniata/id_sata.cpp
View file

@ -7,7 +7,7 @@ UniataSataConnect(
) )
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
ULONG Channel = deviceExtension->Channel + lChannel; //ULONG Channel = deviceExtension->Channel + lChannel;
PHW_CHANNEL chan = &deviceExtension->chan[lChannel]; PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
SATA_SSTATUS_REG SStatus; SATA_SSTATUS_REG SStatus;
ULONG i; ULONG i;
@ -126,7 +126,7 @@ UniataSataClearErr(
{ {
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension; PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PHW_CHANNEL chan = &deviceExtension->chan[lChannel]; PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK; //ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
SATA_SSTATUS_REG SStatus; SATA_SSTATUS_REG SStatus;
SATA_SERROR_REG SError; SATA_SERROR_REG SError;

3
reactos/drivers/storage/ide/uniata/ntddk_ex.h
View file

@ -6,7 +6,8 @@
#define ASSERT #define ASSERT
#else #else
#undef ASSERT #undef ASSERT
#define ASSERT //(x) if (!(x)) {RtlAssert("#x",__FILE__,__LINE__, ""); } //#define ASSERT //(x) if (!(x)) {RtlAssert("#x",__FILE__,__LINE__, ""); }
#define ASSERT(x) // FIXME: WTF!
#endif //__REACTOS__ #endif //__REACTOS__

2
reactos/drivers/storage/ide/uniata/uniata.rbuild
View file

@ -1,6 +1,6 @@
<?xml version="1.0"?> <?xml version="1.0"?>
<!DOCTYPE module SYSTEM "../../../../tools/rbuild/project.dtd"> <!DOCTYPE module SYSTEM "../../../../tools/rbuild/project.dtd">
<module name="uniata" type="kernelmodedriver" installbase="system32/drivers" allowwarnings="true" installname="uniata.sys"> <module name="uniata" type="kernelmodedriver" installbase="system32/drivers" installname="uniata.sys">
<bootstrap installbase="$(CDOUTPUT)" /> <bootstrap installbase="$(CDOUTPUT)" />
<include base="uniata">.</include> <include base="uniata">.</include>
<include base="uniata">inc</include> <include base="uniata">inc</include>

393
reactos/drivers/storage/ide/uniata/warningfixes.diff Normal file
View file

@ -0,0 +1,393 @@
Index: atapi.h
===================================================================
--- atapi.h (revision 38425)
+++ atapi.h (working copy)
@@ -138,6 +138,10 @@
#else // _DEBUG
+#ifdef KdPrint
+#undef KdPrint
+#endif
+
#define PRINT_PREFIX "UniATA: "
//#define KdPrint3(_x_) {if(LOG_ON_RAISED_IRQL_W2K || MajorVersion < 0x05 || KeGetCurrentIrql() <= 2){/*DbgPrint("%x: ", PsGetCurrentThread()) ;*/ DbgPrint _x_ ; if(g_LogToDisplay){ PrintNtConsole _x_ ;} }}
Index: id_ata.cpp
===================================================================
--- id_ata.cpp (revision 38425)
+++ id_ata.cpp (working copy)
@@ -1864,7 +1864,9 @@
ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff;
+#ifdef _DEBUG
ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
+#endif
//ULONG RevID = deviceExtension->RevID;
ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
UCHAR tmp8;
Index: id_badblock.cpp
===================================================================
--- id_badblock.cpp (revision 38425)
+++ id_badblock.cpp (working copy)
@@ -159,7 +159,11 @@
L"UniATA\\Parameters\\BadBlocks",
QueryTable, 0, 0);
+#ifdef _DEBUG
KdPrint(( "InitBadBlocks returned: %#x\n", status));
+#else
+ UNREFERENCED_PARAMETER(status);
+#endif
} else {
KdPrint(( "InitBadBlocks local\n"));
Index: id_dma.cpp
===================================================================
--- id_dma.cpp (revision 38425)
+++ id_dma.cpp (working copy)
@@ -219,7 +219,7 @@
PHW_CHANNEL chan = &(deviceExtension->chan[lChannel]);
PATA_REQ AtaReq = (PATA_REQ)(Srb->SrbExtension);
BOOLEAN use_DB_IO = FALSE;
- BOOLEAN use_AHCI = FALSE;
+ //BOOLEAN use_AHCI = FALSE;
ULONG orig_count = count;
ULONG max_entries = (deviceExtension->HwFlags & UNIATA_AHCI) ? ATA_AHCI_DMA_ENTRIES : ATA_DMA_ENTRIES;
@@ -281,7 +281,7 @@
if(!dma_count || ((LONG)(dma_base) == -1)) {
KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No 1st block\n" ));
//AtaReq->dma_base = NULL;
- AtaReq->ahci_base64 = NULL;
+ AtaReq->ahci_base64 = (ULONGLONG)NULL;
return FALSE;
}
@@ -303,7 +303,7 @@
if (i >= max_entries) {
KdPrint2((PRINT_PREFIX "too many segments in DMA table\n" ));
//AtaReq->dma_base = NULL;
- AtaReq->ahci_base64 = NULL;
+ AtaReq->ahci_base64 = (ULONGLONG)NULL;
return FALSE;
}
KdPrint2((PRINT_PREFIX " get Phys(data[n]=%x)\n", data ));
@@ -321,7 +321,7 @@
} else
if(!dma_count || !dma_base || ((LONG)(dma_base) == -1)) {
//AtaReq->dma_base = NULL;
- AtaReq->ahci_base64 = NULL;
+ AtaReq->ahci_base64 = (ULONGLONG)NULL;
KdPrint2((PRINT_PREFIX "AtapiDmaSetup: No NEXT block\n" ));
return FALSE;
}
@@ -612,7 +612,7 @@
}
if((deviceExtension->HbaCtrlFlags & HBAFLAGS_DMA_DISABLED_LBA48) &&
- (AtaReq->lba >= ATA_MAX_LBA28) &&
+ (AtaReq->lba >= (LONGLONG)ATA_MAX_LBA28) &&
(LunExt->TransferMode > ATA_PIO5) ) {
KdPrint2((PRINT_PREFIX
"AtapiDmaReinit: FORCE_DOWNRATE on Device %d for LBA48\n", ldev & 1));
@@ -623,7 +623,7 @@
if(AtaReq->Flags & REQ_FLAG_FORCE_DOWNRATE) {
KdPrint2((PRINT_PREFIX
"AtapiDmaReinit: FORCE_DOWNRATE on Device %d\n", ldev & 1));
- if(AtaReq->lba >= ATA_MAX_LBA28) {
+ if(AtaReq->lba >= (LONGLONG)ATA_MAX_LBA28) {
limit_lba48:
LunExt->DeviceFlags |= REQ_FLAG_FORCE_DOWNRATE_LBA48;
limit_pio:
@@ -1046,7 +1046,7 @@
/* set PIO mode timings */
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
if((apiomode >= 0) && (ChipType != VIA133)) {
- SetPciConfig1(reg-0x08, via_pio[apiomode]);
+ SetPciConfig1(reg-0x08, via_pio[(UCHAR)apiomode]);
}
via82c_timing(deviceExtension, dev, ATA_PIO0 + apiomode);
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
@@ -1067,18 +1067,18 @@
apiomode = 4;
for(i=udmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_UDMA0 + i)) {
- AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[udmamode]);
+ AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[(UCHAR)udmamode]);
return;
}
}
for(i=wdmamode; i>=0; i--) {
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_WDMA0 + i)) {
- AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[wdmamode]);
+ AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[(UCHAR)wdmamode]);
return;
}
}
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) {
- AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[apiomode]);
+ AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[(UCHAR)apiomode]);
return;
}
return;
@@ -1113,7 +1113,7 @@
}
if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) {
ChangePciConfig4(0x44 + (dev * 8), a | 0x80000000);
- SetPciConfig4(0x40 + (dev * 8), nat_piotiming[apiomode]);
+ SetPciConfig4(0x40 + (dev * 8), nat_piotiming[(UCHAR)apiomode]);
return;
}
/* Use GENERIC PIO */
@@ -1413,7 +1413,7 @@
// 44
GetPciConfig4(0x44, reg44);
reg44 = (reg44 & ~(0xff << bit_offset)) |
- (sw_dma_modes[wdmamode] << bit_offset);
+ (sw_dma_modes[(UCHAR)wdmamode] << bit_offset);
SetPciConfig4(0x44, reg44);
// 40
GetPciConfig4(0x40, reg40);
@@ -1439,7 +1439,7 @@
// 40
GetPciConfig4(0x40, reg40);
reg40 = (reg40 & ~(0xff << bit_offset)) |
- (sw_pio_modes[apiomode] << bit_offset);
+ (sw_pio_modes[(UCHAR)apiomode] << bit_offset);
SetPciConfig4(0x40, reg40);
return;
break; }
@@ -1527,7 +1527,7 @@
/* set PIO mode timings */
AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode);
- SetPciConfig1(treg, cmd_pio_modes[apiomode]);
+ SetPciConfig1(treg, cmd_pio_modes[(UCHAR)apiomode]);
ChangePciConfig1(Channel ? 0x7b : 0x73, a & ~(!(DeviceNumber & 1) ? 0x35 : 0xca));
return;
@@ -1538,7 +1538,7 @@
/*******/
/* SiS */
/*******/
- PULONG sis_modes;
+ PULONG sis_modes = NULL;
static const ULONG sis_modes_new133[] =
{ 0x28269008, 0x0c266008, 0x04263008, 0x0c0a3008, 0x05093008,
0x22196008, 0x0c0a3008, 0x05093008, 0x050939fc, 0x050936ac,
@@ -1553,9 +1553,9 @@
{ 0x00cb, 0x0067, 0x0044, 0x0033, 0x0031, 0x0044, 0x0033, 0x0031,
0x8b31, 0x8731, 0x8531, 0x8431, 0x8231, 0x8131 };
- ULONG reg;
+ ULONG reg = 0;
UCHAR reg57;
- ULONG reg_size;
+ ULONG reg_size = 0;
ULONG offs;
switch(ChipType) {
@@ -1901,7 +1901,7 @@
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
//ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
- ULONG timing;
+ ULONG timing = 0;
if(mode == ATA_PIO5)
mode = ATA_PIO4;
Index: id_init.cpp
===================================================================
--- id_init.cpp (revision 38425)
+++ id_init.cpp (working copy)
@@ -52,11 +52,11 @@
)
{
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
- ULONG slotNumber = deviceExtension->slotNumber;
- ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
+ //ULONG slotNumber = deviceExtension->slotNumber;
+ //ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff;
- ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
- ULONG RevID = deviceExtension->RevID;
+ //ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
+ //ULONG RevID = deviceExtension->RevID;
ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
ULONG ChipFlags= deviceExtension->HwFlags & CHIPFLAG_MASK;
@@ -216,7 +216,7 @@
PCI_DEV_HW_SPEC_BM( 0730, 1039, 0x00, ATA_UDMA5, "SiS 730" , SIS100OLD ),
PCI_DEV_HW_SPEC_BM( 0646, 1039, 0x00, ATA_UDMA6, "SiS 645DX", SIS133NEW ),
-/* PCI_DEV_HW_SPEC_BM( 0645, 1039, 0x00, ATA_UDMA6, "SiS 645" , SIS133NEW ),
+/* PCI_DEV_HW_SPEC_BM( 0645, 1039, 0x00, ATA_UDMA6, "SiS 645" , SIS133NEW ),*/
/* PCI_DEV_HW_SPEC_BM( 0640, 1039, 0x00, ATA_UDMA4, "SiS 640" , SIS_SOUTH ),*/
PCI_DEV_HW_SPEC_BM( 0635, 1039, 0x00, ATA_UDMA5, "SiS 635" , SIS100NEW ),
PCI_DEV_HW_SPEC_BM( 0633, 1039, 0x00, ATA_UDMA5, "SiS 633" , SIS100NEW ),
@@ -419,7 +419,7 @@
BaseIoAddressBM = AtapiGetIoRange(HwDeviceExtension, ConfigInfo, pciData, SystemIoBusNumber,
4, 0, deviceExtension->NumberChannels*sizeof(IDE_BUSMASTER_REGISTERS));
for(c=0; c<deviceExtension->NumberChannels; c++) {
- ULONG unit01 = (c & 1);
+ //ULONG unit01 = (c & 1);
ULONG unit10 = (c & 2);
chan = &deviceExtension->chan[c];
@@ -987,7 +987,7 @@
IN ULONG slotNumber
)
{
- PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
+ //PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PCI_COMMON_CONFIG pciData;
ULONG funcNumber;
ULONG busDataRead;
@@ -1039,7 +1039,7 @@
IN ULONG c
)
{
- PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
+ //PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PCI_COMMON_CONFIG pciData;
ULONG funcNumber;
ULONG busDataRead;
@@ -1174,7 +1174,7 @@
ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
- ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
+ //ULONG ChipType = deviceExtension->HwFlags & CHIPTYPE_MASK;
PHW_CHANNEL chan;
ULONG c; // logical channel (for Compatible Mode controllers)
UCHAR tmp8;
@@ -1332,7 +1332,9 @@
ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG VendorID = deviceExtension->DevID & 0xffff;
+#ifdef _DEBUG
ULONG DeviceID = (deviceExtension->DevID >> 16) & 0xffff;
+#endif
ULONG RevID = deviceExtension->RevID;
// ULONG i;
// BUSMASTER_CONTROLLER_INFORMATION* DevTypeInfo;
Index: id_probe.cpp
===================================================================
--- id_probe.cpp (revision 38425)
+++ id_probe.cpp (working copy)
@@ -76,7 +76,6 @@
VOID
AtapiDoNothing(VOID)
{
- ULONG i = 0;
return;
} // end AtapiDoNothing()
@@ -504,8 +503,8 @@
/* if(known) {
RtlCopyMemory(newBMListPtr, (PVOID)&(BusMasterAdapters[i]), sizeof(BUSMASTER_CONTROLLER_INFORMATION));
} else {*/
- sprintf((PCHAR)vendorStrPtr, "%4.4x", VendorID);
- sprintf((PCHAR)deviceStrPtr, "%4.4x", DeviceID);
+ sprintf((PCHAR)vendorStrPtr, "%4.4x", (UINT32)VendorID);
+ sprintf((PCHAR)deviceStrPtr, "%4.4x", (UINT32)DeviceID);
RtlCopyMemory(&(newBMListPtr->VendorIdStr), (PCHAR)vendorStrPtr, 4);
RtlCopyMemory(&(newBMListPtr->DeviceIdStr), (PCHAR)deviceStrPtr, 4);
@@ -874,7 +873,11 @@
BOOLEAN found = FALSE;
BOOLEAN MasterDev;
BOOLEAN simplexOnly = FALSE;
+#ifndef UNIATA_CORE
+#ifdef UNIATA_INIT_ON_PROBE
BOOLEAN skip_find_dev = FALSE;
+#endif
+#endif
BOOLEAN AltInit = FALSE;
SCSI_PHYSICAL_ADDRESS IoBasePort1;
@@ -1712,7 +1715,7 @@
)
{
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
- PHW_CHANNEL chan = NULL;
+ //PHW_CHANNEL chan = NULL;
// this buffer must be global for UNIATA_CORE build
PCI_COMMON_CONFIG pciData;
@@ -1743,8 +1746,8 @@
BOOLEAN found = FALSE;
BOOLEAN MasterDev;
BOOLEAN simplexOnly = FALSE;
- BOOLEAN skip_find_dev = FALSE;
- BOOLEAN AltInit = FALSE;
+ //BOOLEAN skip_find_dev = FALSE;
+ //BOOLEAN AltInit = FALSE;
PIDE_BUSMASTER_REGISTERS BaseIoAddressBM_0 = NULL;
@@ -1797,7 +1800,7 @@
&pciData,
PCI_COMMON_HDR_LENGTH);
- if (busDataRead < PCI_COMMON_HDR_LENGTH) {
+ if (busDataRead < (ULONG)PCI_COMMON_HDR_LENGTH) {
KdPrint2((PRINT_PREFIX "busDataRead < PCI_COMMON_HDR_LENGTH => SP_RETURN_ERROR\n"));
goto exit_error;
}
@@ -2207,7 +2210,7 @@
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PHW_CHANNEL chan;
PULONG adapterCount = (PULONG)Context;
- PUCHAR ioSpace;
+ PUCHAR ioSpace = NULL;
ULONG i;
ULONG irq=0;
ULONG portBase;
@@ -2217,7 +2220,7 @@
BOOLEAN preConfig = FALSE;
//
PIDE_REGISTERS_1 BaseIoAddress1;
- PIDE_REGISTERS_2 BaseIoAddress2;
+ PIDE_REGISTERS_2 BaseIoAddress2 = NULL;
// The following table specifies the ports to be checked when searching for
// an IDE controller. A zero entry terminates the search.
Index: id_sata.cpp
===================================================================
--- id_sata.cpp (revision 38425)
+++ id_sata.cpp (working copy)
@@ -7,7 +7,7 @@
)
{
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
- ULONG Channel = deviceExtension->Channel + lChannel;
+ //ULONG Channel = deviceExtension->Channel + lChannel;
PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
SATA_SSTATUS_REG SStatus;
ULONG i;
@@ -126,7 +126,7 @@
{
PHW_DEVICE_EXTENSION deviceExtension = (PHW_DEVICE_EXTENSION)HwDeviceExtension;
PHW_CHANNEL chan = &deviceExtension->chan[lChannel];
- ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
+ //ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
SATA_SSTATUS_REG SStatus;
SATA_SERROR_REG SError;
Index: ntddk_ex.h
===================================================================
--- ntddk_ex.h (revision 38425)
+++ ntddk_ex.h (working copy)
@@ -6,7 +6,8 @@
#define ASSERT
#else
#undef ASSERT
-#define ASSERT //(x) if (!(x)) {RtlAssert("#x",__FILE__,__LINE__, ""); }
+//#define ASSERT //(x) if (!(x)) {RtlAssert("#x",__FILE__,__LINE__, ""); }
+#define ASSERT(x) // FIXME: WTF!
#endif //__REACTOS__