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Added GetInterruptVector() routine to PCI bus handler.
svn path=/trunk/; revision=2357
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parent
01009ce267
commit
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1 changed files with 40 additions and 25 deletions
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@ -1,4 +1,4 @@
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/* $Id: pci.c,v 1.1 2001/08/21 20:18:27 chorns Exp $
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/* $Id: pci.c,v 1.2 2001/11/07 02:27:33 ekohl Exp $
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -449,46 +449,61 @@ GetBusConfigType(VOID)
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}
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}
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VOID HalpInitPciBus (VOID)
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static ULONG STDCALL
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HalpGetPciInterruptVector(PVOID BusHandler,
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ULONG BusNumber,
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ULONG BusInterruptLevel,
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ULONG BusInterruptVector,
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PKIRQL Irql,
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PKAFFINITY Affinity)
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{
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{
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PBUS_HANDLER BusHandler;
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*Irql = HIGH_LEVEL - BusInterruptVector;
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*Affinity = 0xFFFFFFFF;
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return BusInterruptVector;
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}
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DPRINT("HalpInitPciBus() called.\n");
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BusConfigType = GetBusConfigType();
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VOID
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if (BusConfigType == 0)
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HalpInitPciBus(VOID)
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return;
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{
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PBUS_HANDLER BusHandler;
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DPRINT("Bus configuration %lu used\n", BusConfigType);
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DPRINT("HalpInitPciBus() called.\n");
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/* pci bus (bus 0) handler */
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BusConfigType = GetBusConfigType();
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BusHandler = HalpAllocateBusHandler(PCIBus,
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if (BusConfigType == 0)
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PCIConfiguration,
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return;
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0);
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BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
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DPRINT("Bus configuration %lu used\n", BusConfigType);
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BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
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// BusHandler->GetInterruptVector =
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/* pci bus (bus 0) handler */
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// (pGetInterruptVector)HalpGetPciInterruptVector;
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BusHandler = HalpAllocateBusHandler(PCIBus,
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PCIConfiguration,
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0);
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BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
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BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
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BusHandler->GetInterruptVector =
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(pGetInterruptVector)HalpGetPciInterruptVector;
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// BusHandler->AdjustResourceList =
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// BusHandler->AdjustResourceList =
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// (pGetSetBusData)HalpAdjustPciResourceList;
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// (pGetSetBusData)HalpAdjustPciResourceList;
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// BusHandler->AssignSlotResources =
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// BusHandler->AssignSlotResources =
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// (pGetSetBusData)HalpAssignPciSlotResources;
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// (pGetSetBusData)HalpAssignPciSlotResources;
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/* agp bus (bus 1) handler */
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/* agp bus (bus 1) handler */
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BusHandler = HalpAllocateBusHandler(PCIBus,
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BusHandler = HalpAllocateBusHandler(PCIBus,
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PCIConfiguration,
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PCIConfiguration,
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1);
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1);
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BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
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BusHandler->GetBusData = (pGetSetBusData)HalpGetPciData;
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BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
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BusHandler->SetBusData = (pGetSetBusData)HalpSetPciData;
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// BusHandler->GetInterruptVector =
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BusHandler->GetInterruptVector =
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// (pGetInterruptVector)HalpGetPciInterruptVector;
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(pGetInterruptVector)HalpGetPciInterruptVector;
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// BusHandler->AdjustResourceList =
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// BusHandler->AdjustResourceList =
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// (pGetSetBusData)HalpAdjustPciResourceList;
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// (pGetSetBusData)HalpAdjustPciResourceList;
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// BusHandler->AssignSlotResources =
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// BusHandler->AssignSlotResources =
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// (pGetSetBusData)HalpAssignPciSlotResources;
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// (pGetSetBusData)HalpAssignPciSlotResources;
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DPRINT("HalpInitPciBus() finished.\n");
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DPRINT("HalpInitPciBus() finished.\n");
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}
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}
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/* EOF */
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/* EOF */
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