[NTOS/MM]

- Implement ProtectionMask validation in MiFlushTbAndCapture for cached and non-cached PFNs.

svn path=/trunk/; revision=57030
This commit is contained in:
Aleksey Bragin 2012-08-02 22:34:51 +00:00
parent 251ea7ec52
commit 6535249726

View file

@ -1602,6 +1602,7 @@ MiFlushTbAndCapture(IN PMMVAD FoundVad,
{ {
MMPTE TempPte, PreviousPte; MMPTE TempPte, PreviousPte;
KIRQL OldIrql; KIRQL OldIrql;
BOOLEAN RebuildPte = FALSE;
// //
// User for sanity checking later on // User for sanity checking later on
@ -1618,11 +1619,45 @@ MiFlushTbAndCapture(IN PMMVAD FoundVad,
OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock); OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
// //
// We don't support I/O mappings in this path yet, and only cached memory // We don't support I/O mappings in this path yet
// //
ASSERT(Pfn1 != NULL); ASSERT(Pfn1 != NULL);
ASSERT(Pfn1->u3.e1.CacheAttribute == MiCached); ASSERT(Pfn1->u3.e1.CacheAttribute != MiWriteCombined);
ASSERT((ProtectionMask & (MM_NOCACHE | MM_NOACCESS)) == 0);
//
// Make sure new protection mask doesn't get in conflict and fix it if it does
//
if (Pfn1->u3.e1.CacheAttribute == MiCached)
{
//
// This is a cached PFN
//
if (ProtectionMask & (MM_NOCACHE | MM_NOACCESS))
{
RebuildPte = TRUE;
ProtectionMask &= ~(MM_NOCACHE | MM_NOACCESS);
}
}
else if (Pfn1->u3.e1.CacheAttribute == MiNonCached)
{
//
// This is a non-cached PFN
//
if ((ProtectionMask & (MM_NOCACHE | MM_NOACCESS)) != MM_NOCACHE)
{
RebuildPte = TRUE;
ProtectionMask &= ~MM_NOACCESS;
ProtectionMask |= MM_NOCACHE;
}
}
if (RebuildPte)
{
MI_MAKE_HARDWARE_PTE_USER(&TempPte,
PointerPte,
ProtectionMask,
PreviousPte.u.Hard.PageFrameNumber);
}
// //
// Write the new PTE, making sure we are only changing the bits // Write the new PTE, making sure we are only changing the bits