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[NTOS/MM]
- Implement ProtectionMask validation in MiFlushTbAndCapture for cached and non-cached PFNs. svn path=/trunk/; revision=57030
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251ea7ec52
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1 changed files with 38 additions and 3 deletions
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@ -1602,6 +1602,7 @@ MiFlushTbAndCapture(IN PMMVAD FoundVad,
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{
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MMPTE TempPte, PreviousPte;
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KIRQL OldIrql;
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BOOLEAN RebuildPte = FALSE;
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//
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// User for sanity checking later on
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@ -1618,11 +1619,45 @@ MiFlushTbAndCapture(IN PMMVAD FoundVad,
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OldIrql = KeAcquireQueuedSpinLock(LockQueuePfnLock);
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//
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// We don't support I/O mappings in this path yet, and only cached memory
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// We don't support I/O mappings in this path yet
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//
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ASSERT(Pfn1 != NULL);
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ASSERT(Pfn1->u3.e1.CacheAttribute == MiCached);
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ASSERT((ProtectionMask & (MM_NOCACHE | MM_NOACCESS)) == 0);
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ASSERT(Pfn1->u3.e1.CacheAttribute != MiWriteCombined);
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//
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// Make sure new protection mask doesn't get in conflict and fix it if it does
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//
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if (Pfn1->u3.e1.CacheAttribute == MiCached)
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{
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//
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// This is a cached PFN
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//
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if (ProtectionMask & (MM_NOCACHE | MM_NOACCESS))
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{
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RebuildPte = TRUE;
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ProtectionMask &= ~(MM_NOCACHE | MM_NOACCESS);
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}
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}
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else if (Pfn1->u3.e1.CacheAttribute == MiNonCached)
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{
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//
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// This is a non-cached PFN
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//
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if ((ProtectionMask & (MM_NOCACHE | MM_NOACCESS)) != MM_NOCACHE)
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{
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RebuildPte = TRUE;
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ProtectionMask &= ~MM_NOACCESS;
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ProtectionMask |= MM_NOCACHE;
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}
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}
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if (RebuildPte)
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{
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MI_MAKE_HARDWARE_PTE_USER(&TempPte,
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PointerPte,
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ProtectionMask,
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PreviousPte.u.Hard.PageFrameNumber);
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}
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//
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// Write the new PTE, making sure we are only changing the bits
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