* Sync with v0.42i2.

svn path=/trunk/; revision=57053
This commit is contained in:
Amine Khaldi 2012-08-08 01:17:53 +00:00
parent aeb9b31348
commit 63dcafd315
7 changed files with 54 additions and 27 deletions

View file

@ -192,6 +192,7 @@ typedef struct _IDE_AHCI_REGISTERS {
#define AHCI_CAP_PMD 0x00008000
#define AHCI_CAP_SPM 0x00020000
#define AHCI_CAP_SAM 0x00040000
#define AHCI_CAP_ISS_MASK 0x00f00000
#define AHCI_CAP_SCLO 0x01000000
#define AHCI_CAP_SNTF 0x20000000
#define AHCI_CAP_NCQ 0x40000000

View file

@ -508,10 +508,11 @@ WaitOnBusy(
ULONG i;
UCHAR Status;
GetStatus(chan, Status);
for (i=0; i<g_opt_WaitBusyCount; i++) {
GetStatus(chan, Status);
if (Status & IDE_STATUS_BUSY) {
AtapiStallExecution(g_opt_WaitBusyDelay);
GetStatus(chan, Status);
continue;
} else {
break;
@ -2069,7 +2070,7 @@ AtapiResetController__(
KdPrint2((PRINT_PREFIX "AtapiResetController: Reset channel %d\n", j));
chan = &(deviceExtension->chan[j]);
MaxLuns = chan->NumberLuns;
KdPrint2((PRINT_PREFIX " CompleteType %#x, Luns %d, chan %#x\n", CompleteType, MaxLuns, chan));
KdPrint2((PRINT_PREFIX " CompleteType %#x, Luns %d, chan %#x, sptr %#x\n", CompleteType, MaxLuns, chan, &chan));
//MaxLuns = (chan->ChannelCtrlFlags & CTRFLAGS_NO_SLAVE) ? 1 : 2;
if(CompleteType != RESET_COMPLETE_NONE) {
#ifndef UNIATA_CORE
@ -2077,11 +2078,12 @@ AtapiResetController__(
PATA_REQ AtaReq = (PATA_REQ)(CurSrb->SrbExtension);
KdPrint2((PRINT_PREFIX "AtapiResetController: pending SRB %#x\n", CurSrb));
KdPrint2((PRINT_PREFIX "AtapiResetController: pending SRB %#x, chan %#x\n", CurSrb, chan));
// Check and see if we are processing an internal srb
if (AtaReq->OriginalSrb) {
KdPrint2((PRINT_PREFIX " restore original SRB %#x\n", AtaReq->OriginalSrb));
AtaReq->Srb = AtaReq->OriginalSrb;
CurSrb->SrbExtension = NULL;
AtaReq->OriginalSrb = NULL;
// NOTE: internal SRB doesn't get to SRB queue !!!
CurSrb = AtaReq->Srb;
@ -2104,6 +2106,7 @@ AtapiResetController__(
if (CurSrb->SenseInfoBuffer) {
PSENSE_DATA senseBuffer = (PSENSE_DATA)CurSrb->SenseInfoBuffer;
KdPrint2((PRINT_PREFIX " senseBuffer %#x, chan %#x\n", senseBuffer, chan));
senseBuffer->ErrorCode = 0x70;
senseBuffer->Valid = 1;
@ -2125,6 +2128,7 @@ AtapiResetController__(
AtaReq->WordsLeft = 0;
AtaReq->DataBuffer = NULL;
AtaReq->TransferLength = 0;
KdPrint2((PRINT_PREFIX "chan %#x\n", chan));
ScsiPortNotification(RequestComplete,
deviceExtension,
@ -2161,7 +2165,7 @@ AtapiResetController__(
AtapiDisableInterrupts(deviceExtension, j);
UniataAhciReset(HwDeviceExtension, j);
} else {
KdPrint2((PRINT_PREFIX " ATA path\n"));
KdPrint2((PRINT_PREFIX " ATA path, chan %#x\n", chan));
KdPrint2((PRINT_PREFIX " disable intr (0)\n"));
AtapiDisableInterrupts(deviceExtension, j);
KdPrint2((PRINT_PREFIX " done\n"));
@ -2170,8 +2174,9 @@ AtapiResetController__(
ULONG mask;
ULONG pshift;
ULONG timeout;
if(!(ChipFlags & UNIATA_SATA))
if(!(ChipFlags & UNIATA_SATA)) {
goto default_reset;
}
if(!UniataIsSATARangeAvailable(deviceExtension, j)) {
goto default_reset;
}
@ -3917,7 +3922,7 @@ AtapiCheckInterrupt__(
UCHAR dma_status = 0;
UCHAR reg8 = 0;
ULONG reg32 = 0;
UCHAR statusByte;
UCHAR statusByte = 0;
ULONG slotNumber = deviceExtension->slotNumber;
ULONG SystemIoBusNumber = deviceExtension->SystemIoBusNumber;
ULONG ChipFlags = deviceExtension->HwFlags & CHIPFLAG_MASK;
@ -5017,17 +5022,22 @@ IntrPrepareResetController:
KdPrint2((PRINT_PREFIX "AtapiInterrupt: i-reason=%d, status=%#x\n", interruptReason, statusByte));
if(deviceExtension->HwFlags & UNIATA_AHCI) {
KdPrint2((PRINT_PREFIX " AHCI path, WordsTransfered %x, WordsLeft %x\n", AtaReq->WordsTransfered, AtaReq->WordsLeft));
if(chan->AhciLastIS & ATA_AHCI_P_IX_OF) {
status = SRB_STATUS_DATA_OVERRUN;
/* if(chan->AhciLastIS & ATA_AHCI_P_IX_OF) {
//status = SRB_STATUS_DATA_OVERRUN;
DataOverrun = TRUE;
} else {
status = SRB_STATUS_SUCCESS;
}
}*/
if(AtaReq->WordsTransfered >= AtaReq->WordsLeft) {
AtaReq->WordsLeft = 0;
} else {
AtaReq->WordsLeft -= AtaReq->WordsTransfered;
}
if(AtaReq->WordsLeft) {
status = SRB_STATUS_DATA_OVERRUN;
} else {
status = SRB_STATUS_SUCCESS;
}
chan->ChannelCtrlFlags &= ~CTRFLAGS_DMA_OPERATION;
goto CompleteRequest;
} else
@ -6781,6 +6791,7 @@ GetLba2:
// DEBUG !!!! for TEST ONLY
KdPrint2((PRINT_PREFIX "AtapiSendCommand: force use dma (ahci)\n"));
use_dma = TRUE;
goto setup_dma;
} else
if(Srb->Cdb[0] == SCSIOP_REQUEST_SENSE) {
KdPrint2((PRINT_PREFIX "AtapiSendCommand: SCSIOP_REQUEST_SENSE, no DMA setup\n"));
@ -6839,6 +6850,7 @@ call_dma_setup:
break;
}
// try setup DMA
setup_dma:
if(use_dma) {
if(deviceExtension->HwFlags & UNIATA_AHCI) {
KdPrint2((PRINT_PREFIX "AtapiSendCommand: use dma (ahci)\n"));
@ -7625,11 +7637,6 @@ default_no_prep:
LunExt->IdentifyData.NumberOfCylinders;
}
lba--;
//((PREAD_CAPACITY_DATA)Srb->DataBuffer)->LogicalBlockAddress =
// (((PUCHAR)&i)[0] << 24) | (((PUCHAR)&i)[1] << 16) |
// (((PUCHAR)&i)[2] << 8) | ((PUCHAR)&i)[3];
MOV_QD_SWP( ((PREAD_CAPACITY16_DATA)Srb->DataBuffer)->LogicalBlockAddress, lba );
KdPrint2((PRINT_PREFIX
@ -9815,6 +9822,8 @@ BuildMechanismStatusSrb(
cdb->MECH_STATUS.OperationCode = SCSIOP_MECHANISM_STATUS;
cdb->MECH_STATUS.AllocationLength[1] = sizeof(MECHANICAL_STATUS_INFORMATION_HEADER);
KdPrint2((PRINT_PREFIX " MechanismStatusSrb %#x\n", srb));
return srb;
} // end BuildMechanismStatusSrb()
@ -9857,6 +9866,8 @@ BuildRequestSenseSrb (
cdb->CDB6INQUIRY.OperationCode = SCSIOP_REQUEST_SENSE;
cdb->CDB6INQUIRY.AllocationLength = sizeof(SENSE_DATA);
KdPrint2((PRINT_PREFIX " RequestSenseSrb %#x\n", srb));
return srb;
} // end BuildRequestSenseSrb()

View file

@ -996,7 +996,9 @@ AtapiDmaInit(
/****************/
KdPrint2((PRINT_PREFIX "SATA Generic\n"));
if(udmamode > 5) {
if((udmamode >= 5) || (ChipFlags & UNIATA_AHCI) || chan->MaxTransferMode >= ATA_SA150) {
/* some drives report UDMA6, some UDMA5 */
/* ATAPI may not have SataCapabilities set in IDENTIFY DATA */
if(LunExt->IdentifyData.SataCapabilities != 0x0000 &&
LunExt->IdentifyData.SataCapabilities != 0xffff) {
//udmamode = min(udmamode, 6);

View file

@ -2162,10 +2162,10 @@ UniataConnectIntr2(
KdPrint2((PRINT_PREFIX "Multichannel native mode, go...\n"));
#ifndef UNIATA_USE_XXableInterrupts
// If we raise IRQL to TIMER value, other interrupt cannot occure on the same CPU
if(KeNumberProcessors < 2) {
/* if(KeNumberProcessors < 2) {
KdPrint2((PRINT_PREFIX "Unnecessary (?), UP machine\n"));
//return STATUS_SUCCESS;
}
}*/
#endif //UNIATA_USE_XXableInterrupts
} else {
KdPrint2((PRINT_PREFIX "Unnecessary\n"));

View file

@ -70,6 +70,15 @@ UniataSataConnect(
SStatus.SPD == SStatus_SPD_Gen3) {
chan->lun[0]->TransferMode = ATA_SA150 + (UCHAR)(SStatus.SPD - 1);
KdPrint2((PRINT_PREFIX "SATA TransferMode %#x\n", chan->lun[0]->TransferMode));
if(chan->MaxTransferMode < chan->lun[0]->TransferMode) {
KdPrint2((PRINT_PREFIX "SATA upd chan TransferMode\n"));
chan->MaxTransferMode = chan->lun[0]->TransferMode;
}
if(deviceExtension->MaxTransferMode < chan->lun[0]->TransferMode) {
KdPrint2((PRINT_PREFIX "SATA upd controller TransferMode\n"));
deviceExtension->MaxTransferMode = chan->lun[0]->TransferMode;
}
break;
}
AtapiStallExecution(10000);
@ -664,6 +673,9 @@ UniataAhciInit(
BaseMemAddress = deviceExtension->BaseIoAHCI_0.Addr;
MemIo = deviceExtension->BaseIoAHCI_0.MemIo;
deviceExtension->MaxTransferMode = ATA_SA150+(((CAP & AHCI_CAP_ISS_MASK) >> 20)-1);
KdPrint2((PRINT_PREFIX " SATA Gen %d\n", ((CAP & AHCI_CAP_ISS_MASK) >> 20) ));
for(c=0; c<deviceExtension->NumberChannels; c++) {
chan = &deviceExtension->chan[c];
offs = sizeof(IDE_AHCI_REGISTERS) + c*sizeof(IDE_AHCI_PORT_REGISTERS);
@ -825,6 +837,7 @@ UniataAhciDetect(
KdPrint2((PRINT_PREFIX " AHCI version %#x.%02x controller with %d ports (mask %#x) detected\n",
v_Mj, v_Mn,
NumberChannels, PI));
KdPrint((" AHCI SATA Gen %d\n", (((CAP & AHCI_CAP_ISS_MASK) >> 20)) ));
if(CAP & AHCI_CAP_SPM) {
KdPrint2((PRINT_PREFIX " PM supported\n"));
@ -865,7 +878,7 @@ UniataAhciDetect(
deviceExtension->DmaSegmentAlignmentMask = -1; // no restrictions
deviceExtension->BusMaster = DMA_MODE_AHCI;
deviceExtension->MaxTransferMode = max(deviceExtension->MaxTransferMode, ATA_SA150);
deviceExtension->MaxTransferMode = max(deviceExtension->MaxTransferMode, ATA_SA150+(((CAP & AHCI_CAP_ISS_MASK) >> 20)-1) );
return TRUE;
} // end UniataAhciDetect()
@ -1190,11 +1203,11 @@ UniataAhciSendPIOCommand(
UCHAR statusByte;
PATA_REQ AtaReq;
ULONG fis_size;
ULONG tag=0;
//ULONG tag=0;
//PIDE_AHCI_CMD AHCI_CMD = &(chan->AhciCtlBlock->cmd);
PIDE_AHCI_CMD AHCI_CMD = NULL;
PIDE_AHCI_CMD_LIST AHCI_CL = &(chan->AhciCtlBlock->cmd_list[tag]);
//PIDE_AHCI_CMD_LIST AHCI_CL = &(chan->AhciCtlBlock->cmd_list[tag]);
KdPrint2((PRINT_PREFIX "UniataAhciSendPIOCommand: cntrlr %#x:%#x dev %#x, cmd %#x, lba %#I64x bcount %#x feature %#x, buff %#x, len %#x, WF %#x \n",
deviceExtension->DevIndex, lChannel, DeviceNumber, command, lba, bcount, feature, data, length, wait_flags ));

View file

@ -6,7 +6,7 @@
/* The definitions look so crappy, because the code doesn't care
whether the source is an array or an integer */
#define MOV_DD_SWP(a,b) ((a) = RtlUlongByteSwap(*(PULONG)&(b)))
#define MOV_DW_SWP(a,b) ((a) = RtlUshortByteSwap(*(PUSHORT)&(b)))
#define MOV_DW_SWP(a,b) ( ((PUSHORT)&(a))[0] = RtlUshortByteSwap(*(PUSHORT)&(b)))
#define MOV_SWP_DW2DD(a,b) ((a) = RtlUshortByteSwap(*(PUSHORT)&(b)))
#define MOV_QD_SWP(a,b) { ((PULONG)&(a))[0] = RtlUlongByteSwap( ((PULONG)&(b))[1]); ((PULONG)&(a))[1] = RtlUlongByteSwap( ((PULONG)&(b))[0]); }

View file

@ -1,10 +1,10 @@
#define UNIATA_VER_STR "42h"
#define UNIATA_VER_DOT 0.42.8.0
#define UNIATA_VER_STR "42i2"
#define UNIATA_VER_DOT 0.42.9.2
#define UNIATA_VER_MJ 0
#define UNIATA_VER_MN 42
#define UNIATA_VER_SUB_MJ 8
#define UNIATA_VER_SUB_MN 0
#define UNIATA_VER_DOT_COMMA 0,42,8,0
#define UNIATA_VER_DOT_STR "0.42.8.0"
#define UNIATA_VER_SUB_MJ 9
#define UNIATA_VER_SUB_MN 2
#define UNIATA_VER_DOT_COMMA 0,42,9,2
#define UNIATA_VER_DOT_STR "0.42.9.2"
#define UNIATA_VER_YEAR 2012
#define UNIATA_VER_YEAR_STR "2012"