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[SDK:ASM][NDK] Improve and synchronize the definition of the SYNCH_LEVEL symbol (#3943)
In particular, for a given platform (x86, AMD64...) its definition depends for uniprocessor vs. multiprocessor NT kernel/HAL (controlled by the CONFIG_SMP define). Regarding the ASM-generated headers (from asm/ksx.template.h), since they are generated once for a given platform, and since UP/MP NT builds are generated at the same time, these headers need to contain both SYNCH_LEVEL definitions controlled by CONFIG_SMP, instead of a fixed value. Therefore we need to employ the geninc RAW(...) construct. [NDK:X86] Add missing x86 CLOCK1_LEVEL and POWER_LEVEL definitions.
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parent
f350843948
commit
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5 changed files with 43 additions and 21 deletions
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@ -126,10 +126,15 @@ CONSTANT(IPI_LEVEL),
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CONSTANT(POWER_LEVEL),
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CONSTANT(PROFILE_LEVEL),
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CONSTANT(HIGH_LEVEL),
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RAW("#ifdef NT_UP"),
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{TYPE_CONSTANT, "SYNCH_LEVEL", DISPATCH_LEVEL},
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RAW("#ifndef CONFIG_SMP"),
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CONSTANTX(SYNCH_LEVEL, DISPATCH_LEVEL),
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RAW("#else"),
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{TYPE_CONSTANT, "SYNCH_LEVEL", (IPI_LEVEL - 2)},
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#if defined(_M_IX86) && (NTDDI_VERSION < NTDDI_WS03)
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CONSTANTX(SYNCH_LEVEL, (IPI_LEVEL - 1)),
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#else
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CONSTANTX(SYNCH_LEVEL, (IPI_LEVEL - 2)),
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#endif
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RAW("#endif"),
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#if (NTDDI_VERSION >= NTDDI_WIN8)
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@ -380,15 +380,24 @@ Author:
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//
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// IRQL Levels
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//
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#define PASSIVE_LEVEL 0
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#define LOW_LEVEL 0
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#define APC_LEVEL 1
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#define DISPATCH_LEVEL 2
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#define CLOCK_LEVEL 13
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#define IPI_LEVEL 14
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#define POWER_LEVEL 14
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#define PROFILE_LEVEL 15
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#define HIGH_LEVEL 15
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#define PASSIVE_LEVEL 0
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#define LOW_LEVEL 0
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#define APC_LEVEL 1
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#define DISPATCH_LEVEL 2
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#define CLOCK_LEVEL 13
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#define IPI_LEVEL 14
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#define POWER_LEVEL 14
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#define PROFILE_LEVEL 15
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#define HIGH_LEVEL 15
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//
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// Synchronization-level IRQL
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//
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#ifndef CONFIG_SMP
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#define SYNCH_LEVEL DISPATCH_LEVEL
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#else
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#define SYNCH_LEVEL (IPI_LEVEL - 2)
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#endif
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//
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// Quantum Decrements
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@ -277,13 +277,17 @@ typedef enum
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//
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#define KSEG0_BASE 0xfffff80000000000ULL
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#define NMI_STACK_SIZE 0x2000
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#define ISR_STACK_SIZE 0x6000
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//
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// Synchronization-level IRQL
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//
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#define SYNCH_LEVEL 12
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#define NMI_STACK_SIZE 0x2000
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#define ISR_STACK_SIZE 0x6000
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#ifndef CONFIG_SMP
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#define SYNCH_LEVEL DISPATCH_LEVEL
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#else
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#define SYNCH_LEVEL (IPI_LEVEL - 2)
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#endif
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//
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// Number of pool lookaside lists per pool in the PRCB
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@ -29,9 +29,6 @@ extern "C" {
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//
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#define SYNCH_LEVEL DISPATCH_LEVEL
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//
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// CPU Vendors
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//
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@ -303,6 +300,11 @@ typedef enum
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//
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#define KSEG0_BASE 0x80000000
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//
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// Synchronization-level IRQL
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//
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#define SYNCH_LEVEL DISPATCH_LEVEL
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//
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// Number of pool lookaside lists per pool in the PRCB
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//
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@ -577,8 +577,10 @@ Author:
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#define APC_LEVEL 0x1
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#define DISPATCH_LEVEL 0x2
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#define PROFILE_LEVEL 0x1B
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#define CLOCK1_LEVEL 0x1C
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#define CLOCK2_LEVEL 0x1C
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#define IPI_LEVEL 0x1D
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#define POWER_LEVEL 0x1E
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#define HIGH_LEVEL 0x1F
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//
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@ -588,9 +590,9 @@ Author:
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#define SYNCH_LEVEL DISPATCH_LEVEL
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#else
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#if (NTDDI_VERSION < NTDDI_WS03)
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#define SYNCH_LEVEL (IPI_LEVEL - 0x1)
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#define SYNCH_LEVEL (IPI_LEVEL - 1)
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#else
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#define SYNCH_LEVEL (IPI_LEVEL - 0x2)
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#define SYNCH_LEVEL (IPI_LEVEL - 2)
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#endif
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#endif
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