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- Move more stuff to wdm.h
- Add _PCI_COMMON_HEADER - Improve _PCI_COMMON_CONFIG - Enable msc extensions svn path=/branches/header-work/; revision=45750
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706a8e639a
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3 changed files with 85 additions and 74 deletions
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@ -24,6 +24,7 @@
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<compilerflag>-ftracer</compilerflag>
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<compilerflag>-ftracer</compilerflag>
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<compilerflag>-momit-leaf-frame-pointer</compilerflag>
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<compilerflag>-momit-leaf-frame-pointer</compilerflag>
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</if>
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</if>
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<compilerflag>-fms-extensions</compilerflag>
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<compilerflag>-mpreferred-stack-boundary=2</compilerflag>
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<compilerflag>-mpreferred-stack-boundary=2</compilerflag>
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<compilerflag compiler="midl">-m32 --win32</compilerflag>
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<compilerflag compiler="midl">-m32 --win32</compilerflag>
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<compilerflag compiler="cc,cxx">-gstabs+</compilerflag>
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<compilerflag compiler="cc,cxx">-gstabs+</compilerflag>
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@ -2598,8 +2598,92 @@ typedef struct _SHARE_ACCESS {
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ULONG SharedDelete;
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ULONG SharedDelete;
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} SHARE_ACCESS, *PSHARE_ACCESS;
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} SHARE_ACCESS, *PSHARE_ACCESS;
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typedef struct _PCI_COMMON_HEADER {
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USHORT VendorID;
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USHORT DeviceID;
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USHORT Command;
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USHORT Status;
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UCHAR RevisionID;
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UCHAR ProgIf;
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UCHAR SubClass;
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UCHAR BaseClass;
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UCHAR CacheLineSize;
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UCHAR LatencyTimer;
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UCHAR HeaderType;
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UCHAR BIST;
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union {
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struct _PCI_HEADER_TYPE_0 {
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ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
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ULONG CIS;
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USHORT SubVendorID;
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USHORT SubSystemID;
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ULONG ROMBaseAddress;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved1[3];
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ULONG Reserved2;
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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UCHAR MinimumGrant;
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UCHAR MaximumLatency;
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} type0;
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struct _PCI_HEADER_TYPE_1 {
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ULONG BaseAddresses[PCI_TYPE1_ADDRESSES];
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UCHAR PrimaryBus;
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UCHAR SecondaryBus;
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UCHAR SubordinateBus;
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UCHAR SecondaryLatency;
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UCHAR IOBase;
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UCHAR IOLimit;
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USHORT SecondaryStatus;
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USHORT MemoryBase;
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USHORT MemoryLimit;
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USHORT PrefetchBase;
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USHORT PrefetchLimit;
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ULONG PrefetchBaseUpper32;
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ULONG PrefetchLimitUpper32;
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USHORT IOBaseUpper16;
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USHORT IOLimitUpper16;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved1[3];
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ULONG ROMBaseAddress;
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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USHORT BridgeControl;
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} type1;
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struct _PCI_HEADER_TYPE_2 {
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ULONG SocketRegistersBaseAddress;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved;
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USHORT SecondaryStatus;
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UCHAR PrimaryBus;
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UCHAR SecondaryBus;
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UCHAR SubordinateBus;
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UCHAR SecondaryLatency;
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struct {
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ULONG Base;
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ULONG Limit;
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} Range[PCI_TYPE2_ADDRESSES-1];
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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USHORT BridgeControl;
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} type2;
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} u;
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} PCI_COMMON_HEADER, *PPCI_COMMON_HEADER;
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#ifdef __cplusplus
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typedef struct _PCI_COMMON_CONFIG : PCI_COMMON_HEADER {
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UCHAR DeviceSpecific[192];
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} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
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#else
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typedef struct _PCI_COMMON_CONFIG {
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PCI_COMMON_HEADER DUMMYSTRUCTNAME;
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UCHAR DeviceSpecific[192];
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} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
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#endif
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typedef struct _PCI_SLOT_NUMBER {
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typedef struct _PCI_SLOT_NUMBER {
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union {
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union {
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@ -1124,80 +1124,6 @@ typedef struct _KEY_USER_FLAGS_INFORMATION {
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ULONG UserFlags;
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ULONG UserFlags;
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} KEY_USER_FLAGS_INFORMATION, *PKEY_USER_FLAGS_INFORMATION;
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} KEY_USER_FLAGS_INFORMATION, *PKEY_USER_FLAGS_INFORMATION;
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typedef struct _PCI_COMMON_CONFIG {
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USHORT VendorID;
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USHORT DeviceID;
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USHORT Command;
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USHORT Status;
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UCHAR RevisionID;
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UCHAR ProgIf;
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UCHAR SubClass;
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UCHAR BaseClass;
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UCHAR CacheLineSize;
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UCHAR LatencyTimer;
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UCHAR HeaderType;
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UCHAR BIST;
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union {
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struct _PCI_HEADER_TYPE_0 {
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ULONG BaseAddresses[PCI_TYPE0_ADDRESSES];
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ULONG CIS;
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USHORT SubVendorID;
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USHORT SubSystemID;
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ULONG ROMBaseAddress;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved1[3];
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ULONG Reserved2;
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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UCHAR MinimumGrant;
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UCHAR MaximumLatency;
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} type0;
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struct _PCI_HEADER_TYPE_1 {
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ULONG BaseAddresses[PCI_TYPE1_ADDRESSES];
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UCHAR PrimaryBus;
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UCHAR SecondaryBus;
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UCHAR SubordinateBus;
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UCHAR SecondaryLatency;
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UCHAR IOBase;
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UCHAR IOLimit;
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USHORT SecondaryStatus;
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USHORT MemoryBase;
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USHORT MemoryLimit;
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USHORT PrefetchBase;
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USHORT PrefetchLimit;
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ULONG PrefetchBaseUpper32;
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ULONG PrefetchLimitUpper32;
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USHORT IOBaseUpper16;
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USHORT IOLimitUpper16;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved1[3];
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ULONG ROMBaseAddress;
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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USHORT BridgeControl;
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} type1;
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struct _PCI_HEADER_TYPE_2 {
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ULONG SocketRegistersBaseAddress;
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UCHAR CapabilitiesPtr;
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UCHAR Reserved;
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USHORT SecondaryStatus;
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UCHAR PrimaryBus;
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UCHAR SecondaryBus;
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UCHAR SubordinateBus;
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UCHAR SecondaryLatency;
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struct {
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ULONG Base;
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ULONG Limit;
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} Range[PCI_TYPE2_ADDRESSES - 1];
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UCHAR InterruptLine;
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UCHAR InterruptPin;
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USHORT BridgeControl;
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} type2;
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} u;
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UCHAR DeviceSpecific[192];
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} PCI_COMMON_CONFIG, *PPCI_COMMON_CONFIG;
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#define PCI_ADDRESS_MEMORY_SPACE 0x00000000
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#define PCI_ADDRESS_MEMORY_SPACE 0x00000000
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typedef struct _OSVERSIONINFOA {
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typedef struct _OSVERSIONINFOA {
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