From 5b46128dfb0cbdb276bd2adca54aabf6cdbd9f83 Mon Sep 17 00:00:00 2001 From: Timo Kreuzer Date: Sat, 26 Jun 2010 00:15:24 +0000 Subject: [PATCH] [UNIATA] Merge from amd64 branch: 44634: Make x86 specific optimizations x86 specific, use macros otherwise. (Samuel Serapion) 44639: Try to fix numerous pointer to ULONG casts. (Samuel Serapion) 47846/47847: Remove all the byteswap "optimisations" and use portable RTL byteswap functions (Timo Kreuzer) svn path=/trunk/; revision=47848 --- reactos/drivers/storage/ide/uniata/bsmaster.h | 28 ++-- reactos/drivers/storage/ide/uniata/id_ata.cpp | 38 ++--- reactos/drivers/storage/ide/uniata/id_dma.cpp | 26 ++-- .../drivers/storage/ide/uniata/id_init.cpp | 42 +++--- .../drivers/storage/ide/uniata/id_probe.cpp | 22 +-- .../drivers/storage/ide/uniata/id_sata.cpp | 40 +++--- reactos/drivers/storage/ide/uniata/inc/misc.h | 130 +----------------- .../ide/uniata/ros_glue/ros_glue_asm.s | 30 ---- .../drivers/storage/ide/uniata/uniata.rbuild | 1 - 9 files changed, 103 insertions(+), 254 deletions(-) delete mode 100644 reactos/drivers/storage/ide/uniata/ros_glue/ros_glue_asm.s diff --git a/reactos/drivers/storage/ide/uniata/bsmaster.h b/reactos/drivers/storage/ide/uniata/bsmaster.h index 6d2adabba8c..c0bcc22a6c5 100644 --- a/reactos/drivers/storage/ide/uniata/bsmaster.h +++ b/reactos/drivers/storage/ide/uniata/bsmaster.h @@ -1345,7 +1345,7 @@ VOID DDKFASTAPI AtapiWritePort4( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN ULONG data ); @@ -1353,7 +1353,7 @@ VOID DDKFASTAPI AtapiWritePort2( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN USHORT data ); @@ -1361,7 +1361,7 @@ VOID DDKFASTAPI AtapiWritePort1( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN UCHAR data ); @@ -1369,7 +1369,7 @@ VOID DDKFASTAPI AtapiWritePortEx4( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN ULONG offs, IN ULONG data ); @@ -1378,7 +1378,7 @@ VOID DDKFASTAPI AtapiWritePortEx1( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN ULONG offs, IN UCHAR data ); @@ -1387,28 +1387,28 @@ ULONG DDKFASTAPI AtapiReadPort4( IN PHW_CHANNEL chan, - IN ULONG port + IN ULONG_PTR port ); USHORT DDKFASTAPI AtapiReadPort2( IN PHW_CHANNEL chan, - IN ULONG port + IN ULONG_PTR port ); UCHAR DDKFASTAPI AtapiReadPort1( IN PHW_CHANNEL chan, - IN ULONG port + IN ULONG_PTR port ); ULONG DDKFASTAPI AtapiReadPortEx4( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN ULONG offs ); @@ -1416,7 +1416,7 @@ UCHAR DDKFASTAPI AtapiReadPortEx1( IN PHW_CHANNEL chan, - IN ULONG port, + IN ULONG_PTR port, IN ULONG offs ); @@ -1424,7 +1424,7 @@ VOID DDKFASTAPI AtapiWriteBuffer4( IN PHW_CHANNEL chan, - IN ULONG _port, + IN ULONG_PTR _port, IN PVOID Buffer, IN ULONG Count, IN ULONG Timing @@ -1434,7 +1434,7 @@ VOID DDKFASTAPI AtapiWriteBuffer2( IN PHW_CHANNEL chan, - IN ULONG _port, + IN ULONG_PTR _port, IN PVOID Buffer, IN ULONG Count, IN ULONG Timing @@ -1444,7 +1444,7 @@ VOID DDKFASTAPI AtapiReadBuffer4( IN PHW_CHANNEL chan, - IN ULONG _port, + IN ULONG_PTR _port, IN PVOID Buffer, IN ULONG Count, IN ULONG Timing @@ -1454,7 +1454,7 @@ VOID DDKFASTAPI AtapiReadBuffer2( IN PHW_CHANNEL chan, - IN ULONG _port, + IN ULONG_PTR _port, IN PVOID Buffer, IN ULONG Count, IN ULONG Timing diff --git a/reactos/drivers/storage/ide/uniata/id_ata.cpp b/reactos/drivers/storage/ide/uniata/id_ata.cpp index fb2bb028e87..1d141b57bbb 100644 --- a/reactos/drivers/storage/ide/uniata/id_ata.cpp +++ b/reactos/drivers/storage/ide/uniata/id_ata.cpp @@ -240,7 +240,7 @@ VOID \ DDKFASTAPI \ AtapiWritePort##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port, \ + IN ULONG_PTR _port, \ IN _type data \ ) \ { \ @@ -272,7 +272,7 @@ VOID \ DDKFASTAPI \ AtapiWritePortEx##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port, \ + IN ULONG_PTR _port, \ IN ULONG offs, \ IN _type data \ ) \ @@ -305,7 +305,7 @@ _type \ DDKFASTAPI \ AtapiReadPort##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port \ + IN ULONG_PTR _port \ ) \ { \ PIORES res; \ @@ -336,7 +336,7 @@ _type \ DDKFASTAPI \ AtapiReadPortEx##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port, \ + IN ULONG_PTR _port, \ IN ULONG offs \ ) \ { \ @@ -367,7 +367,7 @@ VOID \ DDKFASTAPI \ AtapiReadBuffer##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port, \ + IN ULONG_PTR _port, \ IN PVOID Buffer, \ IN ULONG Count, \ IN ULONG Timing \ @@ -412,7 +412,7 @@ VOID \ DDKFASTAPI \ AtapiWriteBuffer##sz( \ IN PHW_CHANNEL chan, \ - IN ULONG _port, \ + IN ULONG_PTR _port, \ IN PVOID Buffer, \ IN ULONG Count, \ IN ULONG Timing \ @@ -2047,16 +2047,16 @@ AtapiResetController__( goto default_reset; offset = ((Channel & 1) << 7) + ((Channel & 2) << 8); /* disable PHY state change interrupt */ - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + offset, 0); + AtapiWritePortEx4(NULL, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0, 0x148 + offset, 0); UniataSataClearErr(HwDeviceExtension, j, UNIATA_SATA_IGNORE_CONNECT); /* reset controller part for this channel */ - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48, - AtapiReadPortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48) | (0xc0 >> Channel)); + AtapiWritePortEx4(NULL, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0, 0x48, + AtapiReadPortEx4(NULL, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0, 0x48) | (0xc0 >> Channel)); AtapiStallExecution(1000); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48, - AtapiReadPortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x48) & ~(0xc0 >> Channel)); + AtapiWritePortEx4(NULL, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0, 0x48, + AtapiReadPortEx4(NULL, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0, 0x48) & ~(0xc0 >> Channel)); break; } @@ -3619,7 +3619,7 @@ AtapiCheckInterrupt__( switch(ChipType) { case PROLD: case PRNEW: - status = AtapiReadPortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1c); + status = AtapiReadPortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressBM_0,0x1c); if (!DmaTransfer) break; if (!(status & @@ -3639,10 +3639,10 @@ AtapiCheckInterrupt__( } break; case PRMIO: - status = AtapiReadPortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x0040); + status = AtapiReadPortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressBM_0,0x0040); if(ChipFlags & PRSATA) { - pr_status = AtapiReadPortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x006c); - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x006c, pr_status & 0x000000ff); + pr_status = AtapiReadPortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressBM_0,0x006c); + AtapiWritePortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressBM_0,0x006c, pr_status & 0x000000ff); } if(pr_status & (0x11 << Channel)) { // TODO: reset channel @@ -3668,11 +3668,11 @@ AtapiCheckInterrupt__( /* get and clear interrupt status */ if(ChipFlags & NVQ) { - pr_status = AtapiReadPortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs); - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0fUL << shift) | 0x00f000f0); + pr_status = AtapiReadPortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0,offs); + AtapiWritePortEx4(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0,offs, (0x0fUL << shift) | 0x00f000f0); } else { - pr_status = AtapiReadPortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs); - AtapiWritePortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, (0x0f << shift)); + pr_status = AtapiReadPortEx1(chan,(ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0,offs); + AtapiWritePortEx1(chan, (ULONG_PTR)&deviceExtension->BaseIoAddressSATA_0,offs, (0x0f << shift)); } KdPrint2((PRINT_PREFIX " pr_status %x\n", pr_status)); diff --git a/reactos/drivers/storage/ide/uniata/id_dma.cpp b/reactos/drivers/storage/ide/uniata/id_dma.cpp index bac03b239bc..d52fef2edc6 100644 --- a/reactos/drivers/storage/ide/uniata/id_dma.cpp +++ b/reactos/drivers/storage/ide/uniata/id_dma.cpp @@ -251,7 +251,7 @@ AtapiDmaSetup( return FALSE; } //KdPrint2((PRINT_PREFIX " checkpoint 3\n" )); - if((ULONG)data & deviceExtension->AlignmentMask) { + if((ULONG_PTR)data & deviceExtension->AlignmentMask) { KdPrint2((PRINT_PREFIX "AtapiDmaSetup: unaligned data: %#x (%#x)\n", data, deviceExtension->AlignmentMask)); return FALSE; } @@ -293,7 +293,7 @@ retry_DB_IO: return FALSE; } - dma_count = min(count, (PAGE_SIZE - ((ULONG)data & PAGE_MASK))); + dma_count = min(count, (PAGE_SIZE - ((ULONG_PTR)data & PAGE_MASK))); data += dma_count; count -= dma_count; i = 0; @@ -495,10 +495,10 @@ AtapiDmaStart( if(ChipType == PRNEW) { ULONG Channel = deviceExtension->Channel + lChannel; if(chan->ChannelCtrlFlags & CTRFLAGS_LBA48) { - AtapiWritePortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11, - AtapiReadPortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) | + AtapiWritePortEx1(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11, + AtapiReadPortEx1(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11) | (Channel ? 0x08 : 0x02)); - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20), + AtapiWritePortEx4(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20), ((Srb->SrbFlags & SRB_FLAGS_DATA_IN) ? 0x05000000 : 0x06000000) | (Srb->DataTransferLength >> 1) ); } @@ -562,10 +562,10 @@ AtapiDmaDone( if(ChipType == PRNEW) { ULONG Channel = deviceExtension->Channel + lChannel; if(chan->ChannelCtrlFlags & CTRFLAGS_LBA48) { - AtapiWritePortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11, - AtapiReadPortEx1(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) & + AtapiWritePortEx1(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11, + AtapiReadPortEx1(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11) & ~(Channel ? 0x08 : 0x02)); - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20), + AtapiWritePortEx4(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),(Channel ? 0x24 : 0x20), 0 ); } @@ -1083,18 +1083,18 @@ set_new_acard: apiomode = 4; for(i=udmamode; i>=0; i--) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_UDMA0 + i)) { - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[udmamode]); + AtapiWritePortEx4(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_udmatiming[udmamode]); return; } } for(i=wdmamode; i>=0; i--) { if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_WDMA0 + i)) { - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[wdmamode]); + AtapiWritePortEx4(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_wdmatiming[wdmamode]); return; } } if(AtaSetTransferMode(deviceExtension, DeviceNumber, lChannel, LunExt, ATA_PIO0 + apiomode)) { - AtapiWritePortEx4(chan, (ULONG)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[apiomode]); + AtapiWritePortEx4(chan, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0), mode_reg, cyr_piotiming[apiomode]); return; } return; @@ -1837,8 +1837,8 @@ cyrix_timing( case ATA_WDMA2: reg24 = 0x00002020; break; case ATA_UDMA2: reg24 = 0x00911030; break; } - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x20, reg20); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x24, reg24); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x20, reg20); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),(dev*8) + 0x24, reg24); } // cyrix_timing() VOID diff --git a/reactos/drivers/storage/ide/uniata/id_init.cpp b/reactos/drivers/storage/ide/uniata/id_init.cpp index ea3f39a5568..a426991537f 100644 --- a/reactos/drivers/storage/ide/uniata/id_init.cpp +++ b/reactos/drivers/storage/ide/uniata/id_init.cpp @@ -1526,17 +1526,17 @@ AtapiChipInit( KdPrint2((PRINT_PREFIX "BaseIoAddressSATA_0=%x\n", deviceExtension->BaseIoAddressSATA_0.Addr)); if(ChipFlags & NVQ) { /* clear interrupt status */ - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, 0x00ff00ff); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs, 0x00ff00ff); /* enable device and PHY state change interrupts */ - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs+4, 0x000d000d); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+4, 0x000d000d); /* disable NCQ support */ - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0400, - AtapiReadPortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0400) & 0xfffffff9); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x0400, + AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x0400) & 0xfffffff9); } else { /* clear interrupt status */ - AtapiWritePortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs, 0xff); + AtapiWritePortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs, 0xff); /* enable device and PHY state change interrupts */ - AtapiWritePortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),offs+1, 0xdd); + AtapiWritePortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),offs+1, 0xdd); } /* enable PCI interrupt */ ChangePciConfig2(offsetof(PCI_COMMON_CONFIG, Command), (a & ~0x0400)); @@ -1567,16 +1567,16 @@ AtapiChipInit( /* setup clocks */ if(c == CHAN_NOT_SPECIFIED) { // ATA_OUTB(ctlr->r_res1, 0x11, ATA_INB(ctlr->r_res1, 0x11) | 0x0a); - AtapiWritePortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11, - AtapiReadPortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x11) | 0x0a ); + AtapiWritePortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11, + AtapiReadPortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x11) | 0x0a ); } /* FALLTHROUGH */ case PROLD: /* enable burst mode */ // ATA_OUTB(ctlr->r_res1, 0x1f, ATA_INB(ctlr->r_res1, 0x1f) | 0x01); if(c == CHAN_NOT_SPECIFIED) { - AtapiWritePortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1f, - AtapiReadPortEx1(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x1f) | 0x01 ); + AtapiWritePortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x1f, + AtapiReadPortEx1(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x1f) | 0x01 ); } else { // check 80-pin cable chan = &deviceExtension->chan[c]; @@ -1601,7 +1601,7 @@ AtapiChipInit( case PRMIO: if(c == CHAN_NOT_SPECIFIED) { if(ChipFlags & PRSATA) { - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressBM_0),0x6c, 0x000000ff); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressBM_0),0x6c, 0x000000ff); } } else { chan = &deviceExtension->chan[c]; @@ -1680,16 +1680,16 @@ AtapiChipInit( unit10 = (c & 2); if(ChipFlags & SIINOSATAIRQ) { KdPrint2((PRINT_PREFIX "Disable broken SATA intr on c=%x\n", c)); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),0); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),0); } } } else { if(ChipFlags & SIINOSATAIRQ) { KdPrint2((PRINT_PREFIX "Disable broken SATA intr on c=%x\n", c)); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),0); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),0); } else { KdPrint2((PRINT_PREFIX "Enable SATA intr on c=%x\n", c)); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),(1 << 16)); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0), 0x148 + (unit01 << 7) + (unit10 << 8),(1 << 16)); } } } @@ -1699,16 +1699,16 @@ AtapiChipInit( // Enable 3rd and 4th channels if (ChipFlags & SII4CH) { KdPrint2((PRINT_PREFIX "SII4CH\n")); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x0200, 0x00000002); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x0200, 0x00000002); } } else { chan = &deviceExtension->chan[c]; /* dont block interrupts */ //ChangePciConfig4(0x48, (a & ~0x03c00000)); - tmp32 = AtapiReadPortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48); - AtapiWritePortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48, (1 << 22) << c); + tmp32 = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48, (1 << 22) << c); // flush - tmp32 = AtapiReadPortEx4(NULL, (ULONG)(&deviceExtension->BaseIoAddressSATA_0),0x48); + tmp32 = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAddressSATA_0),0x48); /* Initialize FIFO PCI bus arbitration */ GetPciConfig1(offsetof(PCI_COMMON_CONFIG, CacheLineSize), tmp8); @@ -1908,7 +1908,7 @@ UniataInitMapBM( for(c=0; cNumberChannels; c++) { chan = &deviceExtension->chan[c]; for (i=0; iRegTranslation[IDX_BM_IO+i].Addr = BaseIoAddressBM_0 ? ((ULONG)BaseIoAddressBM_0 + i) : 0; + chan->RegTranslation[IDX_BM_IO+i].Addr = BaseIoAddressBM_0 ? ((ULONG_PTR)BaseIoAddressBM_0 + i) : 0; chan->RegTranslation[IDX_BM_IO+i].MemIo = MemIo; } if(BaseIoAddressBM_0) { @@ -1928,11 +1928,11 @@ UniataInitMapBase( ULONG i; for (i=0; iRegTranslation[IDX_IO1+i].Addr = BaseIoAddress1 ? ((ULONG)BaseIoAddress1 + i) : 0; + chan->RegTranslation[IDX_IO1+i].Addr = BaseIoAddress1 ? ((ULONG_PTR)BaseIoAddress1 + i) : 0; chan->RegTranslation[IDX_IO1+i].MemIo = FALSE; } for (i=0; iRegTranslation[IDX_IO2+i].Addr = BaseIoAddress2 ? ((ULONG)BaseIoAddress2 + i) : 0; + chan->RegTranslation[IDX_IO2+i].Addr = BaseIoAddress2 ? ((ULONG_PTR)BaseIoAddress2 + i) : 0; chan->RegTranslation[IDX_IO2+i].MemIo = FALSE; } UniataInitSyncBaseIO(chan); diff --git a/reactos/drivers/storage/ide/uniata/id_probe.cpp b/reactos/drivers/storage/ide/uniata/id_probe.cpp index 725f5ffe790..f254236e05d 100644 --- a/reactos/drivers/storage/ide/uniata/id_probe.cpp +++ b/reactos/drivers/storage/ide/uniata/id_probe.cpp @@ -98,7 +98,7 @@ AtapiGetIoRange( IN ULONG length ) { - ULONG io_start = 0; + ULONG_PTR io_start = 0; KdPrint2((PRINT_PREFIX " AtapiGetIoRange:\n")); if(ConfigInfo->NumberOfAccessRanges <= rid) @@ -115,7 +115,7 @@ AtapiGetIoRange( if((*ConfigInfo->AccessRanges)[rid].RangeInMemory) { io_start = // Get the system physical address for this IO range. - ((ULONG)ScsiPortGetDeviceBase(HwDeviceExtension, + ((ULONG_PTR)ScsiPortGetDeviceBase(HwDeviceExtension, PCIBus /*ConfigInfo->AdapterInterfaceType*/, SystemIoBusNumber /*ConfigInfo->SystemIoBusNumber*/, ScsiPortConvertUlongToPhysicalAddress( @@ -873,7 +873,7 @@ UniataFindBusMasterController( ULONG dev_id; PCI_SLOT_NUMBER slotData; - ULONG i; + ULONG_PTR i; ULONG channel; ULONG c = 0; PUCHAR ioSpace; @@ -926,7 +926,7 @@ UniataFindBusMasterController( KdPrint2((PRINT_PREFIX "AdapterInterfaceType: Isa\n")); } if(InDriverEntry) { - i = (ULONG)Context; + i = (ULONG_PTR)Context; if(i & 0x80000000) { AltInit = TRUE; } @@ -942,7 +942,7 @@ UniataFindBusMasterController( } if(i >= BMListLen) { KdPrint2((PRINT_PREFIX "unexpected device arrival\n")); - i = (ULONG)Context; + i = (ULONG_PTR)Context; if(FirstMasterOk) { channel = 1; } @@ -1179,7 +1179,7 @@ UniataFindBusMasterController( BaseIoAddressBM_0, (*ConfigInfo->AccessRanges)[4].RangeInMemory ? TRUE : FALSE); deviceExtension->BusMaster = TRUE; - deviceExtension->BaseIoAddressBM_0.Addr = (ULONG)BaseIoAddressBM_0; + deviceExtension->BaseIoAddressBM_0.Addr = (ULONG_PTR)BaseIoAddressBM_0; if((*ConfigInfo->AccessRanges)[4].RangeInMemory) { deviceExtension->BaseIoAddressBM_0.MemIo = TRUE; } @@ -1749,7 +1749,7 @@ UniataFindFakeBusMasterController( ULONG dev_id; PCI_SLOT_NUMBER slotData; - ULONG i; + ULONG_PTR i; // PUCHAR ioSpace; // UCHAR statusByte; @@ -1771,7 +1771,7 @@ UniataFindFakeBusMasterController( *Again = FALSE; if(InDriverEntry) { - i = (ULONG)Context; + i = (ULONG_PTR)Context; } else { for(i=0; iSlotNumber && @@ -1957,7 +1957,7 @@ UniataFindFakeBusMasterController( BaseIoAddressBM_0, (*ConfigInfo->AccessRanges)[4].RangeInMemory ? TRUE : FALSE); deviceExtension->BusMaster = TRUE; - deviceExtension->BaseIoAddressBM_0.Addr = (ULONG)BaseIoAddressBM_0; + deviceExtension->BaseIoAddressBM_0.Addr = (ULONG_PTR)BaseIoAddressBM_0; if((*ConfigInfo->AccessRanges)[4].RangeInMemory) { deviceExtension->BaseIoAddressBM_0.MemIo = TRUE; } @@ -2379,14 +2379,14 @@ AtapiFindController( ioSpace = (PUCHAR)ScsiPortGetDeviceBase(HwDeviceExtension, ConfigInfo->AdapterInterfaceType, ConfigInfo->SystemIoBusNumber, - ScsiPortConvertUlongToPhysicalAddress((ULONG)BaseIoAddress1 + 0x0E), + ScsiPortConvertUlongToPhysicalAddress((ULONG_PTR)BaseIoAddress1 + 0x0E), ATA_ALTIOSIZE, TRUE); } else { ioSpace = (PUCHAR)ScsiPortGetDeviceBase(HwDeviceExtension, ConfigInfo->AdapterInterfaceType, ConfigInfo->SystemIoBusNumber, - ScsiPortConvertUlongToPhysicalAddress((ULONG)BaseIoAddress1 + ATA_ALTOFFSET), + ScsiPortConvertUlongToPhysicalAddress((ULONG_PTR)BaseIoAddress1 + ATA_ALTOFFSET), ATA_ALTIOSIZE, TRUE); } diff --git a/reactos/drivers/storage/ide/uniata/id_sata.cpp b/reactos/drivers/storage/ide/uniata/id_sata.cpp index e175f195a6b..b0679617662 100644 --- a/reactos/drivers/storage/ide/uniata/id_sata.cpp +++ b/reactos/drivers/storage/ide/uniata/id_sata.cpp @@ -218,20 +218,20 @@ UniataAhciInit( ULONGLONG base; /* reset AHCI controller */ - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC, - AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC) | AHCI_GHC_HR); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC, + AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC) | AHCI_GHC_HR); AtapiStallExecution(1000000); - if(AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC) & AHCI_GHC_HR) { + if(AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC) & AHCI_GHC_HR) { KdPrint2((PRINT_PREFIX " AHCI reset failed\n")); return FALSE; } /* enable AHCI mode */ - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC, - AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC) | AHCI_GHC_AE); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC, + AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC) | AHCI_GHC_AE); - CAP = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_CAP); - PI = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_PI); + CAP = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_CAP); + PI = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_PI); /* get the number of HW channels */ for(i=PI, n=0; i; n++, i=i>>1); deviceExtension->NumberChannels = @@ -242,14 +242,14 @@ UniataAhciInit( } /* clear interrupts */ - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS, - AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS)); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_IS, + AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_IS)); /* enable AHCI interrupts */ - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC, - AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_GHC) | AHCI_GHC_IE); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC, + AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_GHC) | AHCI_GHC_IE); - version = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_VS); + version = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_VS); KdPrint2((PRINT_PREFIX " AHCI version %x%x.%x%x controller with %d ports (mask %x) detected\n", (version >> 24) & 0xff, (version >> 16) & 0xff, (version >> 8) & 0xff, version & 0xff, deviceExtension->NumberChannels, PI)); @@ -295,15 +295,15 @@ UniataAhciInit( KdPrint2((PRINT_PREFIX " AHCI buffer allocation failed\n")); return FALSE; } - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs + IDX_AHCI_P_CLB, + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), offs + IDX_AHCI_P_CLB, (ULONG)(base & 0xffffffff)); - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs + IDX_AHCI_P_CLB + 4, + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), offs + IDX_AHCI_P_CLB + 4, (ULONG)((base >> 32) & 0xffffffff)); base = chan->AHCI_CL_PhAddr + ATA_AHCI_MAX_TAGS; - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs + IDX_AHCI_P_FB, + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), offs + IDX_AHCI_P_FB, (ULONG)(base & 0xffffffff)); - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, offs + IDX_AHCI_P_FB + 4, + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), offs + IDX_AHCI_P_FB + 4, (ULONG)((base >> 32) & 0xffffffff)); chan->ChannelCtrlFlags |= CTRFLAGS_NO_SLAVE; @@ -328,25 +328,25 @@ UniataAhciStatus( SATA_SSTATUS_REG SStatus; SATA_SERROR_REG SError; ULONG offs = sizeof(IDE_AHCI_REGISTERS) + Channel*sizeof(IDE_AHCI_PORT_REGISTERS); - ULONG base; + ULONG_PTR base; ULONG tag=0; KdPrint(("UniataAhciStatus:\n")); - hIS = AtapiReadPortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS); + hIS = AtapiReadPortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_IS); KdPrint((" hIS %x\n", hIS)); hIS &= (1 << Channel); if(!hIS) { return 0; } - base = (ULONG)&deviceExtension->BaseIoAHCI_0 + offs; + base = (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0 + offs); IS.Reg = AtapiReadPort4(chan, base + IDX_AHCI_P_IS); CI = AtapiReadPort4(chan, base + IDX_AHCI_P_CI); SStatus.Reg = AtapiReadPort4(chan, IDX_SATA_SStatus); SError.Reg = AtapiReadPort4(chan, IDX_SATA_SError); /* clear interrupt(s) */ - AtapiWritePortEx4(NULL, (ULONG)&deviceExtension->BaseIoAHCI_0, IDX_AHCI_IS, hIS); + AtapiWritePortEx4(NULL, (ULONG_PTR)(&deviceExtension->BaseIoAHCI_0), IDX_AHCI_IS, hIS); AtapiWritePort4(chan, base + IDX_AHCI_P_IS, IS.Reg); AtapiWritePort4(chan, IDX_SATA_SError, SError.Reg); diff --git a/reactos/drivers/storage/ide/uniata/inc/misc.h b/reactos/drivers/storage/ide/uniata/inc/misc.h index 3921283bda6..eeebfaf964e 100644 --- a/reactos/drivers/storage/ide/uniata/inc/misc.h +++ b/reactos/drivers/storage/ide/uniata/inc/misc.h @@ -1,130 +1,10 @@ #ifndef __CROSSNT_MISC__H__ #define __CROSSNT_MISC__H__ -extern "C" -void -__fastcall -_MOV_DD_SWP( - void* a, // ECX - void* b // EDX - ); - -#define MOV_DD_SWP(a,b) _MOV_DD_SWP(&(a),&(b)) - -/********************/ - -extern "C" -void -__fastcall -_MOV_DW_SWP( - void* a, // ECX - void* b // EDX - ); - -#define MOV_DW_SWP(a,b) _MOV_DW_SWP(&(a),&(b)) - -/********************/ - -typedef void -(__fastcall *ptrREVERSE_DD)( - void* a // ECX - ); -extern "C" ptrREVERSE_DD _REVERSE_DD; - -void -__fastcall -_REVERSE_DD_i486( - void* a // ECX - ); - -void -__fastcall -_REVERSE_DD_i386( - void* a // ECX - ); -#define REVERSE_DD(a,b) _REVERSE_DD(&(a),&(b)) - -/********************/ - -extern "C" -void -__fastcall -_REVERSE_DW( - void* a // ECX - ); - -#define REVERSE_DW(a) _REVERSE_DW(&(a)) - -/********************/ - -extern "C" -void -__fastcall -_MOV_DW2DD_SWP( - void* a, // ECX - void* b // EDX - ); - -#define MOV_DW2DD_SWP(a,b) _MOV_DW2DD_SWP(&(a),&(b)) - -/********************/ - -extern "C" -void -__fastcall -_MOV_SWP_DW2DD( - void* a, // ECX - void* b // EDX - ); - -#define MOV_SWP_DW2DD(a,b) _MOV_SWP_DW2DD(&(a),&(b)) - -/********************/ - -extern "C" -void -__fastcall -_MOV_MSF( - void* a, // ECX - void* b // EDX - ); -#define MOV_MSF(a,b) _MOV_MSF(&(a),&(b)) - -/********************/ - -typedef void -(__fastcall *ptrMOV_MSF_SWP)( - void* a, // ECX - void* b // EDX - ); -extern "C" ptrMOV_MSF_SWP _MOV_MSF_SWP; - -extern "C" -void -__fastcall -_MOV_MSF_SWP_i486( - void* a, // ECX - void* b // EDX - ); - -extern "C" -void -__fastcall -_MOV_MSF_SWP_i386( - void* a, // ECX - void* b // EDX - ); -#define MOV_MSF_SWP(a,b) _MOV_MSF_SWP(&(a),&(b)) - -/********************/ - -extern "C" -void -__fastcall -_XCHG_DD( - void* a, // ECX - void* b // EDX - ); -#define XCHG_DD(a,b) _XCHG_DD(&(a),&(b)) +/* The definitions look so crappy, because the code doesn't care + whether the source is an array or an integer */ +#define MOV_DD_SWP(a,b) ((a) = RtlUlongByteSwap(*(PULONG)&(b))) +#define MOV_DW_SWP(a,b) ((a) = RtlUshortByteSwap(*(PUSHORT)&(b))) +#define MOV_SWP_DW2DD(a,b) ((a) = RtlUshortByteSwap(*(PUSHORT)&(b))) #endif // __CROSSNT_MISC__H__ diff --git a/reactos/drivers/storage/ide/uniata/ros_glue/ros_glue_asm.s b/reactos/drivers/storage/ide/uniata/ros_glue/ros_glue_asm.s deleted file mode 100644 index e76218f3c81..00000000000 --- a/reactos/drivers/storage/ide/uniata/ros_glue/ros_glue_asm.s +++ /dev/null @@ -1,30 +0,0 @@ -.intel_syntax noprefix - -.globl @_MOV_DD_SWP@8 -.globl @_MOV_DW_SWP@8 -.globl @_MOV_SWP_DW2DD@8 - -.func @_MOV_DD_SWP@8, @_MOV_DD_SWP@8 -@_MOV_DD_SWP@8: - mov eax,[edx] - bswap eax - mov [ecx],eax - ret -.endfunc - -.func @_MOV_DW_SWP@8, @_MOV_DW_SWP@8 -@_MOV_DW_SWP@8: - mov ax,[edx] - rol ax,8 - mov [ecx],ax - ret -.endfunc - -.func @_MOV_SWP_DW2DD@8, @_MOV_SWP_DW2DD@8 -@_MOV_SWP_DW2DD@8: - xor eax,eax - mov ax,[edx] - rol ax,8 - mov [ecx],eax - ret -.endfunc diff --git a/reactos/drivers/storage/ide/uniata/uniata.rbuild b/reactos/drivers/storage/ide/uniata/uniata.rbuild index 339327fcaca..b065ca7828f 100644 --- a/reactos/drivers/storage/ide/uniata/uniata.rbuild +++ b/reactos/drivers/storage/ide/uniata/uniata.rbuild @@ -23,6 +23,5 @@ ros_glue.cpp - ros_glue_asm.s