From 5786bc7b81f1c9ce07d879f369092b42ed034800 Mon Sep 17 00:00:00 2001 From: Sir Richard Date: Sun, 7 Feb 2010 03:01:19 +0000 Subject: [PATCH] [NTOS]: Add a branch-to-self to start testing kernel code. [ARMLLB]: Fix incorrect frame buffer size calculation. [FREELDR]: Finish paging setup. Now we're able to boot to the kernel entrypoint at 0x808D3000, but I'm not happy with the memory descriptors. svn path=/trunk/; revision=45480 --- reactos/boot/armllb/hw/versatile/hwinfo.c | 8 +- .../boot/freeldr/freeldr/arch/arm/loader.c | 30 ++--- reactos/ntoskrnl/include/internal/arm/mm.h | 124 +++++++++--------- reactos/ntoskrnl/ke/arm/boot.s | 1 + 4 files changed, 79 insertions(+), 84 deletions(-) diff --git a/reactos/boot/armllb/hw/versatile/hwinfo.c b/reactos/boot/armllb/hw/versatile/hwinfo.c index c312e125552..c1dd350f884 100755 --- a/reactos/boot/armllb/hw/versatile/hwinfo.c +++ b/reactos/boot/armllb/hw/versatile/hwinfo.c @@ -47,8 +47,8 @@ LlbHwGetSerialUart(VOID) // 0x00000200 - 0x0000FFFF ARM STACK [ 62 KB] // 0x00010000 - 0x0001FFFF ARM LLB [ 64 KB] // 0x00020000 - 0x0009FFFF ARM OS LOADER [512 KB] -// 0x000A0000 - 0x000FFFFF ARM FRAMEBUFFER [384 KB] -// 0x00100000 - 0x007FFFFF OS LOADER FREE/UNUSED [ 7 MB] +// 0x000A0000 - 0x0013FFFF ARM FRAMEBUFFER [640 KB] +// 0x00140000 - 0x007FFFFF OS LOADER FREE/UNUSED [ 6 MB] // 0x00800000 - 0x017FFFFF KERNEL, HAL, INITIAL DRIVER LOAD ADDR [ 16 MB] // 0x01800000 - 0x037FFFFF RAM DISK [ 32 MB] // 0x03800000 - 0x07FFFFFF FREE RAM [ 72 MB] @@ -61,8 +61,8 @@ BIOS_MEMORY_MAP LlbHwVersaMemoryMap[] = {0x00000200, 0x0000FE00, BiosMemoryBootStrap, 0}, {0x00010000, 0x00010000, BiosMemoryBootStrap, 0}, {0x00020000, 0x00080000, BiosMemoryBootLoader, 0}, - {0x000A0000, 0x00060000, BiosMemoryBootLoader, 0}, - {0x00100000, 0x01700000, BiosMemoryUsable, 0}, + {0x000A0000, 0x000A0000, BiosMemoryBootLoader, 0}, + {0x00140000, 0x016C0000, BiosMemoryUsable, 0}, {0x01800000, 0x02000000, BiosMemoryReserved, 0}, {0x10000000, 0x10000000, BiosMemoryReserved, 0}, {0, 0, 0, 0} diff --git a/reactos/boot/freeldr/freeldr/arch/arm/loader.c b/reactos/boot/freeldr/freeldr/arch/arm/loader.c index b742a898b68..fadce699c6b 100644 --- a/reactos/boot/freeldr/freeldr/arch/arm/loader.c +++ b/reactos/boot/freeldr/freeldr/arch/arm/loader.c @@ -719,12 +719,9 @@ ArmSetupPageDirectory(VOID) /* Get the Kernel Table Index */ KernelPageTableIndex = KernelBase >> PDE_SHIFT; - printf("Kernel Base: 0x%p (PDE Index: %lx)\n", KernelBase, KernelPageTableIndex); - - /* Allocate 1MB PDE_BASE and HYPER_SPACE. This will be improved later. Must be 1MB aligned */ + + /* Allocate 1MB PDE_BASE and HYPER_SPACE. This will be improved later. Must be 1MB aligned */ PageDir = MmAllocateMemoryAtAddress(1 * 1024 * 1024, (PVOID)0x700000, LoaderMemoryData); - if (!PageDir) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Initial Page Directory: 0x%p\n", PageDir); /* Setup the Low Memory PDE as an identity-mapped Large Page (1MB) */ LargePte = &PageDir->Pte[LowMemPageTableIndex]; @@ -741,31 +738,35 @@ ArmSetupPageDirectory(VOID) /* Allocate 8 page tables (8KB) to describe the 8MB initial kernel region */ KernelPageTable = MmAllocateMemoryWithType(8192, LoaderMemoryData); - if (!KernelPageTable) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Kernel Page Tables: 0x%p\n", KernelPageTable); /* Setup the Kernel PDEs */ PointerPde = &PageDir->Pde[KernelPageTableIndex]; Pfn = PaPtrToPdePfn(KernelPageTable); for (i = 0; i < 8; i++) { - TempPde.PageFrameNumber = Pfn++; + TempPde.PageFrameNumber = Pfn; *PointerPde++ = TempPde; + Pfn++; } - + + /* Setup the Kernel PTEs */ + PointerPte = KernelPageTable->Pte; + Pfn = PaPtrToPfn(KERNEL_BASE_PHYS); + for (i = 0; i < 1536; i++) + { + TempPte.PageFrameNumber = Pfn++; + *PointerPte++ = TempPte; + } + /* Setup the Startup PDE */ - printf("PAGEDIR: %p IDX: %lx PPDE: %p PFN: %lx \n", PageDir, StartupPdePageTableIndex, &PageDir->Pte[StartupPdePageTableIndex], PaToLargePfn((ULONG_PTR)PageDir)); LargePte = &PageDir->Pte[StartupPdePageTableIndex]; TempLargePte.PageFrameNumber = PaToLargePfn((ULONG_PTR)PageDir); - printf("PAGEDIR: %p IDX: %lx PPDE: %p PFN: %lx \n", PageDir, StartupPdePageTableIndex, LargePte, TempLargePte.PageFrameNumber); *LargePte = TempLargePte; /* After this point, any MiAddressToPde is guaranteed not to fault */ /* Allocate 4 page tables (4KB) to describe the 4MB PTE_BASE region */ PageTable = MmAllocateMemoryWithType(4096, LoaderMemoryData); - if (!PageTable) { printf("FATAL: No memory!\n"); while (TRUE); } - printf("Initial Page Tables: 0x%p\n", PageTable); /* * Link them in the Startup PDE. @@ -794,7 +795,6 @@ ArmSetupPageDirectory(VOID) * and mapped in the PTE_BASE first, then the page table itself will be * editable through its flat PTE address. */ - printf("Paging init done\n"); return PageDir; } @@ -825,8 +825,6 @@ ArmSetupPagingAndJump(IN PVOID PageDirectoryBaseAddress) KeArmControlRegisterSet(ControlRegister); /* Jump to Kernel */ - TuiPrintf("Hello from MMU Enabled!\n"); - while (TRUE); (*KernelEntryPoint)((PVOID)((ULONG_PTR)ArmLoaderBlock | KSEG0_BASE)); } diff --git a/reactos/ntoskrnl/include/internal/arm/mm.h b/reactos/ntoskrnl/include/internal/arm/mm.h index 8acf17a59fe..f318d9a0fd9 100644 --- a/reactos/ntoskrnl/include/internal/arm/mm.h +++ b/reactos/ntoskrnl/include/internal/arm/mm.h @@ -65,8 +65,8 @@ typedef struct _HARDWARE_PTE_ARMV6 ULONG Valid:1; ULONG Buffered:1; ULONG Cached:1; - ULONG Owner:1; ULONG Accessed:1; + ULONG Owner:1; ULONG CacheAttributes:3; ULONG ReadOnly:1; ULONG Shared:1; @@ -104,6 +104,65 @@ typedef enum _ARM_DOMAIN ManagerDomain } ARM_DOMAIN; +struct _EPROCESS; +PULONG MmGetPageDirectory(VOID); + +#define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1) +#define MI_MAKE_DIRTY_PAGE(x) +#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Access = 1) // FIXFIX +#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ExtendedAccess = 1) // FIXFIX +#define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0) +#define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0) +#define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1) +#define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ExtendedAccess == 0) +#define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE +#define MI_IS_PAGE_DIRTY(x) TRUE + +/* Easy accessing PFN in PTE */ +#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) + + +#if 1 + +// +// FIXFIX: This is all wrong now!!! +// + +// +// Take 0x80812345 and extract: +// PTE_BASE[0x808][0x12] +// +#define MiGetPteAddress(x) \ + (PMMPTE)(PTE_BASE + \ + (((ULONG)(x) >> 20) << 12) + \ + ((((ULONG)(x) >> 12) & 0xFF) << 2)) + +#define MiGetPdeAddress(x) \ + (PMMPDE_HARDWARE)(PDE_BASE + \ + (((ULONG)(x) >> 20) << 2)) + +#define MiGetPdeOffset(x) (((ULONG)(x)) >> 22) + +// +// FIXME: THESE ARE WRONG ATM. +// +#define MiAddressToPde(x) \ +((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) +#define MiAddressToPte(x) \ +((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) +#define MiAddressToPteOffset(x) \ +((((ULONG)(x)) << 10) >> 22) + + +// +// Convert a PTE into a corresponding address +// +#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10)) + +#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE)) +#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE))) +#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE) + // // FIXFIX: This is all wrong now!!! // @@ -223,69 +282,6 @@ typedef enum _ARM_PTE_ACCESS UserAccess } ARM_PTE_ACCESS; -#if 0 - -// -// FIXFIX: This is all wrong now!!! -// - -// -// Take 0x80812345 and extract: -// PTE_BASE[0x808][0x12] -// -#define MiGetPteAddress(x) \ - (PMMPTE)(PTE_BASE + \ - (((ULONG)(x) >> 20) << 12) + \ - ((((ULONG)(x) >> 12) & 0xFF) << 2)) - -#define MiGetPdeAddress(x) \ - (PMMPDE_HARDWARE)(PDE_BASE + \ - (((ULONG)(x) >> 20) << 2)) - -#define MiGetPdeOffset(x) (((ULONG)(x)) >> 22) - -#define PTE_BASE 0xC0000000 -#define PTE_TOP 0xC03FFFFF -#define PDE_BASE 0xC1000000 -#define HYPER_SPACE 0xC1100000 - -// -// FIXME: THESE ARE WRONG ATM. -// -#define MiAddressToPde(x) \ -((PMMPTE)(((((ULONG)(x)) >> 22) << 2) + PDE_BASE)) -#define MiAddressToPte(x) \ -((PMMPTE)(((((ULONG)(x)) >> 12) << 2) + PTE_BASE)) -#define MiAddressToPteOffset(x) \ -((((ULONG)(x)) << 10) >> 22) - - -// -// Convert a PTE into a corresponding address -// -#define MiPteToAddress(PTE) ((PVOID)((ULONG)(PTE) << 10)) - -#define ADDR_TO_PAGE_TABLE(v) (((ULONG)(v)) / (1024 * PAGE_SIZE)) -#define ADDR_TO_PDE_OFFSET(v) ((((ULONG)(v)) / (1024 * PAGE_SIZE))) -#define ADDR_TO_PTE_OFFSET(v) ((((ULONG)(v)) % (1024 * PAGE_SIZE)) / PAGE_SIZE) - #endif -struct _EPROCESS; -PULONG MmGetPageDirectory(VOID); - -#define MI_MAKE_LOCAL_PAGE(x) ((x)->u.Hard.NonGlobal = 1) -#define MI_MAKE_DIRTY_PAGE(x) -#define MI_MAKE_OWNER_PAGE(x) ((x)->u.Hard.Access = 1) // FIXFIX -#define MI_MAKE_WRITE_PAGE(x) ((x)->u.Hard.ExtendedAccess = 1) // FIXFIX -#define MI_PAGE_DISABLE_CACHE(x) ((x)->u.Hard.Cached = 0) -#define MI_PAGE_WRITE_THROUGH(x) ((x)->u.Hard.Buffered = 0) -#define MI_PAGE_WRITE_COMBINED(x) ((x)->u.Hard.Buffered = 1) -#define MI_IS_PAGE_WRITEABLE(x) ((x)->u.Hard.ExtendedAccess == 0) -#define MI_IS_PAGE_COPY_ON_WRITE(x)FALSE -#define MI_IS_PAGE_DIRTY(x) TRUE - -/* Easy accessing PFN in PTE */ -#define PFN_FROM_PTE(v) ((v)->u.Hard.PageFrameNumber) - #endif diff --git a/reactos/ntoskrnl/ke/arm/boot.s b/reactos/ntoskrnl/ke/arm/boot.s index d2188b62872..48fd667bf9a 100644 --- a/reactos/ntoskrnl/ke/arm/boot.s +++ b/reactos/ntoskrnl/ke/arm/boot.s @@ -17,6 +17,7 @@ // // Put us in FIQ mode // + b . mrs r3, cpsr orr r3, r1, #CPSR_FIQ_MODE msr cpsr, r3