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- Implemented the interrupt handling for smp machines.
- Enabled interrupts (irqs) on all processors. svn path=/trunk/; revision=12691
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@ -375,6 +375,8 @@ HalEnableSystemInterrupt (ULONG Vector,
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return FALSE;
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return FALSE;
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}
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}
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/* FIXME: We must check if the requested and the assigned interrupt mode is the same */
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irq = VECTOR2IRQ (Vector);
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irq = VECTOR2IRQ (Vector);
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IOAPICUnmaskIrq (irq);
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IOAPICUnmaskIrq (irq);
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@ -1,4 +1,4 @@
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/* $Id: processor_mp.c,v 1.2 2004/12/25 11:21:48 navaraf Exp $
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/* $Id$
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -186,10 +186,15 @@ VOID IOAPICMaskIrq(ULONG Irq)
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IOAPIC_ROUTE_ENTRY Entry;
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IOAPIC_ROUTE_ENTRY Entry;
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ULONG Apic = IrqApicMap[Irq];
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ULONG Apic = IrqApicMap[Irq];
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*(((PULONG)&Entry)+0) = IOAPICRead(Apic, IOAPIC_REDTBL+2*Irq);
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*((PULONG)&Entry) = IOAPICRead(Apic, IOAPIC_REDTBL+2*Irq);
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*(((PULONG)&Entry)+1) = IOAPICRead(Apic, IOAPIC_REDTBL+2*Irq+1);
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Entry.mask = 1;
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Entry.dest.logical.logical_dest &= ~(1 << KeGetCurrentProcessorNumber());
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*Irq, *((PULONG)&Entry));
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if (Entry.dest.logical.logical_dest == 0)
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{
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Entry.mask = 1;
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}
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*Irq+1, *(((PULONG)&Entry)+1));
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*Irq, *(((PULONG)&Entry)+0));
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}
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}
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@ -199,9 +204,12 @@ VOID IOAPICUnmaskIrq(ULONG Irq)
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IOAPIC_ROUTE_ENTRY Entry;
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IOAPIC_ROUTE_ENTRY Entry;
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ULONG Apic = IrqApicMap[Irq];
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ULONG Apic = IrqApicMap[Irq];
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*((PULONG)&Entry) = IOAPICRead(Apic, IOAPIC_REDTBL+2*IrqPinMap[Irq]);
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*(((PULONG)&Entry)+0) = IOAPICRead(Apic, IOAPIC_REDTBL+2*Irq);
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*(((PULONG)&Entry)+1) = IOAPICRead(Apic, IOAPIC_REDTBL+2*Irq+1);
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Entry.dest.logical.logical_dest |= 1 << KeGetCurrentProcessorNumber();
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Entry.mask = 0;
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Entry.mask = 0;
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*IrqPinMap[Irq], *((PULONG)&Entry));
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*Irq+1, *(((PULONG)&Entry)+1));
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IOAPICWrite(Apic, IOAPIC_REDTBL+2*Irq, *(((PULONG)&Entry)+0));
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}
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}
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static VOID
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static VOID
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@ -619,15 +627,8 @@ VOID IOAPICSetupIrqs(VOID)
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entry.delivery_mode = (APIC_DM_LOWEST >> 8);
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entry.delivery_mode = (APIC_DM_LOWEST >> 8);
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entry.dest_mode = 1; /* logical delivery */
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entry.dest_mode = 1; /* logical delivery */
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entry.mask = 1; /* disable IRQ */
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entry.mask = 1; /* disable IRQ */
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#if 0
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entry.dest.logical.logical_dest = 0;
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/*
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* FIXME:
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* Some drivers are not able to deal with more than one cpu.
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*/
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entry.dest.logical.logical_dest = OnlineCPUs;
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#else
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entry.dest.logical.logical_dest = 1 << 0;
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#endif
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idx = IOAPICGetIrqEntry(apic,pin,INT_VECTORED);
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idx = IOAPICGetIrqEntry(apic,pin,INT_VECTORED);
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if (idx == -1)
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if (idx == -1)
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{
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{
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@ -650,11 +651,7 @@ VOID IOAPICSetupIrqs(VOID)
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{
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{
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entry.trigger = 1;
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entry.trigger = 1;
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entry.mask = 1; // disable
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entry.mask = 1; // disable
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#if 0
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entry.dest.logical.logical_dest = 0;
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entry.dest.logical.logical_dest = OnlineCPUs;
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#else
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entry.dest.logical.logical_dest = 1 << 0;
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#endif
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}
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}
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irq = Pin2Irq(idx, apic, pin);
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irq = Pin2Irq(idx, apic, pin);
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