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[NTOS:MM] In MmArmInitSystem, perform self-tests after per-arch initialization.

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Mm(Non)PagedPoolStart won't be initialized otherwise, making the tests
pretty pointless.
This commit is contained in:
Thomas Faber 2020-03-08 20:05:02 +01:00
parent 74a2c6ba42
commit 5032a40d33
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GPG key ID: 076E7C3D44720826
1 changed files with 34 additions and 34 deletions
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68
ntoskrnl/mm/ARM3/mminit.c
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@ -2123,40 +2123,6 @@ MmArmInitSystem(IN ULONG Phase,
/* Set the based section highest address */ /* Set the based section highest address */
MmHighSectionBase = (PVOID)((ULONG_PTR)MmHighestUserAddress - 0x800000); MmHighSectionBase = (PVOID)((ULONG_PTR)MmHighestUserAddress - 0x800000);
#if DBG
/* The subection PTE format depends on things being 8-byte aligned */
ASSERT((sizeof(CONTROL_AREA) % 8) == 0);
ASSERT((sizeof(SUBSECTION) % 8) == 0);
/* Prototype PTEs are assumed to be in paged pool, so check if the math works */
PointerPte = (PMMPTE)MmPagedPoolStart;
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
/* Try the last nonpaged pool address */
PointerPte = (PMMPTE)MI_NONPAGED_POOL_END;
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
/* Try a bunch of random addresses near the end of the address space */
PointerPte = (PMMPTE)((ULONG_PTR)MI_HIGHEST_SYSTEM_ADDRESS - 0x37FFF);
for (j = 0; j < 20; j += 1)
{
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
PointerPte++;
}
/* Subsection PTEs are always in nonpaged pool, pick a random address to try */
PointerPte = (PMMPTE)((ULONG_PTR)MmNonPagedPoolStart + (MmSizeOfNonPagedPoolInBytes / 2));
MI_MAKE_SUBSECTION_PTE(&TempPte, PointerPte);
TestPte = MiSubsectionPteToSubsection(&TempPte);
ASSERT(PointerPte == TestPte);
#endif
/* Loop all 8 standby lists */ /* Loop all 8 standby lists */
for (i = 0; i < 8; i++) for (i = 0; i < 8; i++)
{ {
@ -2331,6 +2297,40 @@ MmArmInitSystem(IN ULONG Phase,
/* Initialize the platform-specific parts */ /* Initialize the platform-specific parts */
MiInitMachineDependent(LoaderBlock); MiInitMachineDependent(LoaderBlock);
#if DBG
/* The subection PTE format depends on things being 8-byte aligned */
ASSERT((sizeof(CONTROL_AREA) % 8) == 0);
ASSERT((sizeof(SUBSECTION) % 8) == 0);
/* Prototype PTEs are assumed to be in paged pool, so check if the math works */
PointerPte = (PMMPTE)MmPagedPoolStart;
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
/* Try the last nonpaged pool address */
PointerPte = (PMMPTE)MI_NONPAGED_POOL_END;
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
/* Try a bunch of random addresses near the end of the address space */
PointerPte = (PMMPTE)((ULONG_PTR)MI_HIGHEST_SYSTEM_ADDRESS - 0x37FFF);
for (j = 0; j < 20; j += 1)
{
MI_MAKE_PROTOTYPE_PTE(&TempPte, PointerPte);
TestPte = MiProtoPteToPte(&TempPte);
ASSERT(PointerPte == TestPte);
PointerPte++;
}
/* Subsection PTEs are always in nonpaged pool, pick a random address to try */
PointerPte = (PMMPTE)((ULONG_PTR)MmNonPagedPoolStart + (MmSizeOfNonPagedPoolInBytes / 2));
MI_MAKE_SUBSECTION_PTE(&TempPte, PointerPte);
TestPte = MiSubsectionPteToSubsection(&TempPte);
ASSERT(PointerPte == TestPte);
#endif
// //
// Build the physical memory block // Build the physical memory block
// //