mirror of
https://github.com/reactos/reactos.git
synced 2024-08-21 10:53:15 +00:00
Sync up to trunk head (r47666)
svn path=/branches/header-work/; revision=47667
This commit is contained in:
Amine Khaldi
parent
6bc4e97d08
commit
4edc0517fc
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@ -340,10 +340,60 @@ HalpGetChipHacks(IN USHORT VendorId,
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IN UCHAR RevisionId,
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IN PULONG HackFlags)
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{
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/* Not yet implemented */
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if (!WarningsGiven[0]++) DbgPrint("HAL: Not checking for PCI Chipset Hacks. Your hardware may malfunction!\n");
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*HackFlags = 0;
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return STATUS_UNSUCCESSFUL;
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UNICODE_STRING KeyName, ValueName;
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NTSTATUS Status;
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OBJECT_ATTRIBUTES ObjectAttributes;
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HANDLE KeyHandle;
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WCHAR Buffer[32];
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KEY_VALUE_PARTIAL_INFORMATION PartialInfo;
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ULONG ResultLength;
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/* Setup the object attributes for the key */
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RtlInitUnicodeString(&KeyName,
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L"\\REGISTRY\\MACHINE\\SYSTEM\\CURRENTCONTROLSET\\"
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L"Control\\HAL");
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InitializeObjectAttributes(&ObjectAttributes,
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&KeyName,
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OBJ_CASE_INSENSITIVE,
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NULL,
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NULL);
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/* Open the key */
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Status = ZwOpenKey(&KeyHandle, KEY_READ, &ObjectAttributes);
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if (!NT_SUCCESS(Status)) return Status;
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/* Query value */
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swprintf(Buffer, L"%04X%04X", VendorId, DeviceId);
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RtlInitUnicodeString(&ValueName, Buffer);
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Status = ZwQueryValueKey(KeyHandle,
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&ValueName,
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KeyValuePartialInformation,
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&PartialInfo,
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sizeof(PartialInfo),
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&ResultLength);
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if (NT_SUCCESS(Status))
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{
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/* Return the flags */
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DbgPrint("\tFound HackFlags for your chipset\n");
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*HackFlags = *(PULONG)PartialInfo.Data;
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DbgPrint("\t\tHack Flags: %lx (Hack Revision: %lx-Your Revision: %lx)\n",
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*HackFlags, HALP_REVISION_FROM_HACK_FLAGS(*HackFlags), RevisionId);
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/* Does it apply to this revision? */
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if ((RevisionId) && (RevisionId >= (HALP_REVISION_FROM_HACK_FLAGS(*HackFlags))))
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{
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/* Read the revision flags */
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*HackFlags = HALP_REVISION_HACK_FLAGS(*HackFlags);
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}
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/* Throw out revision data */
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*HackFlags = HALP_HACK_FLAGS(*HackFlags);
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if (!*HackFlags) DbgPrint("\tNo HackFlags for your chipset's revision!\n");
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}
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/* Close the handle and return */
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ZwClose(KeyHandle);
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return Status;
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}
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BOOLEAN
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@ -352,8 +402,77 @@ HalpIsRecognizedCard(IN PPCI_REGISTRY_INFO_INTERNAL PciRegistryInfo,
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IN PPCI_COMMON_CONFIG PciData,
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IN ULONG Flags)
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{
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/* Not yet implemented */
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if (!WarningsGiven[1]++) DbgPrint("HAL: Not checking for PCI Cards with Extended Addressing. Your hardware may malfunction!\n");
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ULONG ElementCount, i;
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PPCI_CARD_DESCRIPTOR CardDescriptor;
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/* How many PCI Cards that we know about? */
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ElementCount = PciRegistryInfo->ElementCount;
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if (!ElementCount) return FALSE;
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/* Loop all descriptors */
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CardDescriptor = &PciRegistryInfo->CardList[0];
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for (i = 0; i < ElementCount; i++, CardDescriptor++)
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{
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/* Check for flag match */
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if (CardDescriptor->Flags != Flags) continue;
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/* Check for VID-PID match */
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if ((CardDescriptor->VendorID != PciData->VendorID) ||
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(CardDescriptor->DeviceID != PciData->DeviceID))
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{
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/* Skip */
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continue;
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}
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/* Check for revision match, if requested */
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if ((CardDescriptor->Flags & HALP_CHECK_CARD_REVISION_ID) &&
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(CardDescriptor->RevisionID != PciData->RevisionID))
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{
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/* Skip */
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continue;
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}
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/* Check what kind of device this is */
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switch (PCI_CONFIGURATION_TYPE(PciData))
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{
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/* CardBUS Bridge */
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case PCI_CARDBUS_BRIDGE_TYPE:
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/* This means the real device header is in the device-specific data */
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PciData = (PPCI_COMMON_CONFIG)PciData->DeviceSpecific;
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/* Normal PCI device */
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case PCI_DEVICE_TYPE:
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/* Check for subvendor match, if requested */
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if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBVENDOR_ID) &&
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(CardDescriptor->SubsystemVendorID != PciData->u.type0.SubVendorID))
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{
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/* Skip */
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continue;
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}
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/* Check for subsystem match, if requested */
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if ((CardDescriptor->Flags & HALP_CHECK_CARD_SUBSYSTEM_ID) &&
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(CardDescriptor->SubsystemID != PciData->u.type0.SubSystemID))
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{
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/* Skip */
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continue;
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}
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/* You made it! */
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return TRUE;
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/* PCI Bridge -- don't bother */
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case PCI_BRIDGE_TYPE:
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default:
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/* Recognize it */
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return TRUE;
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}
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}
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/* This means the card isn't recognized */
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return FALSE;
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}
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@ -361,30 +480,355 @@ BOOLEAN
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NTAPI
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HalpIsIdeDevice(IN PPCI_COMMON_CONFIG PciData)
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{
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/* Not yet implemented */
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if (!WarningsGiven[2]++) DbgPrint("HAL: Not checking for PCI Cards that are IDE devices. Your hardware may malfunction!\n");
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return FALSE;
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/* Simple test first */
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if ((PciData->BaseClass == PCI_CLASS_MASS_STORAGE_CTLR) &&
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(PciData->SubClass == PCI_SUBCLASS_MSC_IDE_CTLR))
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{
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/* The device is nice enough to admit it */
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return TRUE;
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}
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/* Symphony 82C101 */
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if (PciData->VendorID == 0x1C1C) return TRUE;
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/* ALi MS4803 or M5219 */
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if ((PciData->VendorID == 0x10B9) &&
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((PciData->DeviceID == 0x5215) || (PciData->DeviceID == 0x5219)))
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{
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return TRUE;
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}
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/* Appian Technology */
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if ((PciData->VendorID == 0x1097) && (PciData->DeviceID == 0x38)) return TRUE;
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/* Compaq Triflex Dual EIDE Controller */
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if ((PciData->VendorID == 0xE11) && (PciData->DeviceID == 0xAE33)) return TRUE;
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/* Micron PC Tech RZ1000 */
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if ((PciData->VendorID == 0x1042) && (PciData->DeviceID == 0x1000)) return TRUE;
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/* SiS 85C601 or 5513 [IDE] */
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if ((PciData->VendorID == 0x1039) &&
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((PciData->DeviceID == 0x601) || (PciData->DeviceID == 0x5513)))
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{
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return TRUE;
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}
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/* Symphony Labs W83769F */
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if ((PciData->VendorID == 0x10AD) &&
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((PciData->DeviceID == 0x1) || (PciData->DeviceID == 0x150)))
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{
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return TRUE;
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}
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/* UMC UM8673F */
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if ((PciData->VendorID == 0x1060) && (PciData->DeviceID == 0x101)) return TRUE;
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/* You've survived */
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return FALSE;
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}
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BOOLEAN
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NTAPI
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HalpGetPciBridgeConfig(IN ULONG PciType,
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IN PUCHAR MaxPciBus)
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HalpIsBridgeDevice(IN PPCI_COMMON_CONFIG PciData)
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{
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/* Not yet implemented */
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if (!WarningsGiven[3]++) DbgPrint("HAL: Not checking for PCI-to-PCI Bridges. Your hardware may malfunction!\n");
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return FALSE;
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/* Either this is a PCI-to-PCI Bridge, or a CardBUS Bridge */
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return (((PCI_CONFIGURATION_TYPE(PciData) == PCI_BRIDGE_TYPE) &&
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(PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
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(PciData->SubClass == PCI_SUBCLASS_BR_PCI_TO_PCI)) ||
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((PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE) &&
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(PciData->BaseClass == PCI_CLASS_BRIDGE_DEV) &&
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(PciData->SubClass == PCI_SUBCLASS_BR_CARDBUS)));
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}
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BOOLEAN
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NTAPI
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HalpGetPciBridgeConfig(IN ULONG PciType,
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IN PUCHAR BusCount)
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{
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PCI_SLOT_NUMBER PciSlot;
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ULONG i, j, k;
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UCHAR DataBuffer[PCI_COMMON_HDR_LENGTH];
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PPCI_COMMON_CONFIG PciData = (PPCI_COMMON_CONFIG)DataBuffer;
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PBUS_HANDLER BusHandler;
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/* Loop PCI buses */
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PciSlot.u.bits.Reserved = 0;
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for (i = 0; i < *BusCount; i++)
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{
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/* Get the bus handler */
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BusHandler = HalHandlerForBus(PCIBus, i);
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/* Loop every device */
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for (j = 0; j < PCI_MAX_DEVICES; j++)
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{
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/* Loop every function */
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PciSlot.u.bits.DeviceNumber = j;
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for (k = 0; k < PCI_MAX_FUNCTION; k++)
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{
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/* Build the final slot structure */
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PciSlot.u.bits.FunctionNumber = k;
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/* Read the configuration information */
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HalpReadPCIConfig(BusHandler,
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PciSlot,
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PciData,
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0,
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PCI_COMMON_HDR_LENGTH);
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/* Skip if this is an invalid function */
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if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
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/* Make sure that this is a PCI bridge or a cardbus bridge */
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if (!HalpIsBridgeDevice(PciData)) continue;
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/* Not supported */
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if (!WarningsGiven[2]++) DPRINT1("Your machine has a PCI-to-PCI or CardBUS Bridge. PCI devices may fail!\n");
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continue;
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}
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}
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}
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/* If we exited the loop, then there's no bridge to worry about */
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return FALSE;
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}
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VOID
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NTAPI
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HalpFixupPciSupportedRanges(IN ULONG MaxBuses)
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HalpFixupPciSupportedRanges(IN ULONG BusCount)
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{
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/* Not yet implemented */
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if (!WarningsGiven[4]++) DbgPrint("HAL: Not adjusting Bridge-to-Child PCI Address Ranges. Your hardware may malfunction!\n");
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ULONG i;
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PBUS_HANDLER Bus, ParentBus;
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/* Loop all buses */
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for (i = 0; i < BusCount; i++)
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{
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/* Get PCI bus handler */
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Bus = HalHandlerForBus(PCIBus, i);
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/* Loop all parent buses */
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ParentBus = Bus->ParentHandler;
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while (ParentBus)
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{
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/* Should merge addresses */
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if (!WarningsGiven[0]++) DPRINT1("Found parent bus (indicating PCI Bridge). PCI devices may fail!\n");
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/* Check the next parent */
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ParentBus = ParentBus->ParentHandler;
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}
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}
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/* Loop all buses again */
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for (i = 0; i < BusCount; i++)
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{
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/* Get PCI bus handler */
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Bus = HalHandlerForBus(PCIBus, i);
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/* Check if this is a PCI 2.2 Bus with Subtractive Decode */
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if (!((PPCIPBUSDATA)Bus->BusData)->Subtractive)
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{
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/* Loop all parent buses */
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ParentBus = Bus->ParentHandler;
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while (ParentBus)
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{
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/* But check only PCI parent buses specifically */
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if (ParentBus->InterfaceType == PCIBus)
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{
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/* Should trim addresses */
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if (!WarningsGiven[1]++) DPRINT1("Found parent PCI Bus (indicating PCI-to-PCI Bridge). PCI devices may fail!\n");
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}
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/* Check the next parent */
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ParentBus = ParentBus->ParentHandler;
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}
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}
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}
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/* Loop buses one last time */
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for (i = 0; i < BusCount; i++)
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{
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/* Get the PCI bus handler */
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Bus = HalHandlerForBus(PCIBus, i);
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/* Sort and combine (trim) bus address range information */
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DPRINT("Warning: Bus addresses not being optimized!\n");
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}
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}
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#endif
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VOID
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NTAPI
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ShowSize(ULONG x)
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{
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if (!x) return;
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DbgPrint(" [size=");
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if (x < 1024)
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{
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DbgPrint("%d", (int) x);
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}
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else if (x < 1048576)
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{
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DbgPrint("%dK", (int)(x / 1024));
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}
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else if (x < 0x80000000)
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{
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DbgPrint("%dM", (int)(x / 1048576));
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}
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else
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{
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DbgPrint("%d", x);
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}
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DbgPrint("]\n");
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}
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VOID
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NTAPI
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HalpDebugPciBus(IN ULONG i,
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IN ULONG j,
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IN ULONG k,
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IN PPCI_COMMON_CONFIG PciData)
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{
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extern CHAR ClassTable[3922];
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extern CHAR VendorTable[642355];
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PCHAR p, ClassName, SubClassName, VendorName, ProductName, SubVendorName;
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ULONG Length;
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CHAR LookupString[16] = "";
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CHAR bSubClassName[32] = "";
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CHAR bVendorName[32] = "";
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CHAR bProductName[32] = "Unknown device";
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CHAR bSubVendorName[32] = "Unknown";
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ULONG Size, Mem, b;
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/* Isolate the class name */
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sprintf(LookupString, "C %02x", PciData->BaseClass);
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ClassName = strstr(ClassTable, LookupString);
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if (ClassName)
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{
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/* Isolate the subclass name */
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ClassName += 6;
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sprintf(LookupString, "\t%02x", PciData->SubClass);
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SubClassName = strstr(ClassName, LookupString);
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if (SubClassName)
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{
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/* Copy the subclass into our buffer */
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SubClassName += 5;
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p = strchr(SubClassName, '\r');
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Length = p - SubClassName;
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if (Length > sizeof(bSubClassName)) Length = sizeof(bSubClassName);
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strncpy(bSubClassName, SubClassName, Length);
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bSubClassName[Length] = '\0';
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}
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}
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/* Isolate the vendor name */
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sprintf(LookupString, "\n%04x ", PciData->VendorID);
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VendorName = strstr(VendorTable, LookupString);
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if (VendorName)
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{
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/* Copy the vendor name into our buffer */
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VendorName += 7;
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p = strchr(VendorName, '\r');
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Length = p - VendorName;
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if (Length > sizeof(bVendorName)) Length = sizeof(bVendorName);
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strncpy(bVendorName, VendorName, Length);
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bVendorName[Length ] = '\0';
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/* Isolate the product name */
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sprintf(LookupString, "\t%04x", PciData->DeviceID);
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ProductName = strstr(VendorName, LookupString);
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if (ProductName)
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{
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/* Copy the product name into our buffer */
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ProductName += 7;
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p = strchr(ProductName, '\r');
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Length = p - ProductName;
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if (Length > sizeof(bProductName)) Length = sizeof(bProductName);
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strncpy(bProductName, ProductName, Length);
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bProductName[Length] = '\0';
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/* Isolate the subvendor and subsystem name */
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sprintf(LookupString,
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"\t\t%04x %04x ",
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PciData->u.type0.SubVendorID,
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PciData->u.type0.SubSystemID);
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SubVendorName = strstr(ProductName, LookupString);
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if (SubVendorName)
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{
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/* Copy the subvendor name into our buffer */
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SubVendorName += 13;
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p = strchr(SubVendorName, '\r');
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Length = p - SubVendorName;
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if (Length > sizeof(bSubVendorName)) Length = sizeof(bSubVendorName);
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strncpy(bSubVendorName, SubVendorName, Length);
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bSubVendorName[Length] = '\0';
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}
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}
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}
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/* Print out the data */
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DbgPrint("%02x:%02x.%x %s [%02x%02x]: %s %s [%04x:%04x] (rev %02x)\n"
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"\tSubsystem: %s [%04x:%04x]\n",
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i,
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j,
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k,
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bSubClassName,
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PciData->BaseClass,
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PciData->SubClass,
|
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bVendorName,
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bProductName,
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PciData->VendorID,
|
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PciData->DeviceID,
|
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PciData->RevisionID,
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bSubVendorName,
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PciData->u.type0.SubVendorID,
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PciData->u.type0.SubSystemID);
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/* Print out and decode flags */
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DbgPrint("\tFlags:");
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if (PciData->Command & PCI_ENABLE_BUS_MASTER) DbgPrint(" bus master,");
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if (PciData->Status & PCI_STATUS_66MHZ_CAPABLE) DbgPrint(" 66MHz,");
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if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x200) DbgPrint(" medium devsel,");
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if ((PciData->Status & PCI_STATUS_DEVSEL) == 0x400) DbgPrint(" fast devsel,");
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DbgPrint(" latency %d", PciData->LatencyTimer);
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if (PciData->u.type0.InterruptLine) DbgPrint(", IRQ %02d", PciData->u.type0.InterruptLine);
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DbgPrint("\n");
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/* Scan addresses */
|
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Size = 0;
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for (b = 0; b < PCI_TYPE0_ADDRESSES; b++)
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||||
{
|
||||
/* Check for a BAR */
|
||||
Mem = PciData->u.type0.BaseAddresses[b];
|
||||
if (Mem)
|
||||
{
|
||||
/* Decode the address type */
|
||||
if (Mem & PCI_ADDRESS_IO_SPACE)
|
||||
{
|
||||
/* Decode the size */
|
||||
Size = 1 << 2;
|
||||
while (!(Mem & Size) && (Size)) Size <<= 1;
|
||||
|
||||
/* Print it out */
|
||||
DbgPrint("\tI/O ports at %04lx", Mem & PCI_ADDRESS_IO_ADDRESS_MASK);
|
||||
ShowSize(Size);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Decode the size */
|
||||
Size = 1 << 8;
|
||||
while (!(Mem & Size) && (Size)) Size <<= 1;
|
||||
|
||||
/* Print it out */
|
||||
DbgPrint("\tMemory at %08lx (%d-bit, %sprefetchable)",
|
||||
Mem & PCI_ADDRESS_MEMORY_ADDRESS_MASK,
|
||||
(Mem & PCI_ADDRESS_MEMORY_TYPE_MASK) == PCI_TYPE_32BIT ? 32 : 64,
|
||||
(Mem & PCI_ADDRESS_MEMORY_PREFETCHABLE) ? "" : "non-");
|
||||
ShowSize(Size);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
HalpInitializePciBus(VOID)
|
||||
|
|
@ -399,6 +843,7 @@ HalpInitializePciBus(VOID)
|
|||
PBUS_HANDLER BusHandler;
|
||||
ULONG HackFlags;
|
||||
BOOLEAN ExtendedAddressDecoding = FALSE;
|
||||
NTSTATUS Status;
|
||||
|
||||
/* Query registry information */
|
||||
PciRegistryInfo = HalpQueryPciRegistryInfo();
|
||||
|
|
@ -464,6 +909,7 @@ HalpInitializePciBus(VOID)
|
|||
HalpFixupPciSupportedRanges(PciRegistryInfo->NoBuses);
|
||||
|
||||
/* Loop every bus */
|
||||
DbgPrint("\n====== PCI BUS HARDWARE DETECTION =======\n\n");
|
||||
PciSlot.u.bits.Reserved = 0;
|
||||
for (i = 0; i < PciRegistryInfo->NoBuses; i++)
|
||||
{
|
||||
|
|
@ -490,11 +936,14 @@ HalpInitializePciBus(VOID)
|
|||
/* Skip if this is an invalid function */
|
||||
if (PciData->VendorID == PCI_INVALID_VENDORID) continue;
|
||||
|
||||
/* Print out the entry */
|
||||
HalpDebugPciBus(i, j, k, PciData);
|
||||
|
||||
/* Check if this is a Cardbus bridge */
|
||||
if (PCI_CONFIGURATION_TYPE(PciData) == PCI_CARDBUS_BRIDGE_TYPE)
|
||||
{
|
||||
/* Not supported */
|
||||
DbgPrint("HAL: Your machine has a PCI Cardbus Bridge. This is not supported!\n");
|
||||
DbgPrint("\tDevice is a PCI Cardbus Bridge. It will not work!\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
@ -509,11 +958,10 @@ HalpInitializePciBus(VOID)
|
|||
if (PciData->u.type1.InterruptLine < 16)
|
||||
{
|
||||
/* Is this an IDE device? */
|
||||
DbgPrint("HAL: Found PCI device with IRQ line\n");
|
||||
if (!HalpIsIdeDevice(PciData))
|
||||
{
|
||||
/* We'll mask out this interrupt then */
|
||||
DbgPrint("HAL: Device is not an IDE Device. Should be masking IRQ %d! This is not supported!\n",
|
||||
DbgPrint("\tDevice is using IRQ %d! ISA Cards using that IRQ may fail!\n",
|
||||
PciData->u.type1.InterruptLine);
|
||||
HalpPciIrqMask |= (1 << PciData->u.type1.InterruptLine);
|
||||
}
|
||||
|
|
@ -529,7 +977,7 @@ HalpInitializePciBus(VOID)
|
|||
(PciData->RevisionID < 0x11))
|
||||
{
|
||||
/* Skip */
|
||||
DbgPrint("HAL: Your machine has a broken Intel 82430 PCI Controller. This is not supported!\n");
|
||||
DbgPrint("\tDevice is a broken Intel 82430 PCI Controller. It will not work!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
@ -538,7 +986,7 @@ HalpInitializePciBus(VOID)
|
|||
(PciData->RevisionID <= 3))
|
||||
{
|
||||
/* Skip */
|
||||
DbgPrint("HAL: Your machine has a broken Intel 82378 PCI-to-ISA Bridge. This is not supported!\n");
|
||||
DbgPrint("\tDevice is a broken Intel 82378 PCI-to-ISA Bridge. It will not work!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
@ -546,7 +994,7 @@ HalpInitializePciBus(VOID)
|
|||
if ((PciData->DeviceID == 0x84C4) &&
|
||||
(PciData->RevisionID <= 4))
|
||||
{
|
||||
DbgPrint("HAL: Your machine has an Intel Orion 82450 PCI Bridge. This is not supported!\n");
|
||||
DbgPrint("\tDevice is a Intel Orion 82450 PCI Bridge. It will not work!\n\n");
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
|
@ -555,10 +1003,12 @@ HalpInitializePciBus(VOID)
|
|||
if (!ExtendedAddressDecoding)
|
||||
{
|
||||
/* Check for it */
|
||||
if (HalpIsRecognizedCard(PciRegistryInfo, PciData, 1))
|
||||
if (HalpIsRecognizedCard(PciRegistryInfo,
|
||||
PciData,
|
||||
HALP_CARD_FEATURE_FULL_DECODE))
|
||||
{
|
||||
/* We'll do chipset checks later */
|
||||
DbgPrint("HAL: Recognized a PCI Card with Extended Address Decoding. This is not supported!\n");
|
||||
DbgPrint("\tDevice has Extended Address Decoding. It may fail to work on older BIOSes!\n");
|
||||
ExtendedAddressDecoding = TRUE;
|
||||
}
|
||||
}
|
||||
|
|
@ -570,45 +1020,63 @@ HalpInitializePciBus(VOID)
|
|||
/* Check if this is an OHCI controller */
|
||||
if (PciData->ProgIf == 0x10)
|
||||
{
|
||||
DbgPrint("HAL: Your machine has an OHCI (USB) PCI Expansion Card. This is not supported!\n");
|
||||
DbgPrint("\tDevice is an OHCI (USB) PCI Expansion Card. Turn off Legacy USB in your BIOS!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Check for Intel UHCI controller */
|
||||
if (PciData->VendorID == 0x8086)
|
||||
{
|
||||
DbgPrint("HAL: Your machine has an Intel UHCI (USB) Controller. This is not supported!\n");
|
||||
DbgPrint("\tDevice is an Intel UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Check for VIA UHCI controller */
|
||||
if (PciData->VendorID == 0x1106)
|
||||
{
|
||||
DbgPrint("HAL: Your machine has a VIA UHCI (USB) Controller. This is not supported!\n");
|
||||
DbgPrint("\tDevice is a VIA UHCI (USB) Controller. Turn off Legacy USB in your BIOS!\n\n");
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
/* Now check the registry for chipset hacks */
|
||||
if (NT_SUCCESS(HalpGetChipHacks(PciData->VendorID,
|
||||
PciData->DeviceID,
|
||||
PciData->RevisionID,
|
||||
&HackFlags)))
|
||||
Status = HalpGetChipHacks(PciData->VendorID,
|
||||
PciData->DeviceID,
|
||||
PciData->RevisionID,
|
||||
&HackFlags);
|
||||
if (NT_SUCCESS(Status))
|
||||
{
|
||||
/* Check for broken ACPI routing */
|
||||
if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_ACPI_IRQ_ROUTING)
|
||||
{
|
||||
DbgPrint("This chipset has broken ACPI IRQ Routing! Be aware!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Check for broken ACPI timer */
|
||||
if (HackFlags & HAL_PCI_CHIP_HACK_BROKEN_ACPI_TIMER)
|
||||
{
|
||||
DbgPrint("This chipset has a broken ACPI timer! Be aware!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Check for hibernate-disable */
|
||||
if (HackFlags & HAL_PCI_CHIP_HACK_DISABLE_HIBERNATE)
|
||||
{
|
||||
DbgPrint("HAL: Your machine has a broken PCI device which is incompatible with hibernation. This is not supported!\n");
|
||||
DbgPrint("This chipset has a broken PCI device which is incompatible with hibernation. Be aware!\n\n");
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Check for USB controllers that generate SMIs */
|
||||
if (HackFlags & HAL_PCI_CHIP_HACK_USB_SMI_DISABLE)
|
||||
{
|
||||
DbgPrint("HAL: Your machine has a USB controller which generates SMIs. This is not supported!\n");
|
||||
DbgPrint("This chipset has a USB controller which generates SMIs. ReactOS will likely fail to boot!\n\n");
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
/* Terminate the entry */
|
||||
DbgPrint("\n");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -621,7 +1089,7 @@ HalpInitializePciBus(VOID)
|
|||
|
||||
/* Tell PnP if this hard supports correct decoding */
|
||||
HalpMarkChipsetDecode(ExtendedAddressDecoding);
|
||||
DPRINT1("PCI BUS Setup complete\n");
|
||||
DbgPrint("====== PCI BUS DETECTION COMPLETE =======\n\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -485,6 +485,25 @@ HalpHardwareInterruptLevel(
|
|||
VOID
|
||||
);
|
||||
|
||||
//
|
||||
// Hack Flags
|
||||
//
|
||||
#define HALP_REVISION_FROM_HACK_FLAGS(x) ((x) >> 24)
|
||||
#define HALP_REVISION_HACK_FLAGS(x) ((x) >> 12)
|
||||
#define HALP_HACK_FLAGS(x) ((x) & 0xFFF)
|
||||
|
||||
//
|
||||
// Feature flags
|
||||
//
|
||||
#define HALP_CARD_FEATURE_FULL_DECODE 0x0001
|
||||
|
||||
//
|
||||
// Match Flags
|
||||
//
|
||||
#define HALP_CHECK_CARD_REVISION_ID 0x10000
|
||||
#define HALP_CHECK_CARD_SUBVENDOR_ID 0x20000
|
||||
#define HALP_CHECK_CARD_SUBSYSTEM_ID 0x40000
|
||||
|
||||
//
|
||||
// Mm PTE/PDE to Hal PTE/PDE
|
||||
//
|
||||
|
|
|
|||
Loading…
Reference in a new issue