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[LIBM] Import win-libm from AMD
Source: https://github.com/amd/win-libm
This commit is contained in:
Timo Kreuzer
parent
081c637c06
commit
4afb647c78
82 changed files with 22392 additions and 0 deletions
369
sdk/lib/crt/math/libm_sse2/simd.h
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369
sdk/lib/crt/math/libm_sse2/simd.h
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/***********************************************************************************/
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/** MIT License **/
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/** ----------- **/
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/** **/
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/** Copyright (c) 2002-2019 Advanced Micro Devices, Inc. **/
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/** **/
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/** Permission is hereby granted, free of charge, to any person obtaining a copy **/
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/** of this Software and associated documentaon files (the "Software"), to deal **/
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/** in the Software without restriction, including without limitation the rights **/
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/** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell **/
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/** copies of the Software, and to permit persons to whom the Software is **/
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/** furnished to do so, subject to the following conditions: **/
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/** **/
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/** The above copyright notice and this permission notice shall be included in **/
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/** all copies or substantial portions of the Software. **/
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/** **/
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/** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR **/
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/** IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, **/
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/** FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE **/
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/** AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER **/
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/** LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, **/
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/** OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN **/
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/** THE SOFTWARE. **/
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/***********************************************************************************/
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/*
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******************************************************************************
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* Source File : simd.h
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* Archive File : $Archive: $
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* Date : 6/04/01
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* Description : The include file for the AMD SIMD exception filter routine
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* for Microsoft Structured Exception Handling
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*
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*
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$Revision:$
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$Name:$
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$Date:$
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$Author:$
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$History: simd.h $
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*
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*/
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#include <emmintrin.h>
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// simd.h
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// This file contains structure definitions to provide
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// convenient access to SIMD and MMX data as unsigned
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// integer data.
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// change the following define to a 1 to print terse output
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#define DO_PRINT 0
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// can't use the 3DNOW SDK as written with 64 bit tools
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#if !defined (_AMD64_)
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#define USE_3DNOW_SDK 1
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#define SUPPORTS_FTZ 1
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#endif
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/*****************************************************************/
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// Basic type definitions
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typedef UINT_PTR AWORD; // x86-64 safe
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typedef union
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{
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float f;
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unsigned long l;
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} LFLOAT;
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//typedef struct
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//{
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// DWORD dw[2];
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//}
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typedef unsigned _int64 QWORD;
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typedef union
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{
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double f;
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unsigned long l[2];
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} LDOUBLE;
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typedef __declspec(align(16)) struct
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{
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LFLOAT f0,f1,f2,f3;
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} SSESINGLE;
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typedef __declspec(align(16)) struct
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{
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LDOUBLE d0,d1;
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} SSEDOUBLE;
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// this is the key data structure type used by the filter
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// and the test program. It will be aligned, since
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// the __m128 types are all aligned. It allows the
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// use of one variable to carry all the needed data
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// types.
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typedef union
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{
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__m128 m;
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__m128d md;
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__m128i mi;
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__m64 m64[2];
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DWORD l[4];
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int i[4];
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LFLOAT f[4];
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QWORD q[2];
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LDOUBLE d[2];
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} ML128;
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// this defined to provide a MMX type for the FXSTOR structure.
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typedef union
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{
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unsigned short mmx[4]; // mmx regs are 64 bits
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unsigned short fp[5]; // floating point regs are 80 bits
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} MMX80;
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/*****************************************************************/
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// define constants used by SIMD
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// define MXCSR rounding control bits.
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#define SDIMCW_RC 0x6000
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#define SDIRC_NEAR 0x0000
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#define SDIRC_DOWN 0x2000
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#define SDIRC_UP 0x4000
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#define SDIRC_CHOP 0x6000
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// define other MXCSR control bits
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#define SDDAZ 0x0040
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#define SDFTZ 0x8000
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#define opADD 0x58
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#define opAND 0x54
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#define opANDN 0x55
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#define opCMP 0xC2
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#define opCOMISS 0x2F
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#define opCVTPI2PS 0x2A
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#define opCVTTPS2PI 0x2C
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#define opCVTPS2PI 0x2D
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#define opCVTPS2PD 0x5A
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#define opCVTDQ2PS 0x5B
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#define opCVTTPD2DQ 0xE6
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#define opDIV 0x5E
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#define opMAX 0x5F
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#define opMIN 0x5D
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#define opMUL 0x59
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#define opSQRT 0x51
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#define opSUB 0x5C
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#define opUCOMISS 0x2E
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// define EFlags bits
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#define ZF (1 << 6)
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#define PF (1 << 2)
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#define CF (1 << 0)
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// define the REX prefix bits
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#define REX_PREFIX 0x40
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#define REX_W 0x8
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#define REX_R 0x4
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#define REX_X 0x2
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#define REX_B 0x1
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// define the exception information record
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// constants for the status bits
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#define IEM_INEXACT 0x20
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#define IEM_UNDERFLOW 0x10
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#define IEM_OVERFLOW 0x08
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#define IEM_ZERODIVIDE 0x04
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#define IEM_DENORMAL 0x02
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#define IEM_INVALID 0x01
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#define IEM_MASK 0x3F
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#define IMM_INEXACT 0x1000
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#define IMM_UNDERFLOW 0x0800
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#define IMM_OVERFLOW 0x0400
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#define IMM_ZERODIVIDE 0x0200
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#define IMM_DENORMAL 0x0100
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#define IMM_INVALID 0x0080
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#define IMM_MASK 0x1F80
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/*****************************************************************/
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// Instruction forms
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// Type enumerations
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//
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typedef enum
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{
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fGdWsd,
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fGdWss,
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fQqWpd,
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fQqWps,
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fVpdQq,
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fVpdWpd,
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fVpdWpdIb,
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fVpdWpdi,
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fVpdWps,
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fVpdiWpd,
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fVpdiWps,
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fVpsQq,
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fVpsWpd,
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fVpsWpdi,
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fVpsWps,
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fVpsWpsIb,
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fVsdEd,
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fVsdWsd,
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fVsdWsdIb,
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fVsdWss,
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fVssEd,
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fVssWsd,
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fVssWss,
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fVssWssIb
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} InstType;
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// operand types
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typedef enum
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{
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oEd, //General register dword mod R/M
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oGd, //General register dword
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oQq, // MMX quadword mod R/M
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oVpd, // XMM register
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oVpdi,
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oVps,
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oVsd,
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oVss,
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oWpd, // XMM mod R/M
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oWpdi,
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oWps,
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oWsd,
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oWss
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} OpType;
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// operand class
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typedef enum
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{
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oXMMreg,
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oXMMmrm,
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oMMXreg,
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oMMXmrm,
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oGENreg,
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oGENmrm,
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} OpClass;
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// data types
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typedef enum
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{
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dDW, // integer DWORD
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dPD, // packed double precision
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dPDI, // packed integer DWORD
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dPS, // packed single precision
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dQ, // integer quadword
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dSD, // scalar double precision
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dSS // scalar single precision
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} DataType;
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/*****************************************************************/
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// Structure definitions
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//
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// define the format of the data used by
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// the FXSAVE and FXRSTOR commands
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typedef struct
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{
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MMX80 mmx; // the mmx/fp register
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unsigned short reserved[3]; // floating point regs are 80 bits
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} FPMMX;
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#if defined (_AMD64_)
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// x86-64 version
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typedef struct _FXMM_SAVE_AREA {
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WORD ControlWord;
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WORD StatusWord;
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WORD TagWord;
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WORD OpCode;
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QWORD ErrorOffset;
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QWORD DataOffset;
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DWORD Mxcsr;
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DWORD reserved3;
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FPMMX FMMXreg[8];
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ML128 XMMreg[16];
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} FXMM_SAVE_AREA;
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#else
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// 32 bit x86 version
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typedef struct _FXMM_SAVE_AREA {
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WORD ControlWord;
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WORD StatusWord;
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WORD TagWord;
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WORD OpCode;
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DWORD ErrorOffset;
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WORD ErrorSelector;
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WORD reserved1;
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DWORD DataOffset;
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WORD DataSelector;
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WORD reserved2;
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DWORD Mxcsr;
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DWORD reserved3;
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FPMMX FMMXreg[8];
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ML128 XMMreg[8];
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} FXMM_SAVE_AREA;
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#endif
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typedef FXMM_SAVE_AREA *PFXMM_SAVE_AREA;
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/* This structure is used to access the excepting opcode */
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typedef struct {
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unsigned char opcode;
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unsigned char rmbyte;
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union {
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unsigned long offset; // this will need work for x86-64
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unsigned char imm8;
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} data;
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} SIMD_OP, *PSIMD_OP;
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// Define a SIMD exception flag type.
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// This is just like the _FPIEEE_EXCEPTION_FLAGS
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// except that it adds the denormal field.
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typedef struct {
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unsigned int Inexact : 1;
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unsigned int Underflow : 1;
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unsigned int Overflow : 1;
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unsigned int ZeroDivide : 1;
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unsigned int InvalidOperation : 1;
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unsigned int Denormal : 1;
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} _SIMD_EXCEPTION_FLAGS;
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/* define the local simd record structures */
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typedef struct {
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unsigned int RoundingMode;
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_SIMD_EXCEPTION_FLAGS Cause;
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_SIMD_EXCEPTION_FLAGS Enable;
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_SIMD_EXCEPTION_FLAGS Status;
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PSIMD_OP opaddress; // points to 0F xx opcode
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int curAddr; // used when parsing mod R/M byte
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unsigned char prefix;
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unsigned char opcode;
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unsigned char rmbyte;
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unsigned char immediate8;
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// add a rex field for x86-64
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unsigned char rex;
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int eopcode; // encoded opcode (index for tables)
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int op_form;
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int op1_class; // XMM, MMX, or gen register
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int op1_type; // data format
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int op2_class;
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int op2_type;
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int is_commiss;
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int commiss_val;
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unsigned int mxcsr; // value of mscsr from context record.
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ML128 op1_value;
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ML128 op2_value;
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ML128 *op2_ptr;
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} _SIMD_RECORD, *_PSIMD_RECORD;
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/* define a record for the operand form table */
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typedef struct {
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int op1; // form of operand 1
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int op2; // form of operand 2
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} _OPERAND_RECORD;
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