mirror of
https://github.com/reactos/reactos.git
synced 2024-12-28 18:15:11 +00:00
We don't define types which are usually documented on "real" NT platforms in the NDK aynmore, but instead in the ARMDDK.h. This also avoids many ndk-from-ddk cross-header issues.
Added x86-only guards around certain structures and functions which are non-portable. Also guarded certain inline functions. Added some more ARM structures, and filled out the KPRCB. Created ARM-specific headers when required. We can now have a buildable ARM kernel, minus a couple of compile errors. svn path=/trunk/; revision=32178
This commit is contained in:
parent
d54c5304b2
commit
46c6129581
14 changed files with 266 additions and 128 deletions
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@ -297,9 +297,6 @@ typedef enum _SECURITY_LOGON_TYPE
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#ifdef _X86_
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#define HARDWARE_PTE HARDWARE_PTE_X86
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#define PHARDWARE_PTE PHARDWARE_PTE_X86
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#else
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#define HARDWARE_PTE ULONG
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#define PHARDWARE_PTE PULONG
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#endif
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#define IO_CHECK_CREATE_PARAMETERS 0x0200
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@ -5570,9 +5570,9 @@ KeGetCurrentProcessorNumber(VOID)
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#elif defined(_M_ARM)
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//
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// NT-ARM is not documented, need NDK
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// NT-ARM is not documented, need DDK-ARM
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//
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#include <arm/ketypes.h>
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#include <armddk.h>
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#else
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#error Unknown architecture
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@ -23,19 +23,6 @@ Author:
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// Dependencies
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//
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//
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// IRQLs
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//
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#define PASSIVE_LEVEL 0
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#define LOW_LEVEL 0
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#define APC_LEVEL 1
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#define DISPATCH_LEVEL 2
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#define IPI_LEVEL 7
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#define POWER_LEVEL 7
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#define PROFILE_LEVEL 8
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#define HIGH_LEVEL 8
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#define SYNCH_LEVEL (IPI_LEVEL - 1)
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//
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// IPI Types
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//
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@ -62,19 +49,6 @@ Author:
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//
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#define KSEG0_BASE 0x80000000
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//
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// FIXME: mmtypes.h?
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//
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#define KIPCR 0xFFFFF000
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#define USPCR 0x7FFF0000
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#define PCR ((volatile KPCR * const)USPCR)
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#define USERPCR ((volatile KPCR * const)KIPCR)
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//
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// Synchronization-level IRQL
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//
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#define SYNCH_LEVEL DISPATCH_LEVEL
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//
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// Trap Frame Definition
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//
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@ -106,75 +80,23 @@ typedef struct _KTRAP_FRAME
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ULONG FpExtra[8];
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} KTRAP_FRAME, *PKTRAP_FRAME;
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//
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// Processor Control Region
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// On ARM, it's actually readable from user-mode, much like KUSER_SHARED_DATA
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//
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#ifdef NTOS_MODE_USER
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#define PKINTERRUPT_ROUTINE PVOID // Hack!
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#endif
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typedef struct _KPCR
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{
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ULONG MinorVersion;
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ULONG MajorVersion;
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PKINTERRUPT_ROUTINE InterruptRoutine[64];
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PVOID XcodeDispatch;
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ULONG FirstLevelDcacheSize;
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ULONG FirstLevelDcacheFillSize;
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ULONG FirstLevelIcacheSize;
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ULONG FirstLevelIcacheFillSize;
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ULONG SecondLevelDcacheSize;
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ULONG SecondLevelDcacheFillSize;
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ULONG SecondLevelIcacheSize;
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ULONG SecondLevelIcacheFillSize;
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struct _KPRCB *Prcb;
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struct _TEB *Teb;
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PVOID TlsArray;
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ULONG DcacheFillSize;
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ULONG IcacheAlignment;
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ULONG IcacheFillSize;
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ULONG ProcessorId;
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ULONG ProfileInterval;
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ULONG ProfileCount;
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ULONG StallExecutionCount;
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ULONG StallScaleFactor;
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CCHAR Number;
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PVOID DataBusError;
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PVOID InstructionBusError;
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ULONG CachePolicy;
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UCHAR IrqlMask[64];
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UCHAR IrqlTable[64];
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UCHAR CurrentIrql;
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KAFFINITY SetMember;
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struct _KTHREAD *CurrentThread;
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KAFFINITY NotMember;
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ULONG SystemReserved[6];
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ULONG DcacheAlignment;
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ULONG HalReserved[64];
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BOOLEAN FirstLevelActive;
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BOOLEAN DpcRoutineActive;
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ULONG CurrentPid;
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BOOLEAN OnInterruptStack;
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PVOID SavedInitialStack;
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PVOID SavedStackLimit;
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PVOID SystemServiceDispatchStart;
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PVOID SystemServiceDispatchEnd;
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PVOID InterruptStack;
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PVOID PanicStack;
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PVOID BadVaddr;
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PVOID InitialStack;
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PVOID StackLimit;
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ULONG QuantumEnd;
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} KPCR, *PKPCR;
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#ifndef NTOS_MODE_USER
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//
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// Stub
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// Exception Frame Definition
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//
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typedef struct _KFLOATING_SAVE
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typedef struct _KEXCEPTION_FRAME
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{
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ULONG Reserved;
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} KFLOATING_SAVE, *PKFLOATING_SAVE;
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ULONG PlaceHolder;
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} KEXCEPTION_FRAME, *PKEXCEPTION_FRAME;
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//
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// Processor State
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//
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typedef struct _KPROCESSOR_STATE
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{
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struct _CONTEXT ContextFrame;
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} KPROCESSOR_STATE, *PKPROCESSOR_STATE;
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//
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// Processor Region Control Block
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@ -187,9 +109,110 @@ typedef struct _KPRCB
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struct _KTHREAD *NextThread;
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struct _KTHREAD *IdleThread;
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UCHAR Number;
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//
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// TODO
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//
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UCHAR Reserved;
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USHORT BuildType;
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KAFFINITY SetMember;
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KPROCESSOR_STATE ProcessorState;
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ULONG KernelReserved[16];
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ULONG HalReserved[16];
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KSPIN_LOCK_QUEUE LockQueue[LockQueueMaximumLock];
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struct _KTHREAD *NpxThread;
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ULONG InterruptCount;
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ULONG KernelTime;
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ULONG UserTime;
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ULONG DpcTime;
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ULONG DebugDpcTime;
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ULONG InterruptTime;
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ULONG AdjustDpcThreshold;
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ULONG PageColor;
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UCHAR SkipTick;
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UCHAR DebuggerSavedIRQL;
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UCHAR NodeColor;
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UCHAR Spare1;
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ULONG NodeShiftedColor;
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struct _KNODE *ParentNode;
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ULONG MultiThreadProcessorSet;
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struct _KPRCB *MultiThreadSetMaster;
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ULONG SecondaryColorMask;
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LONG Sleeping;
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ULONG CcFastReadNoWait;
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ULONG CcFastReadWait;
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ULONG CcFastReadNotPossible;
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ULONG CcCopyReadNoWait;
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ULONG CcCopyReadWait;
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ULONG CcCopyReadNoWaitMiss;
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ULONG KeAlignmentFixupCount;
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ULONG SpareCounter0;
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ULONG KeDcacheFlushCount;
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ULONG KeExceptionDispatchCount;
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ULONG KeFirstLevelTbFills;
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ULONG KeIcacheFlushCount;
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ULONG KeSecondLevelTbFills;
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ULONG KeSystemCalls;
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volatile ULONG IoReadOperationCount;
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volatile ULONG IoWriteOperationCount;
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volatile ULONG IoOtherOperationCount;
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LARGE_INTEGER IoReadTransferCount;
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LARGE_INTEGER IoWriteTransferCount;
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LARGE_INTEGER IoOtherTransferCount;
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PP_LOOKASIDE_LIST PPLookasideList[16];
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PP_LOOKASIDE_LIST PPNPagedLookasideList[32];
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PP_LOOKASIDE_LIST PPPagedLookasideList[32];
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volatile ULONG PacketBarrier;
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volatile ULONG ReverseStall;
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PVOID IpiFrame;
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volatile PVOID CurrentPacket[3];
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volatile ULONG TargetSet;
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volatile PKIPI_WORKER WorkerRoutine;
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volatile ULONG IpiFrozen;
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volatile ULONG RequestSummary;
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volatile struct _KPRCB *SignalDone;
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struct _KDPC_DATA DpcData[2];
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PVOID DpcStack;
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ULONG MaximumDpcQueueDepth;
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ULONG DpcRequestRate;
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ULONG MinimumDpcRate;
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volatile UCHAR DpcInterruptRequested;
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volatile UCHAR DpcThreadRequested;
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volatile UCHAR DpcRoutineActive;
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volatile UCHAR DpcThreadActive;
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ULONG PrcbLock;
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ULONG DpcLastCount;
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volatile ULONG TimerHand;
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volatile ULONG TimerRequest;
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PVOID DpcThread;
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KEVENT DpcEvent;
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UCHAR ThreadDpcEnable;
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volatile BOOLEAN QuantumEnd;
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volatile UCHAR IdleSchedule;
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LONG DpcSetEventRequest;
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LONG TickOffset;
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KDPC CallDpc;
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LIST_ENTRY WaitListHead;
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ULONG ReadySummary;
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ULONG QueueIndex;
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LIST_ENTRY DispatcherReadyListHead[32];
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SINGLE_LIST_ENTRY DeferredReadyListHead;
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PVOID ChainedInterruptList;
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LONG LookasideIrpFloat;
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volatile LONG MmPageFaultCount;
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volatile LONG MmCopyOnWriteCount;
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volatile LONG MmTransitionCount;
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volatile LONG MmCacheTransitionCount;
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volatile LONG MmDemandZeroCount;
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volatile LONG MmPageReadCount;
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volatile LONG MmPageReadIoCount;
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volatile LONG MmCacheReadCount;
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volatile LONG MmCacheIoCount;
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volatile LONG MmDirtyPagesWriteCount;
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volatile LONG MmDirtyWriteIoCount;
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volatile LONG MmMappedPagesWriteCount;
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volatile LONG MmMappedWriteIoCount;
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CHAR VendorString[13];
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ULONG MHz;
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ULONG FeatureBits;
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volatile LARGE_INTEGER IsrTime;
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PROCESSOR_POWER_STATE PowerState;
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} KPRCB, *PKPRCB;
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//
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@ -453,19 +453,21 @@ NTSYSCALLAPI
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NTSTATUS
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NTAPI
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NtSetIntervalProfile(
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ULONG Interval,
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KPROFILE_SOURCE ClockSource
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IN ULONG Interval,
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IN KPROFILE_SOURCE ClockSource
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);
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#ifdef _M_IX86
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NTSYSCALLAPI
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NTSTATUS
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NTAPI
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NtSetLdtEntries(
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ULONG Selector1,
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LDT_ENTRY LdtEntry1,
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ULONG Selector2,
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LDT_ENTRY LdtEntry2
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IN ULONG Selector1,
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IN LDT_ENTRY LdtEntry1,
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IN ULONG Selector2,
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IN LDT_ENTRY LdtEntry2
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);
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#endif
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NTSYSCALLAPI
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NTSTATUS
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NTSTATUS
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NTAPI
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ZwSetIntervalProfile(
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ULONG Interval,
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KPROFILE_SOURCE ClockSource
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IN ULONG Interval,
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IN KPROFILE_SOURCE ClockSource
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);
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#ifdef _M_IX86
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NTSYSAPI
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NTSTATUS
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NTAPI
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ZwSetLdtEntries(
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ULONG Selector1,
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LDT_ENTRY LdtEntry1,
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ULONG Selector2,
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LDT_ENTRY LdtEntry2
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IN ULONG Selector1,
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IN LDT_ENTRY LdtEntry1,
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IN ULONG Selector2,
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IN LDT_ENTRY LdtEntry2
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);
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#endif
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NTSYSAPI
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NTSTATUS
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@ -4106,21 +4106,10 @@ static __inline__ struct _TEB * NtCurrentTeb(void)
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#elif _M_ARM
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//
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// NT-ARM is not documented, need NDK
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// NT-ARM is not documented
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//
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#define NTOS_MODE_USER
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#include <arm/ketypes.h>
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#include <armddk.h>
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//
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// FIXME: Move _M_ARM stuff away from here
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// *** AND NOT IN THE NDK! NDK IS ONLY FOR OFFICIALLY OBTAINABLE/EXISTING NT
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//
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FORCEINLINE
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struct _TEB* NtCurrentTeb(VOID)
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{
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return (struct _TEB*)USERPCR->Teb;
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}
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#else
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static __inline__ struct _TEB * NtCurrentTeb(void)
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{
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103
reactos/include/reactos/armddk.h
Normal file
103
reactos/include/reactos/armddk.h
Normal file
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@ -0,0 +1,103 @@
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#ifndef _ARMDDK_
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#define _ARMDDK_
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//
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// IRQLs
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//
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#define PASSIVE_LEVEL 0
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#define LOW_LEVEL 0
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#define APC_LEVEL 1
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#define DISPATCH_LEVEL 2
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#define IPI_LEVEL 7
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#define POWER_LEVEL 7
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#define PROFILE_LEVEL 8
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#define HIGH_LEVEL 8
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#define SYNCH_LEVEL (IPI_LEVEL - 1)
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//
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// FIXME: mmtypes.h?
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//
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#define KIPCR 0xFFFFF000
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#define USPCR 0x7FFF0000
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#define PCR ((volatile KPCR * const)USPCR)
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#define USERPCR ((volatile KPCR * const)KIPCR)
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//
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// Stub
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//
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typedef struct _KFLOATING_SAVE
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{
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ULONG Reserved;
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} KFLOATING_SAVE, *PKFLOATING_SAVE;
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//
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// Processor Control Region
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// On ARM, it's actually readable from user-mode, much like KUSER_SHARED_DATA
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//
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#ifdef _WINNT_H
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#define PKINTERRUPT_ROUTINE PVOID // Hack!
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#endif
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typedef struct _KPCR
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{
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ULONG MinorVersion;
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ULONG MajorVersion;
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PKINTERRUPT_ROUTINE InterruptRoutine[64];
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PVOID XcodeDispatch;
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ULONG FirstLevelDcacheSize;
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ULONG FirstLevelDcacheFillSize;
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ULONG FirstLevelIcacheSize;
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ULONG FirstLevelIcacheFillSize;
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ULONG SecondLevelDcacheSize;
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ULONG SecondLevelDcacheFillSize;
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ULONG SecondLevelIcacheSize;
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ULONG SecondLevelIcacheFillSize;
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struct _KPRCB *Prcb;
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struct _TEB *Teb;
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PVOID TlsArray;
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ULONG DcacheFillSize;
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ULONG IcacheAlignment;
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ULONG IcacheFillSize;
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ULONG ProcessorId;
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ULONG ProfileInterval;
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ULONG ProfileCount;
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ULONG StallExecutionCount;
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ULONG StallScaleFactor;
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CCHAR Number;
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PVOID DataBusError;
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PVOID InstructionBusError;
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ULONG CachePolicy;
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UCHAR IrqlMask[64];
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UCHAR IrqlTable[64];
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UCHAR CurrentIrql;
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KAFFINITY SetMember;
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struct _KTHREAD *CurrentThread;
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KAFFINITY NotMember;
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ULONG SystemReserved[6];
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ULONG DcacheAlignment;
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ULONG HalReserved[64];
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BOOLEAN FirstLevelActive;
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BOOLEAN DpcRoutineActive;
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ULONG CurrentPid;
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BOOLEAN OnInterruptStack;
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PVOID SavedInitialStack;
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PVOID SavedStackLimit;
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PVOID SystemServiceDispatchStart;
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PVOID SystemServiceDispatchEnd;
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PVOID InterruptStack;
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PVOID PanicStack;
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PVOID BadVaddr;
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PVOID InitialStack;
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PVOID StackLimit;
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ULONG QuantumEnd;
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} KPCR, *PKPCR;
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//
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// Get the current TEB
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//
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FORCEINLINE
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struct _TEB* NtCurrentTeb(VOID)
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{
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return (struct _TEB*)USERPCR->Teb;
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}
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||||
|
||||
#endif
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@ -25,6 +25,10 @@
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#include "../powerpc/intrin_i.h"
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#elif defined(_M_MIPS)
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#include "../mips/intrin_i.h"
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#elif defined(_M_ARM)
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//
|
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// Not sure we'll need ARM internal intrinsics
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||||
//
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||||
#else
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||||
#error "Unknown processor"
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||||
#endif
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|
|
|
@ -25,6 +25,8 @@
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#include "../powerpc/ke.h"
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#elif defined(_M_MIPS)
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#include "../mips/ke.h"
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#elif defined(_M_ARM)
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#include "../arm/ke.h"
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||||
#else
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||||
#error "Unknown processor"
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||||
#endif
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||||
|
|
|
@ -22,9 +22,11 @@
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#ifdef _M_IX86
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||||
#include <internal/i386/mm.h>
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#elif defined(_M_PPC)
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#include <internal/powerpc/ke.h>
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#include <internal/powerpc/mm.h>
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#elif defined(_M_MIPS)
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||||
#include <internal/mips/ke.h>
|
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#include <internal/mips/mm.h>
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#elif defined(_M_ARM)
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||||
#include <internal/arm/mm.h>
|
||||
#else
|
||||
#error "Unknown processor"
|
||||
#endif
|
||||
|
|
1
reactos/ntoskrnl/include/internal/arm/ke.h
Normal file
1
reactos/ntoskrnl/include/internal/arm/ke.h
Normal file
|
@ -0,0 +1 @@
|
|||
|
1
reactos/ntoskrnl/include/internal/arm/mm.h
Normal file
1
reactos/ntoskrnl/include/internal/arm/mm.h
Normal file
|
@ -0,0 +1 @@
|
|||
|
|
@ -837,11 +837,16 @@ KiInitializeMachineType(
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|||
VOID
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||||
);
|
||||
|
||||
//
|
||||
// We need to do major portability work
|
||||
//
|
||||
#ifdef _M_IX86
|
||||
VOID
|
||||
NTAPI
|
||||
KiFlushNPXState(
|
||||
IN FLOATING_SAVE_AREA *SaveArea
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
NTAPI
|
||||
|
|
|
@ -350,6 +350,7 @@ FORCEINLINE
|
|||
VOID
|
||||
KiRundownThread(IN PKTHREAD Thread)
|
||||
{
|
||||
#if defined(_M_IX86) || defined(_M_AMD64)
|
||||
/* Check if this is the NPX Thread */
|
||||
if (KeGetCurrentPrcb()->NpxThread == Thread)
|
||||
{
|
||||
|
@ -357,6 +358,7 @@ KiRundownThread(IN PKTHREAD Thread)
|
|||
KeGetCurrentPrcb()->NpxThread = NULL;
|
||||
KeArchFnInit();
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
FORCEINLINE
|
||||
|
@ -1552,6 +1554,11 @@ KeFlushProcessTb(VOID)
|
|||
/* Flush the TLB by resetting CR3 */
|
||||
#ifdef _M_PPC
|
||||
__asm__("sync\n\tisync\n\t");
|
||||
#elif _M_ARM
|
||||
//
|
||||
// We need to implement this!
|
||||
//
|
||||
ASSERTMSG("Need ARM flush routine\n", FALSE);
|
||||
#else
|
||||
__writecr3(__readcr3());
|
||||
#endif
|
||||
|
|
|
@ -280,7 +280,7 @@ DefaultQueryInfoBufferCheck(ULONG Class,
|
|||
* Use IsPointerOffset to test whether a pointer should be interpreted as an offset
|
||||
* or as a pointer
|
||||
*/
|
||||
#if defined(_X86_) || defined(_M_AMD64) || defined(_MIPS_) || defined(_PPC_)
|
||||
#if defined(_X86_) || defined(_M_AMD64) || defined(_MIPS_) || defined(_PPC_) || defined(_ARM_)
|
||||
|
||||
/* for x86 and x86-64 the MSB is 1 so we can simply test on that */
|
||||
#define IsPointerOffset(Ptr) ((LONG_PTR)(Ptr) >= 0)
|
||||
|
@ -310,10 +310,10 @@ C_ASSERT(FIELD_OFFSET(KTHREAD, ApcState.Process) == KTHREAD_APCSTATE_PROCESS);
|
|||
C_ASSERT(FIELD_OFFSET(KPROCESS, DirectoryTableBase) == KPROCESS_DIRECTORY_TABLE_BASE);
|
||||
//C_ASSERT(FIELD_OFFSET(KPCR, Tib.ExceptionList) == KPCR_EXCEPTION_LIST);
|
||||
//C_ASSERT(FIELD_OFFSET(KPCR, Self) == KPCR_SELF);
|
||||
#ifdef _M_IX86
|
||||
C_ASSERT(FIELD_OFFSET(KPCR, IRR) == KPCR_IRR);
|
||||
C_ASSERT(FIELD_OFFSET(KPCR, IDR) == KPCR_IDR);
|
||||
C_ASSERT(FIELD_OFFSET(KPCR, Irql) == KPCR_IRQL);
|
||||
#ifdef _M_IX86
|
||||
C_ASSERT(FIELD_OFFSET(KIPCR, PrcbData) + FIELD_OFFSET(KPRCB, CurrentThread) == KPCR_CURRENT_THREAD);
|
||||
C_ASSERT(FIELD_OFFSET(KIPCR, PrcbData) + FIELD_OFFSET(KPRCB, NextThread) == KPCR_PRCB_NEXT_THREAD);
|
||||
C_ASSERT(FIELD_OFFSET(KIPCR, PrcbData) + FIELD_OFFSET(KPRCB, NpxThread) == KPCR_NPX_THREAD);
|
||||
|
|
Loading…
Reference in a new issue