mirror of
https://github.com/reactos/reactos.git
synced 2025-02-25 01:39:30 +00:00
[HAL/APIC]
- Implement HalpApcInterruptHandler, fix HalpDispatchInterruptHandler - Insert a read to the APIC version register in ApicGetCurrentIrql(). This fixes inconsistencies between the internal APIC state and register reads/writes. - Remove old hacks in ApicGetCurrentIrql() and ApicSetCurrentIrql - Fix HalpVectorToIrql() - read/write cr8 for the value of the TPR on amd64 builds - Fix amd64 build svn path=/trunk/; revision=53673
This commit is contained in:
Timo Kreuzer
parent
ac09e360bb
commit
459b5c212e
5 changed files with 113 additions and 204 deletions
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@ -20,6 +20,23 @@ BOOLEAN HalpPciLockSettings;
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/* FUNCTIONS *****************************************************************/
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VOID
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NTAPI
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HalpInitProcessor(
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IN ULONG ProcessorNumber,
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IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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DPRINT1("ApicInitializeProcessor(%ld)\n", ProcessorNumber);
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/* Initialize the local APIC for this cpu */
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ApicInitializeLocalApic(ProcessorNumber);
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/* Initialize the timer */
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//ApicInitializeTimer(ProcessorNumber);
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}
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VOID
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HalpInitPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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@ -32,18 +49,4 @@ HalpInitPhase1(VOID)
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}
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VOID
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INIT_FUNCTION
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HalpInitializeClock(VOID)
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{
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}
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VOID
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HalpCalibrateStallExecution()
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{
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}
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VOID
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HalpInitializePICs(IN BOOLEAN EnableInterrupts)
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{
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}
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@ -14,99 +14,8 @@
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/* GLOBALS ********************************************************************/
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LARGE_INTEGER HalpPerformanceFrequency;
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//LARGE_INTEGER HalpPerformanceFrequency;
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/* FUNCTIONS ******************************************************************/
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VOID
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FASTCALL
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HalClearSoftwareInterrupt(
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IN KIRQL Irql)
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{
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UNIMPLEMENTED;
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}
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VOID
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FASTCALL
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HalRequestSoftwareInterrupt(
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IN KIRQL Irql)
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{
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UNIMPLEMENTED;
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}
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BOOLEAN
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NTAPI
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HalBeginSystemInterrupt(
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IN KIRQL Irql,
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IN UCHAR Vector,
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OUT PKIRQL OldIrql)
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{
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UNIMPLEMENTED;
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return FALSE;
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}
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BOOLEAN
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NTAPI
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HalEnableSystemInterrupt(
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IN UCHAR Vector,
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IN KIRQL Irql,
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IN KINTERRUPT_MODE InterruptMode)
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{
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UNIMPLEMENTED;
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return FALSE;
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}
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VOID
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NTAPI
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HalDisableSystemInterrupt(
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IN UCHAR Vector,
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IN KIRQL Irql)
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{
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UNIMPLEMENTED;
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}
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VOID
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NTAPI
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HalEndSystemInterrupt(
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IN KIRQL OldIrql,
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IN PKTRAP_FRAME TrapFrame)
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{
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UNIMPLEMENTED;
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}
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LARGE_INTEGER
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NTAPI
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KeQueryPerformanceCounter(
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OUT PLARGE_INTEGER PerformanceFrequency OPTIONAL)
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{
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LARGE_INTEGER Result;
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// ASSERT(HalpPerformanceFrequency.QuadPart != 0);
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/* Does the caller want the frequency? */
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if (PerformanceFrequency)
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{
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/* Return value */
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*PerformanceFrequency = HalpPerformanceFrequency;
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}
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Result.QuadPart = __rdtsc();
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return Result;
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}
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VOID
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NTAPI
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HalCalibratePerformanceCounter(IN volatile PLONG Count,
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IN ULONGLONG NewCount)
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{
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UNIMPLEMENTED;
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}
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ULONG
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NTAPI
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HalSetTimeIncrement(IN ULONG Increment)
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{
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UNIMPLEMENTED;
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return 0;
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}
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@ -23,70 +23,6 @@ MsgUnimplemented:
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.code64
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PUBLIC HalpCalibrateStallExecution@0
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HalpCalibrateStallExecution@0:
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PUBLIC HalpProfileInterrupt
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HalpProfileInterrupt:
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PUBLIC KeStallExecutionProcessor
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KeStallExecutionProcessor:
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/* Get the number of microseconds required */
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jecxz Done
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/* Multiply by the stall factor */
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mov eax, gs:[PcStallScaleFactor]
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mul ecx
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/* Align to 16 bytes */
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.align 16
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/* Jump to subtraction loop */
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jmp SubtractLoop
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/* Align to 16 bytes */
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.align 16
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/* Subtract one count */
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SubtractLoop:
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sub eax, 1
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jnz SubtractLoop
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Done:
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/* Return */
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ret 4
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PUBLIC HalpQuery8254Counter
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HalpQuery8254Counter:
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/* Save EFLAGS and disable interrupts */
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pushfq
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cli
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/* Set timer data */
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mov al, 0
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out HEX(43), al
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jmp $+2
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/* Read current timer */
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in al, HEX(40)
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jmp $+2
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movzx ecx, al
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in al, HEX(40)
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mov ch, al
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/* Return it and restore interrupt state */
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mov eax, ecx
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popfq
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ret
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PUBLIC HalpClockInterrupt
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HalpClockInterrupt:
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UNIMPLEMENTED _HalpClockInterrupt
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iret
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END
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@ -16,9 +16,11 @@
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#include <debug.h>
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#include "apic.h"
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void HackEoi(void);
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/* GLOBALS ********************************************************************/
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ULONG ApicVersion;
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UCHAR HalpVectorToIndex[256];
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#ifndef _M_AMD64
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@ -101,6 +103,14 @@ IOApicWrite(UCHAR Register, ULONG Value)
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*(volatile ULONG *)(IOAPIC_BASE + IOAPIC_IOWIN) = Value;
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}
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VOID
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FORCEINLINE
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ApicSendEOI(void)
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{
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//ApicWrite(APIC_EOI, 0);
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HackEoi();
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}
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KIRQL
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FORCEINLINE
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ApicGetProcessorIrql(VOID)
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@ -113,24 +123,27 @@ KIRQL
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FORCEINLINE
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ApicGetCurrentIrql(VOID)
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{
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// HACK: This won't work with amd64, where cr8 is modified directly, but
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// VBox is broken and returns a wrong value when using a vmmcall after a
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// page table modification.
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return KeGetPcr()->Irql;
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#ifdef _M_AMD64
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return (KIRQL)__readcr8();
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#else
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// HACK: some magic to Sync VBox's APIC registers
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ApicRead(APIC_VER);
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/* Read the TPR and convert it to an IRQL */
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return TprToIrql(ApicRead(APIC_TPR));
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#endif
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}
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VOID
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FORCEINLINE
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ApicSetCurrentIrql(KIRQL Irql)
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{
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#ifdef _M_AMD64
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__writecr8(Irql);
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#else
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/* Convert IRQL and write the TPR */
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ApicWrite(APIC_TPR, IrqlToTpr(Irql));
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/* HACK: Keep PCR field in sync, s.a. */
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KeGetPcr()->Irql = Irql;
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#endif
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}
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UCHAR
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@ -150,7 +163,7 @@ KIRQL
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FASTCALL
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HalpVectorToIrql(UCHAR Vector)
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{
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return TprToIrql(Vector >> 2);
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return TprToIrql(Vector);
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}
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UCHAR
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@ -249,6 +262,9 @@ ApicInitializeLocalApic(ULONG Cpu)
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SpIntRegister.FocusCPUCoreChecking = 0;
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ApicWrite(APIC_SIVR, SpIntRegister.Long);
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/* Read the version and save it globally */
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if (Cpu == 0) ApicVersion = ApicRead(APIC_VER);
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/* Set the mode to flat (max 8 CPUs supported!) */
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ApicWrite(APIC_DFR, APIC_DF_Flat);
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@ -430,6 +446,7 @@ ApicInitializeIOApic(VOID)
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ReDirReg.Destination = ApicRead(APIC_ID);
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IOApicWrite(IOAPIC_REDTBL + 2 * APIC_CLOCK_INDEX, ReDirReg.Long0);
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ApicSendEOI();
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}
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VOID
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@ -447,15 +464,23 @@ HalpInitializePICs(IN BOOLEAN EnableInterrupts)
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/* Initialize the I/O APIC */
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ApicInitializeIOApic();
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ApicWrite(APIC_EOI, 0);
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/* Register interrupt handlers */
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/* Manually reserve some vectors */
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HalpVectorToIndex[APIC_CLOCK_VECTOR] = 8;
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HalpVectorToIndex[APC_VECTOR] = 99;
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HalpVectorToIndex[DISPATCH_VECTOR] = 99;
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/* Set interrupt handlers in the IDT */
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KeRegisterInterruptHandler(APIC_CLOCK_VECTOR, HalpClockInterrupt);
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#ifndef _M_AMD64
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KeRegisterInterruptHandler(APC_VECTOR, HalpApcInterrupt);
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KeRegisterInterruptHandler(DPC_VECTOR, HalpDispatchInterrupt);
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KeRegisterInterruptHandler(DISPATCH_VECTOR, HalpDispatchInterrupt);
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#endif
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/* Register the vectors for APC and dispatch interrupts */
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HalpRegisterVector(IDT_INTERNAL, 0, APC_VECTOR, APC_LEVEL);
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HalpRegisterVector(IDT_INTERNAL, 0, DISPATCH_VECTOR, DISPATCH_LEVEL);
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/* Restore interrupt state */
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if (EnableInterrupts) EFlags |= EFLAGS_INTERRUPT_MASK;
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__writeeflags(EFlags);
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@ -466,11 +491,40 @@ DECLSPEC_NORETURN
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FASTCALL
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HalpApcInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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{
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KPROCESSOR_MODE ProcessorMode;
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KIRQL OldIrql;
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ASSERT(ApicGetCurrentIrql() < APC_LEVEL);
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ASSERT(ApicGetProcessorIrql() == APC_LEVEL);
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UNIMPLEMENTED;
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ASSERT(FALSE);
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/* Enter trap */
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KiEnterInterruptTrap(TrapFrame);
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/* Save the old IRQL */
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OldIrql = ApicGetCurrentIrql();
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/* Set APC_LEVEL */
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ApicSetCurrentIrql(APC_LEVEL);
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/* Kernel or user APC? */
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if (KiUserTrap(TrapFrame)) ProcessorMode = UserMode;
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else if (TrapFrame->EFlags & EFLAGS_V86_MASK) ProcessorMode = UserMode;
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else ProcessorMode = KernelMode;
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/* Enable interrupts and call the kernel's APC interrupt handler */
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_enable();
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KiDeliverApc(ProcessorMode, NULL, TrapFrame);
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/* Disable interrupts */
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_disable();
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/* Restore the old IRQL */
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ApicSetCurrentIrql(OldIrql);
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/* End the interrupt */
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ApicSendEOI();
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/* Exit the interrupt */
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KiEoiHelper(TrapFrame);
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}
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#ifndef _M_AMD64
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@ -480,10 +534,13 @@ FASTCALL
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HalpDispatchInterruptHandler(IN PKTRAP_FRAME TrapFrame)
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{
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KIRQL OldIrql = ApicGetCurrentIrql();
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__debugbreak();
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ASSERT(OldIrql < DISPATCH_LEVEL);
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ASSERT(ApicGetProcessorIrql() == DISPATCH_LEVEL);
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/* Enter trap */
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KiEnterInterruptTrap(TrapFrame);
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ApicSetCurrentIrql(DISPATCH_LEVEL);
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/* Enable interrupts and call the kernel's DPC interrupt handler */
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@ -493,13 +550,20 @@ __debugbreak();
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ApicSetCurrentIrql(OldIrql);
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ApicWrite(APIC_EOI, 0);
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ApicSendEOI();
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/* Exit the interrupt */
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KiEoiHelper(TrapFrame);
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}
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#endif
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VOID
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NTAPI
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HalpSendEOI(VOID)
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{
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ApicSendEOI();
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}
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/* PUBLIC FUNCTIONS ***********************************************************/
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VOID
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@ -580,14 +644,6 @@ HalDisableSystemInterrupt(
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IOApicWrite(IOAPIC_REDTBL + 2 * Irql, ReDirReg.Long0);
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}
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VOID
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NTAPI
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HalpSendEOI(VOID)
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{
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/* Write 0 to the EndOfInterruptRegister */
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ApicWrite(APIC_EOI, 0);
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}
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#ifndef _M_AMD64
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BOOLEAN
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NTAPI
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@ -609,19 +665,14 @@ HalBeginSystemInterrupt(
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return TRUE;
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}
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void HackEoi(void);
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VOID
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NTAPI
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HalEndSystemInterrupt(
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IN KIRQL OldIrql,
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IN PKTRAP_FRAME TrapFrame)
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{
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/* Write 0 to the EndOfInterruptRegister */
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//ApicWrite(APIC_EOI, 0);
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// HACK!
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HackEoi();
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/* Send an EOI */
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ApicSendEOI();
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/* Restore the old IRQL */
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ApicSetCurrentIrql(OldIrql);
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@ -4,9 +4,7 @@
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/hal/x86/halinit.c
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* PURPOSE: Initalize the x86 hal
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* PROGRAMMER: David Welch (welch@cwcom.net)
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* UPDATE HISTORY:
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* 11/06/98: Created
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* PROGRAMMER: Timo Kreuzer (timo.kreuzer@reactos.org)
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*/
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/* INCLUDES *****************************************************************/
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@ -14,12 +12,17 @@
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#include <hal.h>
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#define NDEBUG
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#include <debug.h>
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#include "apic.h"
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VOID
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NTAPI
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ApicInitializeLocalApic(ULONG Cpu);
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/* FUNCTIONS ***************************************************************/
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/* GLOBALS ******************************************************************/
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const USHORT HalpBuildType = HAL_BUILD_TYPE;
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/* FUNCTIONS ****************************************************************/
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VOID
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NTAPI
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@ -39,6 +42,13 @@ VOID
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HalpInitPhase0(IN PLOADER_PARAMETER_BLOCK LoaderBlock)
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{
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/* Enable clock interrupt handler */
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HalpEnableInterruptHandler(IDT_INTERNAL,
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0,
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APIC_CLOCK_VECTOR,
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CLOCK2_LEVEL,
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HalpClockInterrupt,
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Latched);
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}
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VOID
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