[FAST486][NTVDM]

The behavior of the I/O port bus depends on the data width. In the case
of 16-bit/32-bit access, two/four adjacent ports will be accessed.


svn path=/branches/ntvdm/; revision=60891
This commit is contained in:
Aleksandar Andrejevic 2013-11-09 03:30:27 +00:00
parent e971f67673
commit 43ee57f2f7
4 changed files with 42 additions and 30 deletions

View file

@ -146,22 +146,24 @@ Fast486MemWriteCallback(PFAST486_STATE State, ULONG Address, PVOID Buffer, ULONG
static VOID
NTAPI
Fast486IoReadCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG Size)
Fast486IoReadCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG Size, UCHAR Width)
{
UNREFERENCED_PARAMETER(State);
UNREFERENCED_PARAMETER(Port);
UNREFERENCED_PARAMETER(Buffer);
UNREFERENCED_PARAMETER(Size);
UNREFERENCED_PARAMETER(Width);
}
static VOID
NTAPI
Fast486IoWriteCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG Size)
Fast486IoWriteCallback(PFAST486_STATE State, ULONG Port, PVOID Buffer, ULONG Size, UCHAR Width)
{
UNREFERENCED_PARAMETER(State);
UNREFERENCED_PARAMETER(Port);
UNREFERENCED_PARAMETER(Buffer);
UNREFERENCED_PARAMETER(Size);
UNREFERENCED_PARAMETER(Width);
}
static VOID