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- Fixed the offset in ReadPciConfigUshort/WritePciConfigUshort.
svn path=/trunk/; revision=4585
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@ -1,4 +1,4 @@
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/* $Id: pci.c,v 1.2 2002/05/05 14:57:45 chorns Exp $
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/* $Id: pci.c,v 1.3 2003/04/26 07:06:55 hbirr Exp $
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*
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* PROJECT: ReactOS PCI Bus driver
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* FILE: pci.c
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@ -68,7 +68,7 @@ PciReadConfigUshort(UCHAR Bus,
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{
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case pbtType1:
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
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*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1));
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*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 2));
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return STATUS_SUCCESS;
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case pbtType2:
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@ -150,7 +150,7 @@ PciWriteConfigUshort(UCHAR Bus,
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{
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case pbtType1:
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
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WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1), Value);
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WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 2), Value);
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return STATUS_SUCCESS;
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case pbtType2:
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@ -1,4 +1,4 @@
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/* $Id: pci.c,v 1.8 2003/04/06 10:45:15 chorns Exp $
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/* $Id: pci.c,v 1.9 2003/04/26 07:06:54 hbirr Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -115,7 +115,7 @@ ReadPciConfigUshort(UCHAR Bus,
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case 1:
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KeAcquireSpinLock(&PciLock, &oldIrql);
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
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*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1));
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*Value = READ_PORT_USHORT((PUSHORT)0xCFC + (Offset & 2));
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KeReleaseSpinLock(&PciLock, oldIrql);
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return STATUS_SUCCESS;
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@ -215,7 +215,7 @@ WritePciConfigUshort(UCHAR Bus,
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case 1:
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KeAcquireSpinLock(&PciLock, &oldIrql);
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus, Slot, Offset));
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WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 1), Value);
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WRITE_PORT_USHORT((PUSHORT)0xCFC + (Offset & 2), Value);
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KeReleaseSpinLock(&PciLock, oldIrql);
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return STATUS_SUCCESS;
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