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Added PCI class and subclass definitions.
svn path=/trunk/; revision=3767
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2 changed files with 37 additions and 3 deletions
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@ -1,4 +1,5 @@
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#ifndef __INCLUDE_DDK_CMTYPES_H
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#define __INCLUDE_DDK_CMTYPES_H
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/*
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/*
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* Object Manager structures and typedefs
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* Object Manager structures and typedefs
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*/
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*/
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@ -98,3 +99,4 @@ typedef struct _KEY_VALUE_ENTRY
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ULONG Type;
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ULONG Type;
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} KEY_VALUE_ENTRY, *PKEY_VALUE_ENTRY;
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} KEY_VALUE_ENTRY, *PKEY_VALUE_ENTRY;
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#endif /* __INCLUDE_DDK_CMTYPES_H */
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/* $Id: haltypes.h,v 1.6 2002/10/02 19:30:46 ekohl Exp $
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/* $Id: haltypes.h,v 1.7 2002/11/18 22:39:02 ekohl Exp $
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*
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*
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* COPYRIGHT: See COPYING in the top level directory
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* PROJECT: ReactOS kernel
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@ -164,7 +164,7 @@ typedef struct _PCI_COMMON_CONFIG
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#define PCI_INVALID_VENDORID 0xFFFF
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#define PCI_INVALID_VENDORID 0xFFFF
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/* Bit encodings for PCI_COMMON_CONFIG.HeaderType */
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/* Bit encodings for PCI_COMMON_CONFIG.HeaderType */
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#define PCI_MULTIFUNCTION 0x80
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#define PCI_MULTIFUNCTION 0x80
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#define PCI_DEVICE_TYPE 0x00
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#define PCI_DEVICE_TYPE 0x00
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@ -197,12 +197,43 @@ typedef struct _PCI_COMMON_CONFIG
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#define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
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#define PCI_STATUS_DETECTED_PARITY_ERROR 0x8000
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/* PCI device classes */
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#define PCI_CLASS_PRE_20 0x00
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#define PCI_CLASS_MASS_STORAGE_CTLR 0x01
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#define PCI_CLASS_NETWORK_CTLR 0x02
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#define PCI_CLASS_DISPLAY_CTLR 0x03
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#define PCI_CLASS_MULTIMEDIA_DEV 0x04
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#define PCI_CLASS_MEMORY_CTLR 0x05
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#define PCI_CLASS_BRIDGE_DEV 0x06
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#define PCI_CLASS_SIMPLE_COMMS_CTLR 0x07
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#define PCI_CLASS_BASE_SYSTEM_DEV 0x08
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#define PCI_CLASS_INPUT_DEV 0x09
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#define PCI_CLASS_DOCKING_STATION 0x0a
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#define PCI_CLASS_PROCESSOR 0x0b
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#define PCI_CLASS_SERIAL_BUS_CTLR 0x0c
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/* PCI device subclasses for class 1 (mass storage controllers)*/
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#define PCI_SUBCLASS_MSC_SCSI_BUS_CTLR 0x00
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#define PCI_SUBCLASS_MSC_IDE_CTLR 0x01
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#define PCI_SUBCLASS_MSC_FLOPPY_CTLR 0x02
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#define PCI_SUBCLASS_MSC_IPI_CTLR 0x03
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#define PCI_SUBCLASS_MSC_RAID_CTLR 0x04
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#define PCI_SUBCLASS_MSC_OTHER 0x80
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/* Bit encodes for PCI_COMMON_CONFIG.u.type0.BaseAddresses */
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/* Bit encodes for PCI_COMMON_CONFIG.u.type0.BaseAddresses */
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#define PCI_ADDRESS_IO_SPACE 0x00000001
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#define PCI_ADDRESS_IO_SPACE 0x00000001
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#define PCI_ADDRESS_MEMORY_TYPE_MASK 0x00000006
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#define PCI_ADDRESS_MEMORY_TYPE_MASK 0x00000006
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#define PCI_ADDRESS_MEMORY_PREFETCHABLE 0x00000008
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#define PCI_ADDRESS_MEMORY_PREFETCHABLE 0x00000008
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#define PCI_ADDRESS_IO_ADDRESS_MASK 0xfffffffc
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#define PCI_ADDRESS_MEMORY_ADDRESS_MASK 0xfffffff0
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#define PCI_ADDRESS_ROM_ADDRESS_MASK 0xfffff800
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#define PCI_TYPE_32BIT 0
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#define PCI_TYPE_32BIT 0
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#define PCI_TYPE_20BIT 2
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#define PCI_TYPE_20BIT 2
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#define PCI_TYPE_64BIT 4
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#define PCI_TYPE_64BIT 4
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@ -213,6 +244,7 @@ typedef struct _PCI_COMMON_CONFIG
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#define PCI_ROMADDRESS_ENABLED 0x00000001
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#define PCI_ROMADDRESS_ENABLED 0x00000001
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typedef struct _PCI_SLOT_NUMBER
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typedef struct _PCI_SLOT_NUMBER
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{
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{
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union
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union
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