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https://github.com/reactos/reactos.git
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Added preliminary pci bus scanner
svn path=/trunk/; revision=1303
This commit is contained in:
Eric Kohl
parent
7b9adffa48
commit
375b8055e3
3 changed files with 296 additions and 29 deletions
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@ -1,4 +1,4 @@
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/* $Id: misc.c,v 1.5 2000/08/12 19:33:20 dwelch Exp $
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/* $Id: misc.c,v 1.6 2000/08/17 17:42:53 ekohl Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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@ -10,7 +10,7 @@
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/* INCLUDES *****************************************************************/
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#include <ddk/ntddk.h>
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#include <internal/hal.h>
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/* FUNCTIONS ****************************************************************/
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@ -74,20 +74,23 @@ HalReportResourceUsage (
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*/
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/*
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* Initialize PCI, IsaPnP and other busses.
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* Initialize PCI bus.
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*/
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HalpInitPciBus ();
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#if 0
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/*
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* Initialize IsaPnP bus.
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*/
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HalpInitIsaPnpBus ();
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/*
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* Initialize other busses???
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*/
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#if 0
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/*
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* Probe for a BIOS32 extension
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*/
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Hal_bios32_probe();
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/*
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* Probe for buses attached to the computer
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*/
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HalPciProbe();
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#endif
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return;
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@ -1,11 +1,14 @@
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/*
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/* $Id: pci.c,v 1.5 2000/08/17 17:42:53 ekohl Exp $
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*
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* COPYRIGHT: See COPYING in the top level directory
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* PROJECT: ReactOS kernel
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* FILE: ntoskrnl/hal/x86/pci.c
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* PURPOSE: Interfaces to the PCI bus
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* PROGRAMMER: David Welch (welch@mcmail.com)
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* Eric Kohl (ekohl@rz-online.de)
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* UPDATE HISTORY:
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* 05/06/98: Created
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* 05/06/1998: Created
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* 17/08/2000: Added preliminary pci bus scanner
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*/
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/*
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@ -17,20 +20,284 @@
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#include <ddk/ntddk.h>
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#include <internal/i386/hal.h>
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#define NDEBUG
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#include <internal/debug.h>
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/* MACROS *****************************************************************/
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/* access type 1 macros */
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#define PCI_FUNC(devfn) ((devfn) & 0x07)
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#define CONFIG_CMD(bus, device_fn, where) \
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(0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
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#define PCIBIOS_SUCCESSFUL 0x00
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#define PCIBIOS_DEVICE_NOT_FOUND 0x86
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#define PCIBIOS_BAD_REGISTER_NUMBER 0x87
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// access type 2 macros
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#define IOADDR(devfn, where) ((0xC000 | ((devfn & 0x78) << 5)) + where)
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#define FUNC(devfn) (((devfn & 7) << 1) | 0xf0)
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/* FUNCTIONS **************************************************************/
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#define PCI_SERVICE (('$' << 0) + ('P' << 8) + ('C' << 16) + ('I'<<24))
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BOOL HalPciProbe()
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/*
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* FUNCTION: Probes for an PCI bus
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* RETURNS: True if detected
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* Bus access type 1 (recommended)
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*/
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static int
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ReadPciConfigUcharType1(UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PUCHAR Value)
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{
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if (Hal_bios32_is_service_present(PCI_SERVICE))
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{
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DbgPrint("Detected PCI service\n");
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return(TRUE);
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}
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return(FALSE);
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
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*Value = READ_PORT_UCHAR((PUCHAR)0xCFC + (where&3));
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return PCIBIOS_SUCCESSFUL;
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}
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#if 0
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static int
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ReadPciConfigUshortType1(UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PUSHORT Value)
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{
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if ((where & 1) != 0)
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{
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
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*value = READ_PORT_USHORT((PUSHORT)0xCFC + (where&1));
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return PCIBIOS_SUCCESSFUL;
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}
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#endif
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static int
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ReadPciConfigUlongType1(UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PULONG Value)
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{
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if ((where & 3) != 0)
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{
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return PCIBIOS_BAD_REGISTER_NUMBER;
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}
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WRITE_PORT_ULONG((PULONG)0xCF8, CONFIG_CMD(Bus,device_fn,where));
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*Value = READ_PORT_ULONG((PULONG)0xCFC);
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return PCIBIOS_SUCCESSFUL;
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}
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static void
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ScanPciBusType1(ULONG Bus)
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{
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USHORT dev_fn;
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UCHAR hdr_type;
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ULONG foo;
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for (dev_fn = 0; dev_fn < 256; dev_fn++)
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{
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if (PCI_FUNC(dev_fn) == 0)
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{
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/* 0E=PCI_HEADER_TYPE */
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ReadPciConfigUcharType1(Bus, dev_fn, 0x0E, &hdr_type);
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}
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else if ((hdr_type & 0x80) == 0)
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{
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/* not a multi-function device */
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continue;
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}
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/* 00=PCI_VENDOR_ID */
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ReadPciConfigUlongType1(Bus, dev_fn, 0x00, &foo);
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/* some broken boards return 0 if a slot is empty: */
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if (foo == 0xFFFFFFFF || foo == 0)
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{
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hdr_type = 0;
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continue;
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}
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DbgPrint("dev_fn=%3u, Vendor 0x%04lX, Device 0x%04lX\n",
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dev_fn, foo & 0xFFFF, (foo >> 16) & 0xFFFF);
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}
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}
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static NTSTATUS
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ScanPciBussesType1(VOID)
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{
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ULONG i;
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ULONG temp;
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DPRINT("ScanPciBussesType1()\n");
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DPRINT("Checking if configuration type 1 works\n");
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WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x01);
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temp = READ_PORT_ULONG((PULONG)0xCF8);
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WRITE_PORT_ULONG((PULONG)0xCF8, 0x80000000);
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if (READ_PORT_ULONG((PULONG)0xCF8) != 0x80000000)
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{
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WRITE_PORT_ULONG((PULONG)0xCF8, temp);
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DPRINT("No pci configuration type 1\n");
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return STATUS_UNSUCCESSFUL;
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}
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DPRINT("Using configuration type 1\n");
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WRITE_PORT_ULONG((PULONG)0xCF8, temp);
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for (i = 0; i < 8; i++)
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{
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DPRINT("Scanning PCI bus %u...\n", i);
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ScanPciBusType1(i);
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}
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WRITE_PORT_ULONG((PULONG)0xCF8, temp);
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return STATUS_SUCCESS;
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}
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/*
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* Bus access type 2 (should not be used any longer)
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*/
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static int
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ReadPciConfigUcharType2 (UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PUCHAR Value)
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{
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if ((device_fn & 0x80) != 0)
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{
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
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WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
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*Value = READ_PORT_UCHAR((PUCHAR)(IOADDR(device_fn,where)));
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
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return PCIBIOS_SUCCESSFUL;
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}
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#if 0
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static int
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ReadPciConfigUshortType2(UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PUSHORT Value)
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{
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if ((device_fn & 0x80) != 0)
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{
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
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WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
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*Value = READ_PORT_USHORT((PUSHORT)(IOADDR(device_fn,where)));
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
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return PCIBIOS_SUCCESSFUL;
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}
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#endif
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static int
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ReadPciConfigUlongType2(UCHAR Bus,
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UCHAR device_fn,
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UCHAR where,
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PULONG Value)
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{
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if ((device_fn & 0x80) != 0)
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{
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return PCIBIOS_DEVICE_NOT_FOUND;
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}
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, FUNC(device_fn));
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WRITE_PORT_UCHAR((PUCHAR)0xCFA, Bus);
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*Value = READ_PORT_ULONG((PULONG)(IOADDR(device_fn,where)));
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0);
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return PCIBIOS_SUCCESSFUL;
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}
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static void
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ScanPciBusType2(ULONG Bus)
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{
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USHORT dev_fn;
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UCHAR hdr_type;
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ULONG foo;
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for (dev_fn = 0; dev_fn < 256; dev_fn++)
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{
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if (PCI_FUNC(dev_fn) == 0)
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{
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/* 0E=PCI_HEADER_TYPE */
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ReadPciConfigUcharType2(Bus, dev_fn, 0x0E, &hdr_type);
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}
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else if ((hdr_type & 0x80) == 0)
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{
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/* not a multi-function device */
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continue;
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}
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/* 00=PCI_VENDOR_ID */
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ReadPciConfigUlongType2(Bus, dev_fn, 0x00, &foo);
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/* some broken boards return 0 if a slot is empty: */
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if (foo == 0xFFFFFFFF || foo == 0)
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{
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hdr_type = 0;
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continue;
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}
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DbgPrint("dev_fn=%3u, Vendor 0x%04lX, Device 0x%04lX\n",
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dev_fn, foo & 0xFFFF, (foo >> 16) & 0xFFFF);
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}
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}
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static NTSTATUS
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ScanPciBussesType2(VOID)
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{
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ULONG i;
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DPRINT("Checking if configuration type 2 works\n");
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WRITE_PORT_UCHAR((PUCHAR)0xCFB, 0x00);
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WRITE_PORT_UCHAR((PUCHAR)0xCF8, 0x00);
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WRITE_PORT_UCHAR((PUCHAR)0xCFA, 0x00);
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if (READ_PORT_UCHAR((PUCHAR)0xCF8) != 0x00 ||
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READ_PORT_UCHAR((PUCHAR)0xCFB) != 0x00)
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{
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DPRINT("No pci configuration type 2\n");
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return STATUS_UNSUCCESSFUL;
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}
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DPRINT("Using configuration type 2\n");
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for (i = 0; i < 8; i++)
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{
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DPRINT("Scanning PCI bus %u...\n", i);
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ScanPciBusType2(i);
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}
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return STATUS_UNSUCCESSFUL;
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}
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VOID HalpInitPciBus (VOID)
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{
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NTSTATUS Status;
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DPRINT("HalpInitPciBus()\n");
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Status = ScanPciBussesType1();
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if (NT_SUCCESS(Status))
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{
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return;
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}
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Status = ScanPciBussesType2();
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if (NT_SUCCESS(Status))
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{
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return;
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}
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DbgPrint("No pci bus found\n");
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}
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/* EOF */
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@ -8,12 +8,6 @@
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#include <ddk/service.h>
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#include <internal/ntoskrnl.h>
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/*
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* FUNCTION: Probes for a PCI bus
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* RETURNS: True if found
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*/
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BOOL HalPciProbe(void);
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/*
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* FUNCTION: Probes for a BIOS32 extension
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*/
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@ -35,4 +29,7 @@ VOID HalpInitPICs(VOID);
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/* udelay.c */
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VOID HalpCalibrateStallExecution(VOID);
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/* pci.c */
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VOID HalpInitPciBus (VOID);
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#endif /* __INTERNAL_HAL_HAL_H */
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