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[E1000] Initial send implementation.
CORE-14675
This commit is contained in:
Mark Jansen
parent
ebad64bcfe
commit
3606404b2e
4 changed files with 280 additions and 33 deletions
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@ -31,6 +31,22 @@ typedef struct _ETH_HEADER {
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typedef enum _E1000_RCVBUF_SIZE
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{
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E1000_RCVBUF_2048 = 0,
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E1000_RCVBUF_1024 = 1,
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E1000_RCVBUF_512 = 2,
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E1000_RCVBUF_256 = 3,
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E1000_RCVBUF_INDEXMASK = 3,
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E1000_RCVBUF_RESERVED = 4 | 0,
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E1000_RCVBUF_16384 = 4 | 1,
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E1000_RCVBUF_8192 = 4 | 2,
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E1000_RCVBUF_4096 = 4 | 3,
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} E1000_RCVBUF_SIZE;
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#include <pshpack1.h>
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@ -95,13 +111,20 @@ C_ASSERT(sizeof(E1000_TRANSMIT_DESCRIPTOR) == 16);
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#define E1000_REG_MDIC 0x0020 /* MDI Control Register, R/W */
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#define E1000_REG_VET 0x0038 /* VLAN Ether Type, R/W */
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#define E1000_REG_ICR 0x00C0 /* Interrupt Cause Read, R/clr */
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#define E1000_REG_ITR 0x00C4 /* Interrupt Throttling Register, R/W */
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#define E1000_REG_IMS 0x00D0 /* Interrupt Mask Set/Read Register, R/W */
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#define E1000_REG_IMC 0x00D8 /* Interrupt Mask Clear, W */
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#define E1000_REG_RCTL 0x0100 /* Receive Control Register, R/W */
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#define E1000_REG_RCTL 0x0100 /* Receive Control Register, R/W */
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#define E1000_REG_TCTL 0x0400 /* Transmit Control Register, R/W */
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#define E1000_REG_RDBAL 0x2800 /* Receive Descriptor Base Address Low, R/W */
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#define E1000_REG_RDBAH 0x2804 /* Receive Descriptor Base Address High, R/W */
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#define E1000_REG_RDLEN 0x2808 /* Receive Descriptor Length, R/W */
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#define E1000_REG_RDH 0x2810 /* Receive Descriptor Head, R/W */
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#define E1000_REG_RDT 0x2818 /* Receive Descriptor Tail, R/W */
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#define E1000_REG_TDBAL 0x3800 /* Transmit Descriptor Base Address Low, R/W */
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#define E1000_REG_TDBAH 0x3804 /* Transmit Descriptor Base Address High, R/W */
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#define E1000_REG_TDLEN 0x3808 /* Transmit Descriptor Length, R/W */
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@ -142,6 +165,13 @@ C_ASSERT(sizeof(E1000_TRANSMIT_DESCRIPTOR) == 16);
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/* E1000_REG_IMS */
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#define E1000_IMS_TXDW (1 << 0) /* Transmit Descriptor Written Back */
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#define E1000_IMS_LSC (1 << 2) /* Sets mask for Link Status Change */
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#define E1000_IMS_RXDMT0 (1 << 4) /* Receive Descriptor Minimum Threshold Reached */
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#define E1000_IMS_RXT0 (1 << 7) /* Receiver Timer Interrupt */
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/* E1000_REG_ITR */
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#define MAX_INTS_PER_SEC 2000
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#define DEFAULT_ITR 1000000000/(MAX_INTS_PER_SEC * 256)
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/* E1000_REG_RCTL */
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@ -150,7 +180,10 @@ C_ASSERT(sizeof(E1000_TRANSMIT_DESCRIPTOR) == 16);
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#define E1000_RCTL_UPE (1 << 3) /* Unicast Promiscuous Enabled */
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#define E1000_RCTL_MPE (1 << 4) /* Multicast Promiscuous Enabled */
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#define E1000_RCTL_BAM (1 << 15) /* Broadcast Accept Mode */
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#define E1000_RCTL_BSIZE_SHIFT 16
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#define E1000_RCTL_PMCF (1 << 23) /* Pass MAC Control Frames */
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#define E1000_RCTL_BSEX (1 << 25) /* Buffer Size Extension */
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#define E1000_RCTL_SECRC (1 << 26) /* Strip Ethernet CRC from incoming packet */
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#define E1000_RCTL_FILTER_BITS (E1000_RCTL_SBP | E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_BAM | E1000_RCTL_PMCF)
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@ -24,7 +24,7 @@ static ULONG E1000WriteFlush(IN PE1000_ADAPTER Adapter)
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return Value;
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}
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static VOID E1000WriteUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, IN ULONG Value)
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VOID NTAPI E1000WriteUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, IN ULONG Value)
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{
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NdisWriteRegisterUlong((PULONG)(Adapter->IoBase + Address), Value);
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}
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@ -41,6 +41,64 @@ static VOID E1000WriteIoUlong(IN PE1000_ADAPTER Adapter, IN ULONG Address, IN UL
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NdisRawWritePortUlong((PULONG)(Adapter->IoPort + 4), Value);
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}
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static ULONG PacketFilterToMask(ULONG PacketFilter)
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{
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ULONG FilterMask = 0;
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if (PacketFilter & NDIS_PACKET_TYPE_ALL_MULTICAST)
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{
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/* Multicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_MPE;
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}
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if (PacketFilter & NDIS_PACKET_TYPE_PROMISCUOUS)
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{
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/* Unicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_UPE;
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/* Multicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_MPE;
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}
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if (PacketFilter & NDIS_PACKET_TYPE_MAC_FRAME)
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{
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/* Pass MAC Control Frames */
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FilterMask |= E1000_RCTL_PMCF;
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}
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if (PacketFilter & NDIS_PACKET_TYPE_BROADCAST)
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{
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/* Broadcast Accept Mode */
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FilterMask |= E1000_RCTL_BAM;
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}
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return FilterMask;
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}
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static ULONG RcvBufAllocationSize(E1000_RCVBUF_SIZE BufSize)
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{
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static ULONG PredefSizes[4] = {
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2048, 1024, 512, 256,
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};
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ULONG Size;
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Size = PredefSizes[BufSize & E1000_RCVBUF_INDEXMASK];
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if (BufSize & E1000_RCVBUF_RESERVED)
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{
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ASSERT(BufSize != 2048);
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Size *= 16;
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}
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return Size;
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}
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static ULONG RcvBufRegisterMask(E1000_RCVBUF_SIZE BufSize)
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{
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ULONG Mask = 0;
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Mask |= BufSize & E1000_RCVBUF_INDEXMASK;
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Mask <<= E1000_RCTL_BSIZE_SHIFT;
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if (BufSize & E1000_RCVBUF_RESERVED)
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Mask |= E1000_RCTL_BSEX;
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return Mask;
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}
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static BOOLEAN E1000ReadMdic(IN PE1000_ADAPTER Adapter, IN ULONG Address, USHORT *Result)
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{
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ULONG ResultAddress;
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@ -242,6 +300,9 @@ NICAllocateIoResources(
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IN PE1000_ADAPTER Adapter)
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{
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NDIS_STATUS Status;
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ULONG AllocationSize;
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UINT n;
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NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
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Status = NdisMRegisterIoPortRange((PVOID*)&Adapter->IoPort,
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@ -271,6 +332,47 @@ NICAllocateIoResources(
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return NDIS_STATUS_RESOURCES;
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}
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for (n = 0; n < NUM_TRANSMIT_DESCRIPTORS; ++n)
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{
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PE1000_TRANSMIT_DESCRIPTOR Descriptor = Adapter->TransmitDescriptors + n;
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Descriptor->Address = 0;
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Descriptor->Length = 0;
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}
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NdisMAllocateSharedMemory(Adapter->AdapterHandle,
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sizeof(E1000_RECEIVE_DESCRIPTOR) * NUM_RECEIVE_DESCRIPTORS,
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FALSE,
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(PVOID*)&Adapter->ReceiveDescriptors,
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&Adapter->ReceiveDescriptorsPa);
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if (Adapter->ReceiveDescriptors == NULL)
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{
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NDIS_DbgPrint(MIN_TRACE, ("Unable to allocate receive descriptors\n"));
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return NDIS_STATUS_RESOURCES;
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}
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AllocationSize = RcvBufAllocationSize(Adapter->ReceiveBufferType);
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ASSERT(Adapter->ReceiveBufferEntrySize == 0 || Adapter->ReceiveBufferEntrySize == AllocationSize);
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Adapter->ReceiveBufferEntrySize = AllocationSize;
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NdisMAllocateSharedMemory(Adapter->AdapterHandle,
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Adapter->ReceiveBufferEntrySize * NUM_RECEIVE_DESCRIPTORS,
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FALSE,
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(PVOID*)&Adapter->ReceiveBuffer,
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&Adapter->ReceiveBufferPa);
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if (Adapter->ReceiveBuffer == NULL)
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{
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NDIS_DbgPrint(MIN_TRACE, ("Unable to allocate receive buffer\n"));
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return NDIS_STATUS_RESOURCES;
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}
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for (n = 0; n < NUM_RECEIVE_DESCRIPTORS; ++n)
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{
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PE1000_RECEIVE_DESCRIPTOR Descriptor = Adapter->ReceiveDescriptors + n;
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RtlZeroMemory(Descriptor, sizeof(*Descriptor));
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Descriptor->Address = Adapter->ReceiveBufferPa.QuadPart + n * Adapter->ReceiveBufferEntrySize;
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}
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return NDIS_STATUS_SUCCESS;
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}
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@ -323,11 +425,45 @@ NICReleaseIoResources(
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{
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NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
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if (Adapter->ReceiveDescriptors != NULL)
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{
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/* Disassociate our shared buffer before freeing it to avoid NIC-induced memory corruption */
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if (Adapter->IoBase)
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{
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E1000WriteUlong(Adapter, E1000_REG_RDH, 0);
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E1000WriteUlong(Adapter, E1000_REG_RDT, 0);
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}
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NdisMFreeSharedMemory(Adapter->AdapterHandle,
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sizeof(E1000_RECEIVE_DESCRIPTOR) * NUM_RECEIVE_DESCRIPTORS,
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FALSE,
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Adapter->ReceiveDescriptors,
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Adapter->ReceiveDescriptorsPa);
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Adapter->ReceiveDescriptors = NULL;
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}
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if (Adapter->ReceiveBuffer != NULL)
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{
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NdisMFreeSharedMemory(Adapter->AdapterHandle,
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Adapter->ReceiveBufferEntrySize * NUM_RECEIVE_DESCRIPTORS,
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FALSE,
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Adapter->ReceiveBuffer,
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Adapter->ReceiveBufferPa);
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Adapter->ReceiveBuffer = NULL;
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Adapter->ReceiveBufferEntrySize = 0;
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}
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if (Adapter->TransmitDescriptors != NULL)
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{
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/* Disassociate our shared buffer before freeing it to avoid NIC-induced memory corruption */
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//E1000WriteUlong(Adapter, E1000_REG_TDH, 0);
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//E1000WriteUlong(Adapter, E1000_REG_TDT, 0);
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if (Adapter->IoBase)
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{
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E1000WriteUlong(Adapter, E1000_REG_TDH, 0);
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E1000WriteUlong(Adapter, E1000_REG_TDT, 0);
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}
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NdisMFreeSharedMemory(Adapter->AdapterHandle,
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sizeof(E1000_TRANSMIT_DESCRIPTOR) * NUM_TRANSMIT_DESCRIPTORS,
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@ -429,6 +565,10 @@ NICEnableTxRx(
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ULONG Value;
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NDIS_DbgPrint(MAX_TRACE, ("Called.\n"));
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NDIS_DbgPrint(MID_TRACE, ("Setting up transmit.\n"));
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/* Make sure the thing is disabled first. */
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E1000WriteUlong(Adapter, E1000_REG_TCTL, 0);
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/* Transmit descriptor ring buffer */
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E1000WriteUlong(Adapter, E1000_REG_TDBAH, Adapter->TransmitDescriptorsPa.HighPart);
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@ -447,12 +587,36 @@ NICEnableTxRx(
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E1000WriteUlong(Adapter, E1000_REG_TCTL, Value);
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NDIS_DbgPrint(MID_TRACE, ("Setting up receive.\n"));
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/* Make sure the thing is disabled first. */
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E1000WriteUlong(Adapter, E1000_REG_RCTL, 0);
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//E1000ReadUlong(Adapter, E1000_REG_RCTL, &Value);
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//Value = E1000_RCTL_BSIZE_2048 | E1000_RCTL_SECRC | E1000_RCTL_EN;
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//E1000WriteUlong(Adapter, E1000_REG_RCTL, Value);
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/* Receive descriptor ring buffer */
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E1000WriteUlong(Adapter, E1000_REG_RDBAH, Adapter->ReceiveDescriptorsPa.HighPart);
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E1000WriteUlong(Adapter, E1000_REG_RDBAL, Adapter->ReceiveDescriptorsPa.LowPart);
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/* Receive descriptor buffer size */
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E1000WriteUlong(Adapter, E1000_REG_RDLEN, sizeof(E1000_RECEIVE_DESCRIPTOR) * NUM_RECEIVE_DESCRIPTORS);
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/* Receive descriptor tail / head */
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E1000WriteUlong(Adapter, E1000_REG_RDH, 0);
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E1000WriteUlong(Adapter, E1000_REG_RDT, NUM_RECEIVE_DESCRIPTORS - 1);
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Adapter->CurrentRxDesc = 0;
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/* Setup Interrupt Throttling */
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E1000WriteUlong(Adapter, E1000_REG_ITR, DEFAULT_ITR);
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/* Some defaults */
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Value = E1000_RCTL_SECRC | E1000_RCTL_EN;
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/* Receive buffer size */
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Value |= RcvBufRegisterMask(Adapter->ReceiveBufferType);
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/* Add our current packet filter */
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Value |= PacketFilterToMask(Adapter->PacketFilter);
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E1000WriteUlong(Adapter, E1000_REG_RCTL, Value);
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return NDIS_STATUS_SUCCESS;
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}
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@ -542,35 +706,12 @@ NTAPI
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NICApplyPacketFilter(
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IN PE1000_ADAPTER Adapter)
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{
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ULONG FilterMask = 0;
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ULONG FilterMask;
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E1000ReadUlong(Adapter, E1000_REG_RCTL, &FilterMask);
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FilterMask &= ~E1000_RCTL_FILTER_BITS;
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if (Adapter->PacketFilter & NDIS_PACKET_TYPE_ALL_MULTICAST)
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{
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/* Multicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_MPE;
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}
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if (Adapter->PacketFilter & NDIS_PACKET_TYPE_PROMISCUOUS)
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{
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/* Unicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_UPE;
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/* Multicast Promiscuous Enabled */
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FilterMask |= E1000_RCTL_MPE;
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}
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if (Adapter->PacketFilter & NDIS_PACKET_TYPE_MAC_FRAME)
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{
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/* Pass MAC Control Frames */
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FilterMask |= E1000_RCTL_PMCF;
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}
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if (Adapter->PacketFilter & NDIS_PACKET_TYPE_BROADCAST)
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{
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/* Broadcast Accept Mode */
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FilterMask |= E1000_RCTL_BAM;
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}
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FilterMask |= PacketFilterToMask(Adapter->PacketFilter);
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E1000WriteUlong(Adapter, E1000_REG_RCTL, FilterMask);
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return NDIS_STATUS_SUCCESS;
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@ -52,6 +52,7 @@ MiniportHandleInterrupt(
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if (Value & E1000_IMS_LSC)
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{
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ULONG Status;
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NdisDprReleaseSpinLock(&Adapter->Lock);
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Value &= ~E1000_IMS_LSC;
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NDIS_DbgPrint(MIN_TRACE, ("Link status changed!.\n"));
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@ -84,6 +85,56 @@ MiniportHandleInterrupt(
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}
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}
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if (Value & (E1000_IMS_RXDMT0 | E1000_IMS_RXT0))
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{
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volatile PE1000_RECEIVE_DESCRIPTOR ReceiveDescriptor;
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PETH_HEADER EthHeader;
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ULONG BufferOffset;
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/* Clear out these interrupts */
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Value &= ~(E1000_IMS_RXDMT0 | E1000_IMS_RXT0);
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while (TRUE)
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{
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BufferOffset = Adapter->CurrentRxDesc * Adapter->ReceiveBufferEntrySize;
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ReceiveDescriptor = Adapter->ReceiveDescriptors + Adapter->CurrentRxDesc;
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if (!(ReceiveDescriptor->Status & E1000_RDESC_STATUS_DD))
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{
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/* Not received yet */
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break;
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}
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if (ReceiveDescriptor->Length != 0)
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{
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EthHeader = Adapter->ReceiveBuffer + BufferOffset;
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NdisMEthIndicateReceive(Adapter->AdapterHandle,
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NULL,
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EthHeader,
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sizeof(ETH_HEADER),
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EthHeader + 1,
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ReceiveDescriptor->Length - sizeof(ETH_HEADER),
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ReceiveDescriptor->Length - sizeof(ETH_HEADER));
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if (ReceiveDescriptor->Status & E1000_RDESC_STATUS_EOP)
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{
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NdisMEthIndicateReceiveComplete(Adapter->AdapterHandle);
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}
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else
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{
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__debugbreak();
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}
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}
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/* Restore the descriptor Address, incase we received a NULL descriptor */
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ReceiveDescriptor->Address = Adapter->ReceiveBufferPa.QuadPart + BufferOffset;
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/* Give the descriptor back */
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ReceiveDescriptor->Status = 0;
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E1000WriteUlong(Adapter, E1000_REG_RDT, Adapter->CurrentRxDesc);
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Adapter->CurrentRxDesc = (Adapter->CurrentRxDesc + 1) % NUM_RECEIVE_DESCRIPTORS;
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}
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}
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ASSERT(Value == 0);
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}
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@ -21,7 +21,7 @@
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#define DRIVER_VERSION 1
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#define DEFAULT_INTERRUPT_MASK (E1000_IMS_LSC | E1000_IMS_TXDW)
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#define DEFAULT_INTERRUPT_MASK (E1000_IMS_LSC | E1000_IMS_TXDW | E1000_IMS_RXDMT0 | E1000_IMS_RXT0)
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typedef struct _E1000_ADAPTER
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{
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@ -72,6 +72,18 @@ typedef struct _E1000_ADAPTER
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ULONG LastTxDesc;
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BOOLEAN TxFull;
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/* Receive */
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PE1000_RECEIVE_DESCRIPTOR ReceiveDescriptors;
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NDIS_PHYSICAL_ADDRESS ReceiveDescriptorsPa;
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ULONG CurrentRxDesc;
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E1000_RCVBUF_SIZE ReceiveBufferType;
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volatile PUCHAR ReceiveBuffer;
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NDIS_PHYSICAL_ADDRESS ReceiveBufferPa;
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ULONG ReceiveBufferEntrySize;
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} E1000_ADAPTER, *PE1000_ADAPTER;
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@ -202,4 +214,14 @@ NTAPI
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MiniportHandleInterrupt(
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IN NDIS_HANDLE MiniportAdapterContext);
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VOID
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NTAPI
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E1000WriteUlong(
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IN PE1000_ADAPTER Adapter,
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IN ULONG Address,
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||||
IN ULONG Value);
|
||||
|
||||
|
||||
|
||||
#endif /* _E1000_PCH_ */
|
||||
|
|
|
|||
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Reference in a new issue