[NTOSKRNL]

- Implement MiIsUserP*e inline functions to efficiently determine if a pte is a pte/pde/ppe or pxe for a user mode page
- Make MiDetermineUserGlobalPteMask work for _MI_PAGING_LEVELS >= 3
- In MiResolveDemandZeroFault, use MI_MAKE_HARDWARE_PTE only, it does all the necessary work.

svn path=/trunk/; revision=55472
This commit is contained in:
Timo Kreuzer 2012-02-06 22:01:09 +00:00
parent 3bc403f6e7
commit 35a3e62e9d
2 changed files with 58 additions and 19 deletions

View file

@ -565,6 +565,50 @@ MiIsMemoryTypeInvisible(TYPE_OF_MEMORY MemoryType)
(MemoryType == LoaderBBTMemory)); (MemoryType == LoaderBBTMemory));
} }
#ifdef _M_AMD64
BOOLEAN
FORCEINLINE
MiIsUserPxe(PVOID Address)
{
return ((ULONG_PTR)Address >> 7) == 0x1FFFFEDF6FB7DA0ULL;
}
BOOLEAN
FORCEINLINE
MiIsUserPpe(PVOID Address)
{
return ((ULONG_PTR)Address >> 16) == 0xFFFFF6FB7DA0ULL;
}
BOOLEAN
FORCEINLINE
MiIsUserPde(PVOID Address)
{
return ((ULONG_PTR)Address >> 25) == 0x7FFFFB7DA0ULL;
}
BOOLEAN
FORCEINLINE
MiIsUserPte(PVOID Address)
{
return ((ULONG_PTR)Address >> 34) == 0x3FFFFDA0ULL;
}
#else
BOOLEAN
FORCEINLINE
MiIsUserPde(PVOID Address)
{
return ((Address >= (PVOID)MiAddressToPde(NULL)) &&
(Address <= (PVOID)MiHighestUserPde));
}
BOOLEAN
FORCEINLINE
MiIsUserPte(PVOID Address)
{
return (Address <= (PVOID)MiHighestUserPte);
}
#endif
// //
// Figures out the hardware bits for a PTE // Figures out the hardware bits for a PTE
@ -583,9 +627,15 @@ MiDetermineUserGlobalPteMask(IN PVOID PointerPte)
MI_MAKE_ACCESSED_PAGE(&TempPte); MI_MAKE_ACCESSED_PAGE(&TempPte);
/* Is this for user-mode? */ /* Is this for user-mode? */
if ((PointerPte <= (PVOID)MiHighestUserPte) || if (
((PointerPte >= (PVOID)MiAddressToPde(NULL)) && #if (_MI_PAGING_LEVELS == 4)
(PointerPte <= (PVOID)MiHighestUserPde))) MiIsUserPxe(PointerPte) ||
#endif
#if (_MI_PAGING_LEVELS >= 3)
MiIsUserPpe(PointerPte) ||
#endif
MiIsUserPde(PointerPte) ||
MiIsUserPte(PointerPte))
{ {
/* Set the owner bit */ /* Set the owner bit */
MI_MAKE_OWNER_PAGE(&TempPte); MI_MAKE_OWNER_PAGE(&TempPte);

View file

@ -335,22 +335,10 @@ MiResolveDemandZeroFault(IN PVOID Address,
if (NeedZero) MiZeroPfn(PageFrameNumber); if (NeedZero) MiZeroPfn(PageFrameNumber);
/* Build the PTE */ /* Build the PTE */
if (PointerPte <= MiHighestUserPte)
{
/* For user mode */
MI_MAKE_HARDWARE_PTE_USER(&TempPte,
PointerPte,
Protection,
PageFrameNumber);
}
else
{
/* For kernel mode */
MI_MAKE_HARDWARE_PTE(&TempPte, MI_MAKE_HARDWARE_PTE(&TempPte,
PointerPte, PointerPte,
Protection, Protection,
PageFrameNumber); PageFrameNumber);
}
/* Set it dirty if it's a writable page */ /* Set it dirty if it's a writable page */
if (MI_IS_PAGE_WRITEABLE(&TempPte)) MI_MAKE_DIRTY_PAGE(&TempPte); if (MI_IS_PAGE_WRITEABLE(&TempPte)) MI_MAKE_DIRTY_PAGE(&TempPte);
@ -625,6 +613,7 @@ MiDispatchFault(IN BOOLEAN StoreInstruction,
/* Check if the PTE is completely empty */ /* Check if the PTE is completely empty */
if (TempPte.u.Long == 0) if (TempPte.u.Long == 0)
{ {
/* The address is not from any pageable area! */
KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA, KeBugCheckEx(PAGE_FAULT_IN_NONPAGED_AREA,
(ULONG_PTR)Address, (ULONG_PTR)Address,
StoreInstruction, StoreInstruction,